author
int64 658
755k
| date
stringlengths 19
19
| timezone
int64 -46,800
43.2k
| hash
stringlengths 40
40
| message
stringlengths 5
490
| mods
list | language
stringclasses 20
values | license
stringclasses 3
values | repo
stringlengths 5
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| original_message
stringlengths 12
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718,765 |
23.04.2019 14:51:02
| 14,400 |
138132769e0d7d235c9b203bc22c3ecf26aaa87b
|
fix access violation in 64 bit binaries
|
[
{
"change_type": "MODIFY",
"old_path": "vivbin",
"new_path": "vivbin",
"diff": "@@ -109,7 +109,7 @@ def main():\nstart = time.time()\nvw.analyze()\nend = time.time()\n- print \"ANALYSIS TIME: %s\" % (end-start)\n+ print(\"ANALYSIS TIME: %s\" % (end-start))\nif args.modname is not None:\nmodule = imp.load_module(\"custom_analysis\", file(modname, \"rb\"), modname, ('.py', 'U', 1))\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/generic/relocations.py",
"new_path": "vivisect/analysis/generic/relocations.py",
"diff": "@@ -8,11 +8,11 @@ import vivisect\ndef analyze(vw):\nfor fname, vaoff, rtype, data in vw.getRelocations():\n+ imgbase = vw.getFileMeta(fname, 'imagebase')\nif rtype == vivisect.RTYPE_BASERELOC and not vw.isLocation(vaoff):\n- vw.makePointer(vaoff, follow=True)\n+ vw.makePointer(imgbase + vaoff, follow=True)\nelif rtype == vivisect.RTYPE_BASEOFF:\n- imgbase = vw.getFileMeta(fname, 'imagebase')\nva = imgbase + vaoff\nif not vw.isLocation(va):\nvw.makePointer(va, follow=True)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
fix access violation in 64 bit binaries
|
718,765 |
23.04.2019 15:44:37
| 14,400 |
35d77c6e27b6239d28f8465cd42e4ba1dff64989
|
Flake8 til the day I die. Also UI updates (open a file from just vivbin, hotkey shortcuts)
|
[
{
"change_type": "MODIFY",
"old_path": "vivbin",
"new_path": "vivbin",
"diff": "#!/usr/bin/env python\n-import os\nimport imp\nimport sys\nimport time\n-import inspect\nimport cProfile\nimport argparse\n-import threading\n-import traceback\nimport logging\nlogging.basicConfig(level=logging.DEBUG, format='%(asctime)s:%(levelname)s:%(name)s: %(message)s')\nlogger = logging.getLogger()\n-import vivisect\nimport vivisect.cli as viv_cli\nimport envi.config as e_config\nimport envi.threads as e_threads\n@@ -63,20 +58,18 @@ def main():\ntry:\nvw.config.parseConfigOption(args.option)\n- except e_config.ConfigNoAssignment, e:\n+ except e_config.ConfigNoAssignment as e:\nprint(vw.config.reprConfigPaths() + \"\\n\")\nprint(e)\nprint(\"syntax: \\t-O <secname>.<optname>=<optval> (optval must be json syntax)\")\nsys.exit(-1)\n- except Exception, e:\n+ except Exception as e:\nprint(vw.config.reprConfigPaths())\nprint(\"With entry: %s\" % args.option)\nprint(e)\nsys.exit(-1)\n-\n-\nif args.storage_name is not None:\nvw.setMeta(\"StorageModule\", args.storage_name)\n@@ -88,7 +81,7 @@ def main():\nneedanalyze = False\nif args.file is not None:\nfor fname in args.file:\n- if args.parsemod == None:\n+ if args.parsemod is None:\nargs.parsemod = viv_parsers.guessFormatFilename(fname)\nstart = time.time()\n@@ -131,14 +124,6 @@ def main():\nviv_qt_main.main(vw)\n-if __name__ == '__main__':\n- try:\n- # psyco makes disasm much faster (2-3X)\n- import psyco\n- #psyco.log()\n- psyco.full()\n- except ImportError:\n- pass\n+if __name__ == '__main__':\nmain()\n-\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/qt/main.py",
"new_path": "vivisect/qt/main.py",
"diff": "@@ -54,6 +54,15 @@ class VQVivMainWindow(viv_base.VivEventDist, vq_app.VQMainCmdWindow):\nvw._viv_gui = self\nviv_base.VivEventDist.__init__(self, vw=vw)\nvq_app.VQMainCmdWindow.__init__(self, 'Vivisect', vw)\n+\n+ self.addHotKey('ctrl+o', 'file:open')\n+ self.addHotKeyTarget('file:open', self._menuFileOpen)\n+ self.addHotKey('ctrl+s', 'file:save')\n+ self.addHotKeyTarget('file:save', self._menuFileSave)\n+ self.addHotKey('ctrl+w', 'file:quit')\n+ self.addHotKeyTarget('file:save', self._menuFileQuit)\n+\n+ self.vqAddMenuField('&File.Open', self._menuFileOpen)\nself.vqAddMenuField('&File.Save', self._menuFileSave)\nself.vqAddMenuField('&File.Save As', self._menuFileSaveAs)\nself.vqAddMenuField('&File.Save to Server', self._menuFileSaveServer)\n@@ -320,6 +329,15 @@ class VQVivMainWindow(viv_base.VivEventDist, vq_app.VQMainCmdWindow):\ndef _menuViewSymboliks(self):\nself.vqBuildDockWidget('VivSymbolikFuncPane', area=QtCore.Qt.TopDockWidgetArea)\n+ def _menuFileOpen(self):\n+ fname = getOpenFileName(self, 'Open...')\n+ if fname is None or not len(fname):\n+ return\n+ self.vw.loadFromFile(fname)\n+ self.vw.vprint('Opening %s' % fname)\n+ self.vw.analyze()\n+ self.vw.vprint('Opened %s' % fname)\n+\n@vq_main.workthread\ndef _menuFileSave(self, fullsave=False):\nself.vw.vprint('Saving workspace...')\n@@ -328,7 +346,7 @@ class VQVivMainWindow(viv_base.VivEventDist, vq_app.VQMainCmdWindow):\ndef _menuFileSaveAs(self):\nfname = getSaveFileName(self, 'Save As...')\n- if fname == None or not len(fname):\n+ if fname is None or not len(fname):\nreturn\nself.vw.setMeta('StorageName', fname)\nself._menuFileSave(fullsave=True)\n@@ -338,7 +356,7 @@ class VQVivMainWindow(viv_base.VivEventDist, vq_app.VQMainCmdWindow):\ndef _menuViewLayoutsLoad(self):\nfname = getOpenFileName(self, 'Load Layout')\n- if fname == None:\n+ if fname is None:\nreturn\nsettings = QtCore.QSettings(fname, QtCore.QSettings.IniFormat)\n"
},
{
"change_type": "MODIFY",
"old_path": "vqt/hotkeys.py",
"new_path": "vqt/hotkeys.py",
"diff": "@@ -73,7 +73,7 @@ class HotKeyMixin(object):\n'''\nCheck if the given hotkey target name is valid.\n'''\n- return self._vq_hotkey_targets.get(targname) != None\n+ return self._vq_hotkey_targets.get(targname) is not None\ndef getHotKeys(self):\n'''\n@@ -107,7 +107,7 @@ class HotKeyMixin(object):\nkeyobj = settings.value('hotkey:%s' % tname)\n- if keyobj != None:\n+ if keyobj is not None:\nself.addHotKey(keyobj.toString(), tname)\ndef getHotKeyFromEvent(self, event):\n@@ -115,7 +115,6 @@ class HotKeyMixin(object):\nA utility to retrieve the keystr from a QT keystroke event.\n'''\nkey = event.key()\n- txt = str(event.text())\nmods = int(event.modifiers())\n@@ -148,7 +147,7 @@ class HotKeyMixin(object):\n# print 'KEYSTR:', hotkey\ntarget = self._vq_hotkeys.get(hotkey)\n- if target != None:\n+ if target is not None:\ncallback, args, kwargs = self._vq_hotkey_targets.get(target)\ntry:\ncallback(*args, **kwargs)\n"
},
{
"change_type": "MODIFY",
"old_path": "vqt/main.py",
"new_path": "vqt/main.py",
"diff": "@@ -213,7 +213,7 @@ def vqtevent(event,einfo):\nglobal qapp\nqapp.guievents.emit(event, einfo)\nchan = qapp.vqtchans.get(event)\n- if chan != None:\n+ if chan is not None:\nchan.guievents.emit(event, einfo)\ndef vqtconnect(callback, event=None):\n@@ -226,12 +226,12 @@ def vqtconnect(callback, event=None):\nof the specified type.\n'''\nglobal qapp\n- if event == None:\n+ if event is None:\nqapp.guievents.connect(callback)\nreturn\nchan = qapp.vqtchans.get(event)\n- if chan == None:\n+ if chan is None:\nchan = QEventChannel()\nqapp.vqtchans[event] = chan\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Flake8 til the day I die. Also UI updates (open a file from just vivbin, hotkey shortcuts)
|
718,765 |
23.04.2019 16:19:52
| 14,400 |
6a5c6829f7bba35ec7344254ec56466019993408
|
Tweak UI a bit. I want the open dialog to close before the analysis, but not sure how to do that quite yet
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/qt/main.py",
"new_path": "vivisect/qt/main.py",
"diff": "@@ -329,10 +329,12 @@ class VQVivMainWindow(viv_base.VivEventDist, vq_app.VQMainCmdWindow):\nfname = getOpenFileName(self, 'Open...')\nif fname is None or not len(fname):\nreturn\n- self.vw.loadFromFile(fname)\n+\nself.vw.vprint('Opening %s' % fname)\n+ self.vw.loadFromFile(fname)\n+ self.vw.vprint('Analyzing %s' % fname)\nself.vw.analyze()\n- self.vw.vprint('Opened %s' % fname)\n+ self.vw.vprint('%s is ready!' % fname)\n@vq_main.workthread\ndef _menuFileSave(self, fullsave=False):\n@@ -458,10 +460,9 @@ def main(vw):\nmw.show()\nvq_main.main()\n+\nif __name__ == '__main__':\nvw = viv_cli.VivCli()\n- import sys\nif len(sys.argv) == 2:\nvw.loadWorkspace(sys.argv[1])\nmain(vw)\n-\n"
},
{
"change_type": "MODIFY",
"old_path": "vqt/application.py",
"new_path": "vqt/application.py",
"diff": "@@ -71,9 +71,7 @@ class VQDockWidget(vq_hotkeys.HotKeyMixin, QDockWidget):\nself.show()\nself.raise_()\n-import vqt.hotkeys as vq_hotkey\n-\n-class VQMainCmdWindow(vq_hotkey.HotKeyMixin, QMainWindow):\n+class VQMainCmdWindow(vq_hotkeys.HotKeyMixin, QMainWindow):\n'''\nA base class for application window's to inherit from.\n'''\n@@ -83,7 +81,7 @@ class VQMainCmdWindow(vq_hotkey.HotKeyMixin, QMainWindow):\ndef __init__(self, appname, cmd, **kwargs):\nsuper(QMainWindow, self).__init__(**kwargs)\n- vq_hotkey.HotKeyMixin.__init__(self)\n+ vq_hotkeys.HotKeyMixin.__init__(self)\nself._vq_appname = appname\nself._vq_dockwidgets = []\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Tweak UI a bit. I want the open dialog to close before the analysis, but not sure how to do that quite yet
|
718,765 |
24.04.2019 10:38:03
| 14,400 |
4336d422eba9d5932647bd8bef1b70bd07b4fa2c
|
flake8 and some py3 work
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -958,18 +958,15 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nCreate a single opcode location. If you have already parsed the\nopcode object, you may pass it in.\n\"\"\"\n- if op == None:\n+ if op is None:\ntry:\n-\nop = self.parseOpcode(va, arch=arch)\n-\n- except envi.InvalidInstruction, msg:\n+ except envi.InvalidInstruction as msg:\n# FIXME something is just not right about this...\n- bytes = self.readMemory(va, 16)\n- print \"Invalid Instruct Attempt At:\",hex(va),bytes.encode(\"hex\")\n+ bytez = self.readMemory(va, 16)\n+ print(\"Invalid Instruct Attempt At:\", hex(va), bytez.encode(\"hex\"))\nraise InvalidLocation(va,msg)\n-\n- except Exception, msg:\n+ except Exception as msg:\ntraceback.print_exc()\nraise InvalidLocation(va,msg)\n@@ -983,8 +980,10 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nfor tova, bflags in brlist:\n# If there were unresolved dynamic branches, oh well...\n- if tova == None: continue\n- if not self.isValidPointer(tova): continue\n+ if tova is None:\n+ continue\n+ if not self.isValidPointer(tova):\n+ continue\nbrdone[tova] = True\n@@ -1000,7 +999,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nif not tabdone.get(rdest):\ntabdone[rdest] = True\nself.addXref(va, rdest, REF_CODE, envi.BR_COND)\n- if self.getName(rdest) == None:\n+ if self.getName(rdest) is None:\nself.makeName(rdest, \"case%d_%.8x\" % (i,rdest))\nptrbase += self.psize\n@@ -1016,7 +1015,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nself.addXref(va, tova, REF_DATA)\nptrdest = None\n- if self.getLocation(tova) == None:\n+ if self.getLocation(tova) is None:\nptrdest = self.makePointer(tova, follow=False)\n# If the actual dest is executable, make a code ref fixup\n@@ -1029,7 +1028,8 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nelse:\n# vivisect does NOT create REF_CODE entries for\n# instruction fall through\n- if bflags & envi.BR_FALL: continue\n+ if bflags & envi.BR_FALL:\n+ continue\nself.addXref(va, tova, REF_CODE, bflags)\n@@ -1047,7 +1047,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nif brdone.get(ref, False):\ncontinue\n- if ref != None and self.isValidPointer(ref):\n+ if ref is not None and self.isValidPointer(ref):\n# It's a data reference. lets also check if the data is\n# a pointer.\n@@ -1056,7 +1056,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\n# If we don't already know what type this location is,\n# lets make it either a pointer or a number...\n- if self.getLocation(ref) == None:\n+ if self.getLocation(ref) is None:\noffset, bytes = self.getByteDef(ref)\n@@ -1071,7 +1071,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nref = o.getOperValue(op)\nif brdone.get(ref, False):\ncontinue\n- if ref != None and self.isValidPointer(ref):\n+ if ref is not None and self.isValidPointer(ref):\nself.addXref(va, ref, REF_PTR)\nreturn loc\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
flake8 and some py3 work
|
718,765 |
25.04.2019 17:07:25
| 14,400 |
048a72c0cf9dc60371f967c31cf6d863241978b5
|
A couple quality of life improvements for working in vivisect UI
|
[
{
"change_type": "MODIFY",
"old_path": "envi/qt/memcanvas.py",
"new_path": "envi/qt/memcanvas.py",
"diff": "@@ -24,7 +24,7 @@ from vqt.common import *\nclass LoggerPage(QWebPage):\ndef javaScriptConsoleMessage(self, msg, line, source):\n- print '%s line %d: %s' % (source, line, msg)\n+ print('%s line %d: %s' % (source, line, msg))\nclass VQMemoryCanvas(e_memcanvas.MemoryCanvas, QWebView):\n@@ -172,7 +172,7 @@ class VQMemoryCanvas(e_memcanvas.MemoryCanvas, QWebView):\ndef _add_raw(self, text):\n# If we are in a call to renderMemory, cache til the end.\n- if self._canv_cache != None:\n+ if self._canv_cache is not None:\nself._canv_cache += text\nreturn\n@@ -181,7 +181,7 @@ class VQMemoryCanvas(e_memcanvas.MemoryCanvas, QWebView):\ndef addText(self, text, tag=None):\ntext = cgi.escape(text)\n- if tag != None:\n+ if tag is not None:\notag, ctag = tag\ntext = otag + text + ctag\n@@ -197,7 +197,7 @@ class VQMemoryCanvas(e_memcanvas.MemoryCanvas, QWebView):\nva = self._canv_curva\nmenu = QMenu()\n- if self._canv_curva != None:\n+ if self._canv_curva is not None:\nself.initMemWindowMenu(va, menu)\nviewmenu = menu.addMenu('view ')\n@@ -210,7 +210,7 @@ class VQMemoryCanvas(e_memcanvas.MemoryCanvas, QWebView):\ndef _menuSaveToHtml(self):\nfname = getSaveFileName(self, 'Save As HTML...')\n- if fname != None:\n+ if fname is not None:\nfname = str(fname)\nif len(fname):\nhtml = self.page().mainFrame().toHtml()\n@@ -227,8 +227,8 @@ def getNavTargetNames():\nvqtevent('envi:nav:getnames', ret)\nreturn ret\n+\ndef initMemSendtoMenu(expr, menu):\nfor name in set(getNavTargetNames()):\nargs = (name, expr, None)\nmenu.addAction('sendto: %s' % name, ACT(vqtevent, 'envi:nav:expr', args))\n-\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/__init__.py",
"new_path": "vivisect/analysis/__init__.py",
"diff": "@@ -14,7 +14,6 @@ def addAnalysisModules(vw):\narch = vw.getMeta('Architecture')\nfmt = vw.getMeta('Format')\n- plat = vw.getMeta('Platform')\nif fmt == 'pe':\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/generic/pointers.py",
"new_path": "vivisect/analysis/generic/pointers.py",
"diff": "-\n\"\"\"\ngeneric workspace analysis module to seek through the undiscovered\ncountry looking for pointers to interesting things.\nin a previous life, this analysis code lived inside VivWorkspace.analyze()\n\"\"\"\n+\n+\ndef analyze(vw):\n- if vw.verbose: vw.vprint('...analyzing pointers.')\n+ if vw.verbose:\n+ vw.vprint('...analyzing pointers.')\n# Now, lets find likely free-hanging pointers\nfor addr, pval in vw.findPointers():\n@@ -15,6 +17,6 @@ def analyze(vw):\ncontinue\ntry:\nvw.followPointer(pval)\n- except Exception, e:\n- if vw.verbose: vw.vprint(\"followPointer() failed for 0x%.8x (pval: 0x%.8x)\" % (addr,pval))\n-\n+ except Exception:\n+ if vw.verbose:\n+ vw.vprint(\"followPointer() failed for 0x%.8x (pval: 0x%.8x)\" % (addr, pval))\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/generic/relocations.py",
"new_path": "vivisect/analysis/generic/relocations.py",
"diff": "@@ -9,10 +9,10 @@ import vivisect\ndef analyze(vw):\nfor fname, vaoff, rtype, data in vw.getRelocations():\nimgbase = vw.getFileMeta(fname, 'imagebase')\n- if rtype == vivisect.RTYPE_BASERELOC and not vw.isLocation(vaoff):\n- vw.makePointer(imgbase + vaoff, follow=True)\n+ va = imgbase + vaoff\n+ if rtype == vivisect.RTYPE_BASERELOC and not vw.isLocation(va):\n+ vw.makePointer(va, follow=True)\nelif rtype == vivisect.RTYPE_BASEOFF:\n- va = imgbase + vaoff\nif not vw.isLocation(va):\nvw.makePointer(va, follow=True)\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/pe.py",
"new_path": "vivisect/parsers/pe.py",
"diff": "@@ -65,7 +65,6 @@ defcalls = {\n# map PE relocation types to vivisect types where possible\nrelmap = {\n- PE.IMAGE_REL_BASED_ABSOLUTE: vivisect.RTYPE_BASERELOC,\nPE.IMAGE_REL_BASED_HIGHLOW: vivisect.RTYPE_BASEOFF,\nPE.IMAGE_REL_BASED_DIR64: vivisect.RTYPE_BASEOFF,\n}\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/qt/ctxmenu.py",
"new_path": "vivisect/qt/ctxmenu.py",
"diff": "@@ -36,7 +36,7 @@ def printEmuState(vw, fva, va):\n# FIXME: this may not be as flexible as it could be, as we don't necessarily *have* to have a location... though we certainly should.\nloc = vw.getLocation(va)\n- if loc == None:\n+ if loc is None:\nvw.vprint(\"ARG! can't find location info for 0x%x\" % va)\nreturn\n@@ -49,14 +49,14 @@ def printEmuState(vw, fva, va):\no = op.opers[i]\no.render(vw.canvas, op, i)\noaddr = o.getOperAddr(op, emu)\n- if oaddr != None:\n+ if oaddr is not None:\nvw.canvas.addText(' [ 0x%x ] ' % oaddr)\nvw.canvas.addText(\" = \")\noval = o.getOperValue(op, emu)\ntaint = emu.getVivTaint(oval)\nbase = \"0x%.8x (%d)\" % (oval, oval)\n- if taint != None:\n+ if taint is not None:\nbase += '%s + %d' % (emu.reprVivTaint(taint), oval - taint[0])\nvw.vprint(base)\n@@ -73,17 +73,18 @@ def buildContextMenu(vw, va=None, expr=None, menu=None, parent=None, nav=None):\nparent - Qt parent\nnav - the \"local\" EnviNavMixin instance\n'''\n- if va == None:\n+ if va is None:\nva = vw.parseExpression(expr)\n- if expr == None:\n+ if expr is None:\nexpr = '0x%.8x' % va\n- if menu == None:\n+ if menu is None:\nmenu = QMenu(parent=parent)\nmenu.addAction('rename (n)', ACT(vw.getVivGui().setVaName, va))\nmenu.addAction('comment (;)', ACT(vw.getVivGui().setVaComment, va))\n+ menu.addAction('print location', ACT(vw.getVivGui().getLocation, va))\nrefsto = vw.getXrefsTo(va)\nrefsfrom = vw.getXrefsFrom(va)\n@@ -95,7 +96,7 @@ def buildContextMenu(vw, va=None, expr=None, menu=None, parent=None, nav=None):\nxexpr = '0x%.8x' % fromva\nxrepr = '0x%.8x: %s' % (fromva, vw.reprLocation(xloc))\nxfva = vw.getFunction(fromva)\n- if xfva != None:\n+ if xfva is not None:\nxrepr = '%s (%s)' % (xrepr, vw.getName(xfva))\nxmenu = rtomenu.addMenu(xrepr)\nif nav:\n@@ -109,7 +110,7 @@ def buildContextMenu(vw, va=None, expr=None, menu=None, parent=None, nav=None):\nxexpr = '0x%.8x' % tova\nxrepr = '0x%.8x: %s' % (tova, vw.reprLocation(xloc))\nxfva = vw.getFunction(tova)\n- if xfva != None:\n+ if xfva is not None:\nxrepr = '%s (%s)' % (xrepr, vw.getName(xfva))\nxmenu = rfrmenu.addMenu(xrepr)\nif nav:\n@@ -117,7 +118,7 @@ def buildContextMenu(vw, va=None, expr=None, menu=None, parent=None, nav=None):\ne_q_memcanvas.initMemSendtoMenu(xexpr, xmenu)\nfva = vw.getFunction(va)\n- if fva != None:\n+ if fva is not None:\nfuncmenu = menu.addMenu('function')\nfuncname = vw.getName(fva)\nif nav:\n@@ -156,7 +157,7 @@ def buildContextMenu(vw, va=None, expr=None, menu=None, parent=None, nav=None):\nfuncmenu.addAction('delete function', ACT(vw.getVivGui().delFunction, va))\nloc = vw.getLocation(va)\n- if loc == None:\n+ if loc is None:\nmakemenu = menu.addMenu('make')\nmakemenu.addAction('code (c)', ACT(vw.makeCode, va))\nmakemenu.addAction('function (f)', ACT(vw.makeFunction, va))\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/qt/main.py",
"new_path": "vivisect/qt/main.py",
"diff": "@@ -110,6 +110,17 @@ class VQVivMainWindow(viv_base.VivEventDist, vq_app.VQMainCmdWindow):\nself.addHotKey('ctrl+w', 'file:quit')\nself.addHotKeyTarget('file:quit', self.close)\n+ def getLocation(self, va):\n+ loctup = self.vw.getLocation(va)\n+ if loctup is None:\n+ self.vw.vprint('Location not found!')\n+ else:\n+ name = loc_type_names.get(loctup[L_LTYPE], 'Unspecified')\n+ self.vw.vprint('VA: %s' % hex(loctup[L_VA]))\n+ self.vw.vprint('Size: %d' % loctup[L_SIZE])\n+ self.vw.vprint('Type: %s' % name)\n+ self.vw.vprint('Info: %s' % str(loctup[L_TINFO]))\n+\ndef setVaName(self, va, parent=None):\nif parent is None:\nparent = self\n@@ -330,6 +341,7 @@ class VQVivMainWindow(viv_base.VivEventDist, vq_app.VQMainCmdWindow):\nif fname is None or not len(fname):\nreturn\nself.vw.vprint('Opening %s' % fname)\n+ self.setWindowTitle('Vivisect: %s' % fname)\nself.vw.loadFromFile(str(fname))\nself.vw.vprint('Analyzing %s' % fname)\nself.vw.analyze()\n@@ -338,7 +350,11 @@ class VQVivMainWindow(viv_base.VivEventDist, vq_app.VQMainCmdWindow):\n@vq_main.workthread\ndef _menuFileSave(self, fullsave=False):\nself.vw.vprint('Saving workspace...')\n+ try:\nself.vw.saveWorkspace(fullsave=fullsave)\n+ except Exception as e:\n+ self.vw.vprint(str(e))\n+ else:\nself.vw.vprint('complete!')\ndef _menuFileSaveAs(self):\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/qt/memory.py",
"new_path": "vivisect/qt/memory.py",
"diff": "@@ -50,12 +50,12 @@ class VivCanvasBase(vq_hotkey.HotKeyMixin, e_mem_canvas.VQMemoryCanvas):\nself.addHotKey('p', 'viv:make:pointer')\nself.addHotKey('u', 'viv:make:unicode')\nself.addHotKey('n', 'viv:setname')\n+ self.addHotKey('g', 'viv:getlocation')\nself.addHotKey(';', 'viv:comment')\nself.addHotKey('S', 'viv:make:struct')\nself.addHotKey('ctrl+S', 'viv:make:struct:again')\nself.addHotKey('ctrl+meta+S', 'viv:make:struct:multi')\nself.addHotKey('U', 'viv:undefine')\n- self.addHotKey('ctrl+s','viv:save')\nself.addHotKey('B', 'viv:bookmark')\nself.addHotKey('ctrl+1', 'viv:make:number:one')\nself.addHotKey('ctrl+2', 'viv:make:number:two')\n@@ -195,29 +195,34 @@ class VivCanvasBase(vq_hotkey.HotKeyMixin, e_mem_canvas.VQMemoryCanvas):\n@vq_hotkey.hotkey('viv:undefine')\ndef _hotkey_undefine(self):\n- if self._canv_curva != None:\n+ if self._canv_curva is not None:\nself.vw.delLocation(self._canv_curva)\n+ @vq_hotkey.hotkey('viv:getlocation')\n+ def _hotkey_getlocation(self):\n+ if self._canv_curva is not None:\n+ self.vw.getVivGui().getLocation(self._canv_curva)\n+\n@vq_hotkey.hotkey('viv:setname')\ndef _hotkey_setname(self):\n- if self._canv_curva != None:\n+ if self._canv_curva is not None:\nself.vw.getVivGui().setVaName(self._canv_curva, parent=self)\n@vq_hotkey.hotkey('viv:bookmark')\ndef _hotkey_bookmark(self):\n- if self._canv_curva != None:\n+ if self._canv_curva is not None:\nself.vw.getVivGui().addBookmark(self._canv_curva, parent=self)\n@vq_hotkey.hotkey('viv:comment')\ndef _hotkey_comment(self):\n- if self._canv_curva != None:\n+ if self._canv_curva is not None:\nself.vw.getVivGui().setVaComment(self._canv_curva, parent=self)\n@vq_hotkey.hotkey('viv:make:struct')\ndef _hotkey_make_struct(self):\n- if self._canv_curva != None:\n+ if self._canv_curva is not None:\nsname = self.vw.getVivGui().makeStruct(self._canv_curva)\n- if sname != None:\n+ if sname is not None:\nself._last_sname = sname\n@vq_hotkey.hotkey('viv:make:struct:again')\n@@ -275,13 +280,6 @@ class VivCanvasBase(vq_hotkey.HotKeyMixin, e_mem_canvas.VQMemoryCanvas):\nif self._canv_curva != None:\nself.vw.makeNumber(self._canv_curva, 16)\n- @firethread\n- @vq_hotkey.hotkey('viv:save')\n- def _hotkey_save(self, fullsave=False):\n- self.vw.vprint('Saving workspace...')\n- self.vw.saveWorkspace(fullsave=fullsave)\n- self.vw.vprint('complete!')\n-\ndef getVaTag(self, va):\nloc = self.mem.getLocation(va)\nif loc != None:\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
A couple quality of life improvements for working in vivisect UI
|
718,765 |
25.04.2019 18:04:31
| 14,400 |
67dd27715c9fdbe209c680035790903b525e2278
|
Add before merging in master
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -817,21 +817,21 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nplen = self.readMemValue(va - 2, 2) # pascal string length\ndlen = self.readMemValue(va - 4, 4) # delphi string length\n- offset, bytes = self.getByteDef(va)\n- maxlen = len(bytes) - offset\n+ offset, bytez = self.getByteDef(va)\n+ maxlen = len(bytez) - offset\ncount = 0\nwhile count < maxlen:\n# If we hit another thing, then probably not.\n# Ignore when count==0 so detection can check something\n# already set as a location.\n- if (count > 0):\n+ if count > 0:\nloc = self.getLocation(va+count)\n- if loc != None:\n+ if loc is not None:\nif loc[L_LTYPE] == LOC_STRING:\nreturn loc[L_VA] - (va + count) + loc[L_SIZE]\nreturn -1\n- c = bytes[offset+count]\n+ c = bytez[offset+count]\n# The \"strings\" algo basically says 4 or more...\nif ord(c) == 0 and count >= 4:\nreturn count\n@@ -1058,12 +1058,16 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\n# lets make it either a pointer or a number...\nif self.getLocation(ref) is None:\n- offset, bytes = self.getByteDef(ref)\n+ offset, _ = self.getByteDef(ref)\nval = self.parseNumber(ref, o.tsize)\n-\nif (self.psize == o.tsize and self.isValidPointer(val)):\nself.makePointer(ref, tova=val)\n+ # In some binaries, this can be a string as well (confirmed to happen in psexec 32/64)\n+ elif self.detectUnicode(ref):\n+ self.makeUnicode(ref)\n+ elif self.detectString(ref):\n+ self.makeString(ref)\nelse:\nself.makeNumber(ref, o.tsize)\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/qt/main.py",
"new_path": "vivisect/qt/main.py",
"diff": "@@ -120,6 +120,7 @@ class VQVivMainWindow(viv_base.VivEventDist, vq_app.VQMainCmdWindow):\nself.vw.vprint('Size: %d' % loctup[L_SIZE])\nself.vw.vprint('Type: %s' % name)\nself.vw.vprint('Info: %s' % str(loctup[L_TINFO]))\n+ self.vw.vprint('')\ndef setVaName(self, va, parent=None):\nif parent is None:\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Add before merging in master
|
718,765 |
26.04.2019 11:17:12
| 14,400 |
9029f5d36d833cae3a141544b3be48874adf1a24
|
Add being able to load workspace in loadFromFile. Flake8 and py3 compat
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/disasm.py",
"new_path": "envi/archs/i386/disasm.py",
"diff": "@@ -834,19 +834,19 @@ class i386Disasm:\nobyte = ord(bytez[offset])\n- #print \"OBYTE\",hex(obyte)\n+ # print(\"OBYTE\", hex(obyte))\nif (obyte > tabdesc[4]):\n# print \"Jumping To Overflow Table:\", tabdesc[5]\ntabdesc = all_tables[tabdesc[5]]\ntabidx = ((obyte - tabdesc[3]) >> tabdesc[1]) & tabdesc[2]\n- #print \"TABIDX: %d\" % tabidx\n+ # print(\"TABIDX: %d\" % tabidx)\nopdesc = tabdesc[0][tabidx]\n- #print 'OPDESC: %s' % repr(opdesc)\n+ # print('OPDESC: %s' % repr(opdesc))\n# Hunt down multi-byte opcodes\nnexttable = opdesc[0]\n- #print \"NEXT\",nexttable,hex(obyte)\n+ # print(\"NEXT\",nexttable,hex(obyte))\nif nexttable != 0: # If we have a sub-table specified, use it.\n# print \"Multi-Byte Next Hop For\",hex(obyte),opdesc[0]\ntabdesc = all_tables[nexttable]\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/opcode86.py",
"new_path": "envi/archs/i386/opcode86.py",
"diff": "from envi.archs.i386.opconst import *\nimport regs as e_i386_regs\n\"\"\"\n-(optable, optype, operand 0, operand 1, operand 2, CPU required, \"opcodenane\", op0Register, op1Register, op2Register)\n+(optable, optype, operand 0, operand 1, operand 2, CPU required, \"opcodename\", op0Register, op1Register, op2Register)\n\"\"\"\ntbl32_Main = [\n(0, INS_ADD, ADDRMETH_E | OPTYPE_b | OP_W, ADDRMETH_G | OPTYPE_b | OP_R, ARG_NONE, cpu_80386, \"add\", 0, 0, 0),\n@@ -2714,37 +2714,37 @@ tbl32_fpuDF_00BF = [\n\"\"\"\ntbl32_fpuDF_rest = [\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 ),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80387, 0, 0, 0, 0, 0),\n(0, INS_FPU, OP_REG, ARG_NONE, ARG_NONE, cpu_80387, \"fstsw\", e_i386_regs.REG_AX, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0),\n(0, 0, ARG_NONE, ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0),\n@@ -2776,10 +2776,13 @@ tbl32_fpuDF_rest = [\n(0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0),\n(0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0),\n(0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0),\n-( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0 )]\n+ (0,0,ARG_NONE,ARG_NONE,ARG_NONE,cpu_80387,0,0,0,0)\n+]\n-tbl_INVALID = [ ( 0,0,ARG_NONE,ARG_NONE,ARG_NONE,0,0,0,0,0 ) ]\n+tbl_INVALID = [\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0)\n+]\n\"\"\"\nThese values allow an opcode to be sliced and diced to make it fit correctly into the current lookup table.\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/cli.py",
"new_path": "envi/cli.py",
"diff": "@@ -30,6 +30,13 @@ def splitargs(cmdline):\nfor item in cmdline.split('\\n'):\nreturn [s.strip('\"') for s in patt.findall(item)]\n+def formatargs(args):\n+ ret = []\n+ subcmds = [args[i:i+5] for i in range(0, len(args), 5)]\n+ for cmdnames in subcmds:\n+ fmtstr = '{:15}' * len(cmdnames)\n+ yield fmtstr.format(*cmdnames)\n+\ndef columnstr(slist):\nmsize = 0\nfor s in slist:\n@@ -292,7 +299,7 @@ class EnviCli(Cmd):\nCmd.onecmd(self, line)\nexcept SystemExit:\nraise\n- except Exception, msg:\n+ except Exception as msg:\nif self.config.cli.verbose:\nself.vprint(traceback.format_exc())\nself.vprint(\"\\nERROR: (%s) %s\" % (msg.__class__.__name__, msg))\n@@ -307,19 +314,18 @@ class EnviCli(Cmd):\nself.basecmds.sort()\nself.vprint('\\nbasics:')\n- #self.vprint( self.columnize( self.basecmds ) )\n- self.columnize( self.basecmds )\n+ for line in formatargs(self.basecmds):\n+ self.vprint(line)\nsubsys = self.extsubsys.keys()\nsubsys.sort()\nfor sub in subsys:\nself.vprint('\\n%s:' % sub)\n-\ncmds = self.extsubsys.get(sub)\ncmds.sort()\n-\n- self.columnize(cmds)\n+ for line in formatargs(cmds):\n+ self.vprint(line)\nself.vprint('\\n')\n"
},
{
"change_type": "MODIFY",
"old_path": "vivbin",
"new_path": "vivbin",
"diff": "@@ -6,22 +6,23 @@ import cProfile\nimport argparse\nimport logging\n-logging.basicConfig(level=logging.DEBUG, format='%(asctime)s:%(levelname)s:%(name)s: %(message)s')\n-logger = logging.getLogger()\n-\nimport vivisect.cli as viv_cli\nimport envi.config as e_config\nimport envi.threads as e_threads\nimport vivisect.parsers as viv_parsers\n+logging.basicConfig(level=logging.DEBUG, format='%(asctime)s:%(levelname)s:%(name)s: %(message)s')\n+logger = logging.getLogger()\n+\nloglevels = (\nlogging.CRITICAL,\nlogging.ERROR,\nlogging.WARN,\nlogging.INFO,\n- logging.DEBUG,\n+ logging.DEBUG\n)\n+\ndef main():\nparser = argparse.ArgumentParser(prog='vivbin', usage='%(prog)s [options] <workspace|binaries...>')\nparser.add_argument('-M', '--module', dest='modname', default=None, action='store',\n@@ -53,21 +54,21 @@ def main():\nif args.option is not None:\nif args.option in ('-h', '?'):\n- print(vw.config.reprConfigPaths())\n+ logger.crtitical(vw.config.reprConfigPaths())\nsys.exit(-1)\ntry:\nvw.config.parseConfigOption(args.option)\nexcept e_config.ConfigNoAssignment as e:\n- print(vw.config.reprConfigPaths() + \"\\n\")\n- print(e)\n- print(\"syntax: \\t-O <secname>.<optname>=<optval> (optval must be json syntax)\")\n+ logger.critical(vw.config.reprConfigPaths() + \"\\n\")\n+ logger.critical(e)\n+ logger.critical(\"syntax: \\t-O <secname>.<optname>=<optval> (optval must be json syntax)\")\nsys.exit(-1)\nexcept Exception as e:\n- print(vw.config.reprConfigPaths())\n- print(\"With entry: %s\" % args.option)\n- print(e)\n+ logger.critical(vw.config.reprConfigPaths())\n+ logger.critical(\"With entry: %s\" % args.option)\n+ logger.critical(e)\nsys.exit(-1)\nif args.storage_name is not None:\n@@ -92,7 +93,7 @@ def main():\nvw.loadFromFile(fname, fmtname=args.parsemod)\nend = time.time()\n- print('Loaded (%.4f sec) %s' % (end - start, fname))\n+ logger.info('Loaded (%.4f sec) %s' % (end - start, fname))\nif args.bulk:\nif args.doanalyze:\n@@ -102,14 +103,14 @@ def main():\nstart = time.time()\nvw.analyze()\nend = time.time()\n- print(\"ANALYSIS TIME: %s\" % (end-start))\n+ logger.debug(\"ANALYSIS TIME: %s\" % (end-start))\nif args.modname is not None:\nmodule = imp.load_module(\"custom_analysis\", file(modname, \"rb\"), modname, ('.py', 'U', 1))\nmodule.analyze(vw)\n- print('stats: %r' % (vw.getStats(),))\n- print(\"Saving workspace: %s\" % (vw.getMeta('StorageName')))\n+ logger.info('stats: %r' % (vw.getStats(),))\n+ logger.info(\"Saving workspace: %s\" % (vw.getMeta('StorageName')))\nvw.saveWorkspace()\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -151,7 +151,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nreturn self.vprint(msg)\ndef vprint(self, msg):\n- print msg\n+ print(msg)\ndef getVivGui(self):\n'''\n@@ -338,7 +338,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\ndef getFuncAnalysisModuleNames(self):\nreturn list(self.fmodlist)\n- def addFunctionSignatureBytes(self, bytes, mask=None):\n+ def addFunctionSignatureBytes(self, bytez, mask=None):\n\"\"\"\nAdd a function signature entry by bytes. This is mostly used by\nfile parsers/loaders to manually tell the workspace about known\n@@ -346,8 +346,8 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nsee envi.bytesig for details.\n\"\"\"\n- self.sigtree.addSignature(bytes, mask)\n- self.siglist.append((bytes,mask))\n+ self.sigtree.addSignature(bytez, mask)\n+ self.siglist.append((bytez, mask))\ndef isFunctionSignature(self, va):\n\"\"\"\n@@ -425,7 +425,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\n\"\"\"\nAdd an analysis module by python import path\n\"\"\"\n- if self.amods.has_key(modname):\n+ if modname in self.amods:\nreturn\nmod = self.loadModule(modname)\nself.amods[modname] = mod\n@@ -435,10 +435,10 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\n\"\"\"\nRemove an analysis module from the list used during analysis()\n\"\"\"\n- if not self.amods.has_key(modname):\n+ if modname not in self.amods:\nraise Exception(\"Unknown Module in delAnalysisModule: %s\" % modname)\nx = self.amods.pop(modname, None)\n- if x != None:\n+ if x is not None:\nself.amodlist.remove(modname)\ndef loadModule(self, modname):\n@@ -451,7 +451,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nwill be triggered during the creation of a new function\n(makeFunction).\n\"\"\"\n- if self.fmods.has_key(modname):\n+ if modname in self.fmods:\nreturn\nmod = self.loadModule(modname)\nself.fmods[modname] = mod\n@@ -636,8 +636,10 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nCall this to ask any available analysis modules\nto do their thing...\n\"\"\"\n- if self.verbose: self.vprint('Beginning analysis...')\n- if self.verbose: self.vprint('...analyzing exports.')\n+ if self.verbose:\n+ self.vprint('Beginning analysis...')\n+ if self.verbose:\n+ self.vprint('...analyzing exports.')\nstarttime = time.time()\nfor eva in self.getEntryPoints():\n@@ -651,10 +653,11 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\n# true, they managed to change things and we should run again...\nfor mname in self.amodlist:\nmod = self.amods.get(mname)\n- if self.verbose: self.vprint(\"Extended Analysis: %s\" % mod.__name__)\n+ if self.verbose:\n+ self.vprint(\"Extended Analysis: %s\" % mod.__name__)\ntry:\nmod.analyze(self)\n- except Exception, e:\n+ except Exception as e:\nif self.verbose:\ntraceback.print_exc()\nself.verbprint(\"Extended Analysis Exception %s: %s\" % (mod.__name__, e))\n@@ -1063,11 +1066,6 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nval = self.parseNumber(ref, o.tsize)\nif (self.psize == o.tsize and self.isValidPointer(val)):\nself.makePointer(ref, tova=val)\n- # In some binaries, this can be a string as well (confirmed to happen in psexec 32/64)\n- elif self.detectUnicode(ref):\n- self.makeUnicode(ref)\n- elif self.detectString(ref):\n- self.makeString(ref)\nelse:\nself.makeNumber(ref, o.tsize)\n@@ -2135,18 +2133,18 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nimgbases[ fname ] = self.getFileMeta(fname,'imagebase')\nfor va,name in self.name_by_va.items():\n- map = self.getMemoryMap(va)\n- if map == None:\n+ mmap = self.getMemoryMap(va)\n+ if mmap is None:\ncontinue\n- symva = va - imgbases.get( map[3], va )\n+ symva = va - imgbases.get(mmap[3], va)\nif symva:\nsymtype = e_resolv.SYMSTOR_SYM_SYMBOL\nif self.isFunction(va):\nsymtype = e_resolv.SYMSTOR_SYM_FUNCTION\n- symsbyfile[ map[3] ].append( (symva, 0, name, symtype) )\n+ symsbyfile[mmap[3]].append((symva, 0, name, symtype))\nfor filenorm, symtups in symsbyfile.items():\nsymhash = self.getFileMeta(filenorm, 'SymbolCacheHash')\n@@ -2165,9 +2163,13 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nReturns the basename the file was given on load.\n\"\"\"\nmod = None\n- if fmtname == None:\n+ if fmtname is None:\nfmtname = viv_parsers.guessFormatFilename(filename)\n+ if fmtname == 'viv':\n+ self.loadWorkspace(filename)\n+ return self.normFileName(filename)\n+\nmod = viv_parsers.getParserModule(fmtname)\nfname = mod.parseFile(self, filename, baseaddr=baseaddr)\n@@ -2184,10 +2186,11 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nfrom the memory object's map at baseaddr.\n\"\"\"\nmod = None\n- if fmtname == None:\n- bytes = memobj.readMemory(baseaddr, 32)\n- fmtname = viv_parsers.guessFormat(bytes)\n+ if fmtname is None:\n+ bytez = memobj.readMemory(baseaddr, 32)\n+ fmtname = viv_parsers.guessFormat(bytez)\n+ # TODO: Load workspace from memory?\nmod = viv_parsers.getParserModule(fmtname)\nmod.parseMemory(self, memobj, baseaddr)\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/cli.py",
"new_path": "vivisect/cli.py",
"diff": "@@ -53,11 +53,11 @@ class VivCli(e_cli.EnviCli, vivisect.VivWorkspace):\nself.addScriptPathEnvVar('VIV_SCRIPT_PATH')\ndef getExpressionLocals(self):\n- l = e_cli.EnviCli.getExpressionLocals(self)\n- l['vw'] = self\n- l['vprint'] = self.vprint\n- l['vivisect'] = vivisect\n- return l\n+ locs = e_cli.EnviCli.getExpressionLocals(self)\n+ locs['vw'] = self\n+ locs['vprint'] = self.vprint\n+ locs['vivisect'] = vivisect\n+ return locs\ndef do_report(self, line):\n\"\"\"\n@@ -562,7 +562,7 @@ class VivCli(e_cli.EnviCli, vivisect.VivWorkspace):\nargv = e_cli.splitargs(line)\ntry:\nopts,args = getopt(argv, \"csup:S:\")\n- except Exception, e:\n+ except Exception as e:\nreturn self.do_help(\"make\")\nif len(args) != 1 or len(opts) != 1:\n@@ -633,7 +633,7 @@ class VivCli(e_cli.EnviCli, vivisect.VivWorkspace):\ntry:\nfva = self.parseExpression(argv[0])\n- except Exception, e:\n+ except Exception as e:\nself.vprint(\"Invalid Address Expression: %s\" % argv[0])\nreturn\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -135,14 +135,17 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nfor pgm in pgms:\nif pgm.p_type == Elf.PT_LOAD:\n- if vw.verbose: vw.vprint('Loading: %s' % (repr(pgm)))\n+ if vw.verbose:\n+ vw.vprint('Loading: %s' % (repr(pgm)))\nbytez = elf.readAtOffset(pgm.p_offset, pgm.p_filesz)\nbytez += \"\\x00\" * (pgm.p_memsz - pgm.p_filesz)\npva = pgm.p_vaddr\n- if addbase: pva += baseaddr\n+ if addbase:\n+ pva += baseaddr\nvw.addMemoryMap(pva, pgm.p_flags & 0x7, fname, bytez) # FIXME perms\nelse:\n- if vw.verbose: vw.vprint('Skipping: %s' % repr(pgm))\n+ if vw.verbose:\n+ vw.vprint('Skipping: %s' % repr(pgm))\nif len(pgms) == 0:\n# fall back to loading sections as best we can...\n@@ -227,7 +230,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nmakeRelocTable(vw, sva, sva+size, addbase, baseaddr)\nif sec.sh_flags & Elf.SHF_STRINGS:\n- print \"FIXME HANDLE SHF STRINGS\"\n+ print(\"FIXME HANDLE SHF STRINGS\")\n# Let pyelf do all the stupid string parsing...\nfor r in elf.getRelocs():\n@@ -279,14 +282,14 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\ntry:\nvw.addExport(sva, EXP_FUNCTION, s.name, fname)\nvw.addEntryPoint(sva)\n- except Exception, e:\n+ except Exception as e:\nvw.vprint('addExport Failure: %s' % e)\nelif stype == Elf.STT_OBJECT:\nif vw.isValidPointer(sva):\ntry:\nvw.addExport(sva, EXP_DATA, s.name, fname)\n- except Exception, e:\n+ except Exception as e:\nvw.vprint('WARNING: %s' % e)\nelif stype == Elf.STT_HIOS:\n@@ -298,7 +301,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\ntry:\nvw.addExport(sva, EXP_FUNCTION, s.name, fname)\nvw.addEntryPoint(sva)\n- except Exception, e:\n+ except Exception as e:\nvw.vprint('WARNING: %s' % e)\nelif stype == 14:# OMG WTF FUCK ALL THIS NONSENSE! FIXME\n@@ -309,7 +312,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nif vw.isValidPointer(sva):\ntry:\nvw.addExport(sva, EXP_DATA, s.name, fname)\n- except Exception, e:\n+ except Exception as e:\nvw.vprint('WARNING: %s' % e)\nelse:\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/qt/main.py",
"new_path": "vivisect/qt/main.py",
"diff": "@@ -116,7 +116,7 @@ class VQVivMainWindow(viv_base.VivEventDist, vq_app.VQMainCmdWindow):\nself.vw.vprint('Location not found!')\nelse:\nname = loc_type_names.get(loctup[L_LTYPE], 'Unspecified')\n- self.vw.vprint('VA: %s' % hex(loctup[L_VA]))\n+ self.vw.vprint('\\nVA: %s' % hex(loctup[L_VA]))\nself.vw.vprint(' Size: %d' % loctup[L_SIZE])\nself.vw.vprint(' Type: %s' % name)\nself.vw.vprint(' Info: %s' % str(loctup[L_TINFO]))\n@@ -338,6 +338,9 @@ class VQVivMainWindow(viv_base.VivEventDist, vq_app.VQMainCmdWindow):\nself.vqBuildDockWidget('VivSymbolikFuncPane', area=QtCore.Qt.TopDockWidgetArea)\ndef _menuFileOpen(self):\n+ # TODO: Add something to change the workspace storage name,\n+ # and also to list the currently loaded files\n+ # Right now it'll successively create storage files\nfname = getOpenFileName(self, 'Open...')\nif fname is None or not len(fname):\nreturn\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/testvivisect.py",
"new_path": "vivisect/tests/testvivisect.py",
"diff": "@@ -49,7 +49,6 @@ class VivisectTest(unittest.TestCase):\nansnodes = ansfgraph.nodes.keys()\nself.assertEqual(sorted(vwnodes), sorted(ansnodes))\n-\ndef getAndTestWorkspace(self, fname):\nvw = getTestWorkspace(fname)\nans = getAnsWorkspace(fname)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Add being able to load workspace in loadFromFile. Flake8 and py3 compat
|
718,765 |
29.04.2019 16:20:09
| 14,400 |
2624ae1b0b21bd7e148be2fc96144401f39ca92a
|
Decided to cut features off of this branch. It's growing out of control
|
[
{
"change_type": "MODIFY",
"old_path": ".coveragerc",
"new_path": ".coveragerc",
"diff": "@@ -18,6 +18,7 @@ omit =\n*/vivisect/tests/helpers.py\n*/vivisect/tests/vivbins.py\n*/vivisect/tests/samplecode.py\n+ */vivisect/BP*\n*/vtrace/tests/*\n*/envi/test_*\n*/envi/tests/*\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -1064,6 +1064,9 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\noffset, _ = self.getByteDef(ref)\nval = self.parseNumber(ref, o.tsize)\n+ # So we need the size check to avoid things like \"aaaaa\", maybe\n+ # but maybe if we do something like the tsize must be either the\n+ # target pointer size or in a set of them that the arch defines?\nif (self.psize == o.tsize and self.isValidPointer(val)):\nself.makePointer(ref, tova=val)\nelse:\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/base.py",
"new_path": "vivisect/base.py",
"diff": "@@ -673,7 +673,8 @@ def trackDynBranches(cfctx, op, vw, bflags, branches):\nif len(vw.getXrefsFrom(op.va)):\nreturn\n- if vw.verbose: print \"Dynamic Branch found at 0x%x %s\" % (op.va, op)\n+ if vw.verbose:\n+ print(\"Dynamic Branch found at 0x%x %s\" % (op.va, op))\nvw.setVaSetRow('DynamicBranches', (op.va, repr(op), bflags))\nclass VivCodeFlowContext(e_codeflow.CodeFlowContext):\n@@ -701,7 +702,7 @@ class VivCodeFlowContext(e_codeflow.CodeFlowContext):\ndef _cb_opcode(self, va, op, branches):\nloc = self._mem.getLocation(va)\n- if loc == None:\n+ if loc is None:\n# dont code flow through import calls\nbranches = [br for br in branches if not self._mem.isLocType(br[0],LOC_IMPORT)]\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/qt/views.py",
"new_path": "vivisect/qt/views.py",
"diff": "@@ -268,9 +268,9 @@ class VQVivFunctionsView(VQVivTreeView):\ndef vivAddFunction(self, fva):\nsize = self.vw.getFunctionMeta(fva, \"Size\", -1)\n- fname = self.vw.getName(fva)\n+ funcname = self.vw.getName(fva)\nxcount = len(self.vw.getXrefsTo(fva))\n- self.vivAddRow(fva, fname, '0x%.8x' % fva, size, xcount)\n+ self.vivAddRow(fva, funcname, '0x%.8x' % fva, size, xcount)\ndef VWE_ADDXREF(self, vw, event, einfo):\nfromva, tova, rtype, rflag = einfo\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Decided to cut features off of this branch. It's growing out of control
|
718,765 |
14.05.2019 16:01:55
| 14,400 |
8c3799425593f8a51975021250fd7e398cb4f987
|
Fix py2 compat, and typos in requirements.txt
|
[
{
"change_type": "MODIFY",
"old_path": "requirements.txt",
"new_path": "requirements.txt",
"diff": "-pyasn1=0.4.5\n-pyans1-modules=0.2.4\n+pyasn1==0.4.5\n+pyasn1-modules==0.2.4\ncxxfilt\nmsgpack\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -926,7 +926,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nemu.setEmulationMonitor(wat)\ntry:\nemu.runFunction(va, maxhit=1)\n- except Exception, e:\n+ except Exception as e:\nreturn False\nif wat.looksgood():\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Fix py2 compat, and typos in requirements.txt
|
718,765 |
14.05.2019 16:02:59
| 14,400 |
8096d901c6237066e5d6badddbb938d5e6a4749e
|
Fix decoding issues where we either didn't have the instruction, or when it would decode, it'd improperly consume bytes
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/disasm.py",
"new_path": "envi/archs/i386/disasm.py",
"diff": "@@ -635,6 +635,7 @@ class i386Disasm:\nself._dis_amethods[opcode86.ADDRMETH_C>>16] = self.ameth_c\nself._dis_amethods[opcode86.ADDRMETH_D>>16] = self.ameth_d\nself._dis_amethods[opcode86.ADDRMETH_E>>16] = self.ameth_e\n+ self._dis_amethods[opcode86.ADDRMETH_L>>16] = self.ameth_l\nself._dis_amethods[opcode86.ADDRMETH_M>>16] = self.ameth_e\nself._dis_amethods[opcode86.ADDRMETH_N>>16] = self.ameth_n\nself._dis_amethods[opcode86.ADDRMETH_Q>>16] = self.ameth_q\n@@ -835,12 +836,10 @@ class i386Disasm:\n#pdone = False\nwhile True:\n-\nobyte = ord(bytez[offset])\n-\n#print(\"OBYTE\", hex(obyte))\nif (obyte > tabdesc[4]):\n- # print \"Jumping To Overflow Table:\", tabdesc[5]\n+ #print(\"Jumping To Overflow Table: %s\" % repr(tabdesc[5]))\ntabdesc = all_tables[tabdesc[5]]\ntabidx = ((obyte - tabdesc[3]) >> tabdesc[1]) & tabdesc[2]\n@@ -852,12 +851,14 @@ class i386Disasm:\nnexttable = opdesc[0]\n#print(\"NEXT\",nexttable,hex(obyte))\nif nexttable != 0: # If we have a sub-table specified, use it.\n- # print \"Multi-Byte Next Hop For\",hex(obyte),opdesc[0]\n+ #print(\"Multi-Byte Next Hop For %s: %s\" % (hex(obyte),repr(opdesc[0])))\n+ #print(\"Jumping to table %d\" % nexttable)\ntabdesc = all_tables[nexttable]\n# In the case of 66 0f, the next table is *already* assuming we ate\n# the 66 *and* the 0f... oblidge them.\nif obyte == 0x66 and ord(bytez[offset+1]) == 0x0f:\n+ # print(\"Jumping another byte set for 660F\")\noffset += 1\n# Account for the table jump we made\n@@ -868,6 +869,7 @@ class i386Disasm:\n# We are now on the final table...\n# print(repr(opdesc))\nmnem = opdesc[6]\n+ # print(mnem)\noptype = opdesc[1]\nif tabdesc[2] == 0xff:\noffset += 1 # For our final opcode byte\n@@ -1036,6 +1038,10 @@ class i386Disasm:\nmod, reg, rm = self.parse_modrm(ord(bytez[offset]))\nreturn (0, i386RegOper(reg+self.ROFFSETSIMD, tsize))\n+ def ameth_l(self, bytez, offset, tsize, prefixes, operflags):\n+ mod, reg, rm = self.parse_modrm(ord(bytez[offset]))\n+ return (1, i386RegOper(rm+self.ROFFSETSIMD, tsize))\n+\ndef ameth_x(self, bytez, offset, tsize, prefixes, operflags):\n#FIXME this needs the DS over-ride, but is only for outsb which we don't support\nreturn (0, i386RegMemOper(REG_ESI, tsize))\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/opcode86.py",
"new_path": "envi/archs/i386/opcode86.py",
"diff": "@@ -347,9 +347,9 @@ tbl32_0F = [\n(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"sysexit\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0), # 3-byte escape 28\n+(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0), # 3-byte escape 38\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0), # 3-byte escape 2a\n+(57, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0), # 3-byte escape 3a\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n@@ -421,7 +421,7 @@ tbl32_0F = [\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-( 0, INS_MOV, ADDRMETH_E | OPTYPE_d | OP_W, ADDRMETH_P | OPTYPE_d | OP_R, ARG_NONE, cpu_PENTMMX, \"movd\", 0, 0, 0),\n+( 0, INS_MOV, ADDRMETH_Q | OPTYPE_d | OP_W, ADDRMETH_P | OPTYPE_d | OP_R, ARG_NONE, cpu_PENTMMX, \"movd\", 0, 0, 0),\n( 0, INS_MOV, ADDRMETH_Q | OPTYPE_q | OP_W, ADDRMETH_P | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"movq\", 0, 0, 0),\n# 0f80\n( 0, INS_BRANCHCC, ADDRMETH_J | OPTYPE_z | OP_X, ARG_NONE, ARG_NONE, cpu_80386, \"jo\", 0, 0, 0),\n@@ -525,7 +525,7 @@ tbl32_0F = [\n(0, INS_ADD, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"paddusw\", 0, 0, 0),\n(0, INS_ARITH, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"pmaxub\", 0, 0, 0),\n(0, INS_AND, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"pandn\", 0, 0, 0),\n-# 0ff0\n+# 0fe0\n(0, INS_OTHER, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"pavgb\", 0, 0, 0),\n(0, INS_OTHER, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"psraw\", 0, 0, 0),\n(0, INS_OTHER, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"psrad\", 0, 0, 0),\n@@ -620,9 +620,9 @@ tbl32_660F = [\n(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"sysexit\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0), # 3-byte escape 28\n+(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0), # 3-byte escape 38\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0), # 3-byte escape 2a\n+(58, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0), # 3-byte escape 3a\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n@@ -678,8 +678,8 @@ tbl32_660F = [\n( 0, INS_MOV, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_E | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"movd\", 0, 0, 0), #\n( 0, INS_MOV, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_E | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"movq\", 0, 0, 0), # FIXME HORKED\n( 0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ADDRMETH_I | OPTYPE_b | OP_R, cpu_PENTIUM2, \"pshufd\", 0, 0, 0), #\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTMMX, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTMMX, 0, 0, 0, 0),\n+(59, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTMMX, 0, 0, 0, 0),\n+(60, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTMMX, 0, 0, 0, 0),\n(54, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTMMX, 0, 0, 0, 0), # 66 0f 73\n( 0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"pcmpeqb\", 0, 0, 0), #\n( 0, INS_CMP, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"pcmpeqw\", 0, 0, 0), #\n@@ -1217,8 +1217,8 @@ tbl32_F30F = [\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-( 0, INS_MOV, ADDRMETH_E | OPTYPE_d | OP_W, ADDRMETH_P | OPTYPE_d | OP_R, ARG_NONE, cpu_PENTMMX, \"movd\", 0, 0, 0),\n-( 0, INS_MOV, ADDRMETH_Q | OPTYPE_q | OP_W, ADDRMETH_P | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"movq\", 0, 0, 0),\n+ ( 0, INS_MOV, ADDRMETH_V | OPTYPE_q | OP_W, ADDRMETH_W | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"movq\", 0, 0, 0),\n+ ( 0, INS_MOV, ADDRMETH_Q | OPTYPE_q | OP_W, ADDRMETH_P | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"movqdu\", 0, 0, 0),\n( 0, INS_BRANCHCC, ADDRMETH_J | OPTYPE_z | OP_X, ARG_NONE, ARG_NONE, cpu_80386, \"jo\", 0, 0, 0),\n( 0, INS_BRANCHCC, ADDRMETH_J | OPTYPE_z | OP_X, ARG_NONE, ARG_NONE, cpu_80386, \"jno\", 0, 0, 0),\n( 0, INS_BRANCHCC, ADDRMETH_J | OPTYPE_z | OP_X, ARG_NONE, ARG_NONE, cpu_80386, \"jc\", 0, 0, 0),\n@@ -1439,7 +1439,7 @@ tbl32_0F01_rest = [\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n( 0, INS_SYSTEM, ADDRMETH_E | OPTYPE_w | OP_W, ARG_NONE, ARG_NONE, cpu_80386, \"lmsw\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM, \"rdtscp\", 0, 0, 0), # TODO\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n@@ -1634,6 +1634,35 @@ tbl32_0F73 = [\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0)\n]\n+\"\"\"\n+(optable, optype, operand 0, operand 1, operand 2, CPU required, \"opcodename\", op0Register, op1Register, op2Register)\n+\"\"\"\n+tbl32_660F71 = [\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_L | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlw\", 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_L | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psraw\", 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_L | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psllw\", 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0)\n+]\n+\n+\n+\"\"\"\n+(optable, optype, operand 0, operand 1, operand 2, CPU required, \"opcodename\", op0Register, op1Register, op2Register)\n+\"\"\"\n+tbl32_660F72 = [\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_L | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrld\", 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_L | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrad\", 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_L | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"pslld\", 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0)\n+]\n+\n\"\"\"\n(optable, optype, operand 0, operand 1, operand 2, CPU required, \"opcodename\", op0Register, op1Register, op2Register)\n\"\"\"\n@@ -1641,15 +1670,12 @@ tbl32_0F73 = [\ntbl32_660F73 = [\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-#( 0, INS_OTHER, ADDRMETH_V | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlq\", 0, 0, 0),\n-( 0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlq\", 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_L | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlq\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-#(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0 ),\n-#(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0 )\n-(0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psllq\", 0, 0, 0),\n-(0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psldq\", 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_L | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psllq\", 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_L | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psldq\", 0, 0, 0),\n]\n\"\"\"\n@@ -2861,6 +2887,8 @@ tables86=[\n(tbl32_660F38, 0, 0xff, 0, 0xff), # 56 - unused at present\n(tbl32_0F3A, 0, 0xff, 0, 0xff), # 57\n(tbl32_660F3A, 0, 0xff, 0, 0xff), # 58 - unused at present\n+ (tbl32_660F71, 3, 0x7, 0, 0xff), # 59\n+ (tbl32_660F72, 3, 0x7, 0, 0xff), # 60\n]\nregs=[\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/opconst.py",
"new_path": "envi/archs/i386/opconst.py",
"diff": "@@ -14,7 +14,7 @@ ADDRMETH_G = 0x00070000 # MODRM byte defines general-purpose reg\nADDRMETH_H = 0x00080000 # VEX.vvvv field selects 128bit XMM or 256bit YMM register\nADDRMETH_I = 0x00090000 # Immediate data follows\nADDRMETH_J = 0x000A0000 # Immediate value is relative to EIP\n-ADDRMETH_L = 0x000B0000\n+ADDRMETH_L = 0x000B0000 # MODRM rm field (not reg field) defines an XMM register, and reg defines ext\nADDRMETH_M = 0x000C0000 # MODRM mod field can refer only to memory\nADDRMETH_N = 0x000D0000 # R/M field of MODRM selects a packed-quadword, MMX register\nADDRMETH_O = 0x000E0000 # Displacement follows (without modrm/sib)\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_i386.py",
"new_path": "envi/tests/test_arch_i386.py",
"diff": "import envi\n-import envi.memory as e_mem\nimport envi.memcanvas as e_memcanvas\n-import envi.memcanvas.renderers as e_rend\n-import envi.archs.i386 as e_i386\nimport vivisect\n-import platform\nimport unittest\n# name, bytes, va, repr, txtRender\ni386SingleByteOpcodes = [\n('add', '0001', 0x40, 'add byte [ecx],al', 'add byte [ecx],al'),\n+ ('adc', '83D306', 0x40, 'adc ebx,6', 'adc ebx,6'),\n('jg', '7faa', 0x400, 'jg 0x000003ac', 'jg 0x000003ac'),\n('rep movsb', 'f3a4', 0x40, 'rep: movsb ', 'rep: movsb '),\n('mov al', 'b0aa', 0x40, 'mov al,170', 'mov al,170'),\n@@ -21,9 +18,21 @@ i386SingleByteOpcodes = [\n('imul 1', 'f6aaaaaaaaaa', 0x40, 'imul al,byte [edx - 1431655766]', 'imul al,byte [edx - 1431655766]'),\n('imul 2', 'f7aaaaaaaaaa', 0x40, 'imul eax,dword [edx - 1431655766]', 'imul eax,dword [edx - 1431655766]'),\n('push', 'fff0', 0x40, 'push eax', 'push eax'),\n+ ('nop 1', '90', 0x40, 'nop ', 'nop '),\n+ ('nop 2', '0f1fc0', 0x40, 'nop eax', 'nop eax'),\n+ ('nop 3', 'f30f1fc0', 0x40, 'rep: nop eax', 'rep: nop eax'),\n('pop', '8ff0', 0x40, 'pop eax', 'pop eax'),\n('pop', '8ffb', 0x40, 'pop ebx', 'pop ebx'),\n+ ('BSWAP (eax)', '0fc84141', 0x40, 'bswap eax', 'bswap eax'),\n+ ('BSWAP (ebx)', '0fcb4141', 0x40, 'bswap ebx', 'bswap ebx'),\n+ ('BSWAP (eax)', 'f30fc84141', 0x40, 'rep: bswap eax', 'rep: bswap eax'),\n+ ('BSWAP (ebx)', 'f30fcb4141', 0x40, 'rep: bswap ebx', 'rep: bswap ebx'),\n+ ('setg (al)', '0f9fc0', 0x40, 'setg al', 'setg al'),\n+ ('setg (dl)', '0f9fc2', 0x40, 'setg dl', 'setg dl'),\n+ ('rep setg (al)', 'f30f9fc0', 0x40, 'rep: setg al', 'rep: setg al'),\n+ ('rep setg (dl)', 'f30f9fc2', 0x40, 'rep: setg dl', 'rep: setg dl'),\n]\n+\ni386MultiByteOpcodes = [\n('CVTTPS2PI', '0f2caaaaaaaa41', 0x40, 'cvttps2pi qword [edx + 1101703850],oword [edx + 1101703850]', 'cvttps2pi qword [edx + 1101703850],oword [edx + 1101703850]'),\n('CVTTSS2SI', 'f30f2caaaaaaaa41', 0x40, 'rep: cvttps2pi qword [edx + 1101703850],oword [edx + 1101703850]', 'rep: cvttps2pi qword [edx + 1101703850],oword [edx + 1101703850]'),\n@@ -34,11 +43,42 @@ i386MultiByteOpcodes = [\n('MOVAPD', '660f28aa41414141', 0x40, 'movapd xmm5,oword [edx + 1094795585]', 'movapd xmm5,oword [edx + 1094795585]'),\n('PMULLW (66)', '660faa41414141', 0x40, 'rsm ', 'rsm '),\n('CMPXCH8B', '0fc70a', 0x40, 'cmpxch8b qword [edx]', 'cmpxch8b qword [edx]'),\n- ('PSRLDQ (66)', '660f73faaa4141', 0x40, 'psldq xmm7,250', 'psldq xmm7,250'),\n- ('PSRLDQ (66)', '660f73b5aa4141', 0x40, 'psllq xmm6,181', 'psllq xmm6,181'),\n- ('PSRLDQ (66)', '660f73b1aa4141', 0x40, 'psllq xmm6,177', 'psllq xmm6,177'),\n- ('PSRLDQ (66)', '660f73b9aa4141', 0x40, 'psldq xmm7,185', 'psldq xmm7,185'),\n+ ('MOVD (66)', '660f7ecb414141', 0x40, 'movd ebx,xmm1', 'movd ebx,xmm1'),\n+ ('MOVD', '0F6E0D41414100', 0x40, 'movd mm1,dword [0x00414141]', 'movd mm1,dword [0x00414141]'),\n+ ('MOVQ', '0F6FCB', 0x40, 'movq mm1,mm3', 'movq mm1,mm3'),\n+ ('PSRAW', '0FE1CA4141', 0x40, 'psraw mm1,mm2', 'psraw mm1,mm2'),\n+ ('PSRLQ (66)', '660FF3CB4141', 0x40, 'psllq xmm1,xmm3', 'psllq xmm1,xmm3'),\n+ ('PALIGNR', '0F3A0FDC03', 0x40, 'palignr xmm3,xmm4,3', 'palignr xmm3,xmm4,3'),\n+ ('PALIGNR (66)', '660F3A0FCA07', 0x40, 'palignr xmm1,xmm2,7', 'palignr xmm1,xmm2,7'),\n+ ('PSLLQ (reg)', '660FF3CA', 0x40, 'psllq xmm1,xmm2', 'psllq xmm1,xmm2'),\n+ ('PSLLW (regs)', '0F71F108', 0x40, 'psllw mm1,8', 'psllw mm1,8'),\n+ ('PSLLQ (66)', '660F73F108', 0x40, 'psllq xmm1,8', 'psllq xmm1,8'),\n+ ('PSRLW (66)', '660F71D611', 0x40, 'psrlw xmm6,17', 'psrlw xmm6,17'),\n+ ('PSRAD (66)', '660F72E704', 0x40, 'psrad xmm7,4', 'psrad xmm7,4'),\n+ ('PSRLQ (66)', '660F73D308', 0x40, 'psrlq xmm3,8', 'psrlq xmm3,8'),\n+ ('PSRAW (66)', '660F71E1084141', 0x40, 'psraw xmm1,8', 'psraw xmm1,8'),\n+ ('PSRLDQ (66)', '660f73faaa4141', 0x40, 'psldq xmm2,170', 'psldq xmm2,170'),\n+\n+ # Because of how the MODRM Bytes are set, these map to the same instruction\n+ # TODO: Would these be the same to a real x86 chip?\n+ ('PSRLDQ (66)', '660f73b5aa4141', 0x40, 'psllq xmm5,170', 'psllq xmm5,170'),\n+ ('PSRLDQ (66)', '660f73f5aa4141', 0x40, 'psllq xmm5,170', 'psllq xmm5,170'),\n+\n+ # Same for these\n+ ('PSRLDQ (66)', '660f73b1aa4141', 0x40, 'psllq xmm1,170', 'psllq xmm1,170'),\n+ ('PSRLDQ (66)', '660f73b9aa4141', 0x40, 'psldq xmm1,170', 'psldq xmm1,170'),\n+\n+\n+ # Dang it. movdqu and rep: movq are literalally the same bytes, and movdqu should win out, but it doesn't\n+ # because we have no mechanism to override the bytes after we decoding the instruction.\n+ # ('MOVQ', 'F30F7ECB', 0x40, 'movq xmm1,xmm3', 'movq xmm1,xmm3'),\n+ # ('MOVQ (F3)', 'F30F7E0D41414100', 0x40, 'movq xmm1,qword [0x00414141]', 'movq xmm1,qword [0x00414141]'),\n+ # ('MOVDQU', 'F30F6FCA', 0x40, 'movdqu xmm1,xmm2', 'movdqu xmm1, xmm2'),\n+ # ('MOVDQU (REP)', 'F3F30F6FCA', 0x40, 'rep: movdqu xmm1,xmm2', 'rep: movdqu xmm1, xmm2'),\n+\n]\n+\n+\nclass i386InstructionSet(unittest.TestCase):\n_arch = envi.getArchModule(\"i386\")\n@@ -46,38 +86,36 @@ class i386InstructionSet(unittest.TestCase):\n'''\npick 10 arbitrary 1-byte-operands\n'''\n- mem = e_mem.IMemory()\nvw = vivisect.VivWorkspace()\nscanv = e_memcanvas.StringMemoryCanvas(vw)\nfor name, bytez, va, reprOp, renderOp in i386SingleByteOpcodes:\nop = self._arch.archParseOpcode(bytez.decode('hex'), 0, va)\n- #print \"'%s', 0x%x, '%s' == '%s'\" % (bytez, va, repr(op), reprOp)\n+ # print(\"'%s', 0x%x, '%s' == '%s'\" % (bytez, va, repr(op), reprOp))\nself.assertEqual(repr(op), reprOp)\nscanv.clearCanvas()\nop.render(scanv)\n- #print \"render: %s\" % repr(scanv.strval)\n+ # print(\"render: %s\" % repr(scanv.strval))\nself.assertEqual(scanv.strval, renderOp)\ndef test_envi_i386_disasm_Specific_MultiByte_Instrs(self):\n'''\npick 10 arbitrary 2- and 3-byte operands\n'''\n- mem = e_mem.IMemory()\nvw = vivisect.VivWorkspace()\nscanv = e_memcanvas.StringMemoryCanvas(vw)\nfor name, bytez, va, reprOp, renderOp in i386MultiByteOpcodes:\nop = self._arch.archParseOpcode(bytez.decode('hex'), 0, va)\n- #print \"'%s', 0x%x, '%s' == '%s'\" % (bytez, va, repr(op), reprOp)\n+ # print(\"'%s', 0x%x, '%s' == '%s'\" % (bytez, va, repr(op), reprOp))\nself.assertEqual(repr(op), reprOp)\nscanv.clearCanvas()\nop.render(scanv)\n- #print \"render: %s\" % repr(scanv.strval)\n+ # print(\"render: %s\" % repr(scanv.strval))\nself.assertEqual(scanv.strval, renderOp)\n'''\ndef test_envi_i386_disasm_A(self):\n@@ -96,6 +134,8 @@ class i386InstructionSet(unittest.TestCase):\npass\ndef test_envi_i386_disasm_J(self):\npass\n+ def test_envi_i386_disasm_L(self):\n+ pass\ndef test_envi_i386_disasm_M(self):\npass\ndef test_envi_i386_disasm_N(self):\n@@ -263,4 +303,3 @@ class i386InstructionSet(unittest.TestCase):\nopcheck = {'iflags': 65536, 'va': 16384, 'repr': None, 'prefixes': 0, 'mnem': 'cvttps2pi', 'opcode': 61440}\nopercheck = [{'disp': -287454021, 'tsize': 8, '_is_deref': True, 'reg': 2}, {'disp': -287454021, 'tsize': 16, '_is_deref': True, 'reg': 2}]\nself.checkOpcode(opbytez, 0x4000, oprepr, opcheck, opercheck, oprepr)\n-\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Fix decoding issues where we either didn't have the instruction, or when it would decode, it'd improperly consume bytes
|
718,765 |
15.05.2019 12:49:25
| 14,400 |
177cef2cfd770e1cb2cf0765d7886abddc350ee0
|
Add more opcodes and fix a fix things in the amd64 one. And port the tests over to amd64 to know that we got something working there. Still a few to fix in amd64 though.
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/amd64/opcode64.py",
"new_path": "envi/archs/amd64/opcode64.py",
"diff": "@@ -882,7 +882,7 @@ tbl32_F30F[0xae] = (TBL_F30FAE_00BF, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)\ntbl32_F30F[0xc2] = ( 0, INS_CMP, ADDRMETH_V | OPTYPE_ss | OP_W, ADDRMETH_H | OPTYPE_ss | OP_R, ADDRMETH_W | OPTYPE_ss | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, cpu_PENTIUM2, \"cmpss\", 0, 0, 0)\ntbl32_F30F[0xc7] = (TBL_F30FC7_00BF, 0, 0, 0, 0, ARG_NONE, cpu_PENTMMX, 0, 0, 0, 0) # group 9\ntbl32_F30F[0xd6] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_N | OPTYPE_q | OP_R, ARG_NONE, ARG_NONE, cpu_PENTMMX, \"movq2dq\", 0, 0, 0)\n-tbl32_F30F[0xe6] = ( 0, INS_MUL, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ARG_NONE, ARG_NONE, cpu_PENTMMX, \"cvtdq2pd\", 0, 0, 0)\n+tbl32_F30F[0xe6] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ARG_NONE, ARG_NONE, cpu_PENTMMX, \"cvtdq2pd\", 0, 0, 0)\ntbl32_F2660F = list( tbl32_660F ) # it seems that 66 trumps F2, so if we don't have a combination specifically for F266, default to 66's\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/opcode86.py",
"new_path": "envi/archs/i386/opcode86.py",
"diff": "@@ -620,7 +620,7 @@ tbl32_660F = [\n(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"sysexit\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0), # 3-byte escape 38\n+(56, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0), # 3-byte escape 38\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(58, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0), # 3-byte escape 3a\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n@@ -1321,7 +1321,7 @@ tbl32_F30F = [\n( 0, INS_OTHER, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"pavgw\", 0, 0, 0),\n( 0, INS_MUL, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"pmulhuw\", 0, 0, 0),\n( 0, INS_MUL, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"pmulhw\", 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ARG_NONE, ARG_NONE, cpu_PENTMMX, \"cvtdq2pd\", 0, 0, 0), # Horked due to how we do prefixes\n( 0, INS_MOV, ADDRMETH_M | OPTYPE_dq | OP_W, ADDRMETH_V | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"movntq\", 0, 0, 0),\n( 0, INS_SUB, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"psubsb\", 0, 0, 0),\n( 0, INS_SUB, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"psubsw\", 0, 0, 0),\n@@ -1569,26 +1569,9 @@ tbl32_0F3A = [\n\"\"\"\n(optable, optype, operand 0, operand 1, operand 2, CPU required, \"opcodename\", op0Register, op1Register, op2Register)\n\"\"\"\n-tbl32_660F3A = [\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ADDRMETH_I | OPTYPE_b | OP_R, cpu_PENTIUM2, \"palignr\", 0, 0, 0),\n-] # more available upon request!\n-\n-\n+tbl32_660F3A = [(0, 0, 0, 0, 0, 0, 0, 0, 0, 0) for x in range(100)]\n+tbl32_660F3A[0x0F] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ADDRMETH_I | OPTYPE_b | OP_R, cpu_PENTIUM2, \"palignr\", 0, 0, 0)\n+tbl32_660F3A[0x63] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_R, ADDRMETH_W | OPTYPE_dq | OP_R, ADDRMETH_I | OPTYPE_b | OP_R, cpu_PENTMMX, \"pcmpistri\", 0, 0, 0)\n\"\"\"\n(optable, optype, operand 0, operand 1, operand 2, CPU required, \"opcodename\", op0Register, op1Register, op2Register)\n@@ -1671,7 +1654,7 @@ tbl32_660F73 = [\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, INS_OTHER, ADDRMETH_L | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlq\", 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_L | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrldq\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, INS_OTHER, ADDRMETH_L | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psllq\", 0, 0, 0),\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_amd64.py",
"new_path": "envi/tests/test_arch_amd64.py",
"diff": "@@ -20,6 +20,7 @@ instrs = [\n(\"4585f6\", 0x456000, 'test r14d,r14d'),\n]\n+\nclass Amd64InstrTest(unittest.TestCase):\ndef test_envi_amd64_assorted_instrs(self):\nglobal instrs\n@@ -29,7 +30,7 @@ class Amd64InstrTest(unittest.TestCase):\nfor bytez, va, reprOp in instrs:\nop = archmod.archParseOpcode(bytez.decode('hex'), 0, va)\nif repr(op).replace(' ', '') != reprOp.replace(' ', ''):\n- raise Exception(\"FAILED to decode instr: %.8x %s - should be: %s - is: %s\" % \\\n+ raise Exception(\"FAILED to decode instr: %.8x %s - should be: %s - is: %s\" %\n(va, bytez, reprOp, repr(op)))\n#FIXME: test emuluation as well.\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_i386.py",
"new_path": "envi/tests/test_arch_i386.py",
"diff": "@@ -68,6 +68,9 @@ i386MultiByteOpcodes = [\n('PSRLDQ (66)', '660f73b1aa4141', 0x40, 'psllq xmm1,170', 'psllq xmm1,170'),\n('PSRLDQ (66)', '660f73b9aa4141', 0x40, 'psldq xmm1,170', 'psldq xmm1,170'),\n+ ('PCMPISTRI', '660f3a630f0d', 0x40, 'pcmpistri xmm1,oword [edi],13', 'pcmpistri xmm1,oword [edi],13'),\n+ ('PSHUFB', '660F3800EF', 0x40, 'pshufb xmm5,xmm7', 'pshufb xmm5,xmm7'),\n+ # ('CVTDQ2PD', 'f30fe6c0', 0x40, 'cvtdq2pd xmm0,xmm0', 'cvtdq2pd xmm0,xmm0'),\n# Dang it. movdqu and rep: movq are literalally the same bytes, and movdqu should win out, but it doesn't\n# because we have no mechanism to override the bytes after we decoding the instruction.\n@@ -75,7 +78,6 @@ i386MultiByteOpcodes = [\n# ('MOVQ (F3)', 'F30F7E0D41414100', 0x40, 'movq xmm1,qword [0x00414141]', 'movq xmm1,qword [0x00414141]'),\n# ('MOVDQU', 'F30F6FCA', 0x40, 'movdqu xmm1,xmm2', 'movdqu xmm1, xmm2'),\n# ('MOVDQU (REP)', 'F3F30F6FCA', 0x40, 'rep: movdqu xmm1,xmm2', 'rep: movdqu xmm1, xmm2'),\n-\n]\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Add more opcodes and fix a fix things in the amd64 one. And port the tests over to amd64 to know that we got something working there. Still a few to fix in amd64 though.
|
718,765 |
17.05.2019 11:44:47
| 14,400 |
d7d1a0cccd7f378f6aa459159c6bc53dcd05ddd1
|
Cutting off fixes here, since any more amd64 ones will balloon this PR even more
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/amd64/disasm.py",
"new_path": "envi/archs/amd64/disasm.py",
"diff": "@@ -281,7 +281,7 @@ class Amd64Disasm(e_i386.i386Disasm):\nvvvv = ((inv2 >> 3) & 0xf)\npp = imm2 & 3\nm_mmmm = imm1 & 0x1f\n- #print \"imms: %x %x \\tl: %d\\tvvvv: 0x%x\\tpp: %d\\tm_mmmm: 0x%x\" % (imm1, imm2, vex_l, vvvv, pp, m_mmmm)\n+ # print(\"imms: %x %x \\tl: %d\\tvvvv: 0x%x\\tpp: %d\\tm_mmmm: 0x%x\" % (imm1, imm2, vex_l, vvvv, pp, m_mmmm))\nprefixes |= ((inv1 << 11) & PREFIX_REX_RXB) # RXB are inverted\nprefixes |= ((imm2 << 12) & PREFIX_REX_W) # W is not inverted\nprefixes |= vex_l\n@@ -292,14 +292,13 @@ class Amd64Disasm(e_i386.i386Disasm):\n# VEX prefixes default to 0F table, possibly F20F, F30F or 660F\n# VEX3 prefixes may also specify depths into 38 and 3A tables\nfor tabidx in combined_mand_prefixes:\n- if tabidx == None:\n+ if tabidx is None:\ncontinue\n- #print \"TABIDX: %d\" % tabidx\n+ # print(\"TABIDX: %d\" % tabidx)\nopdesc = tabdesc[0][tabidx]\n- #print 'OPDESC: %s -> %s' % (repr(opdesc), opcode86.tables_lookup.get(opdesc[0]))\n+ # print('OPDESC: %s -> %s' % (repr(opdesc), opcode86.tables_lookup.get(opdesc[0])))\ntabdesc = all_tables[opdesc[0]]\n-\noffset += 1\ncontinue\n@@ -310,21 +309,21 @@ class Amd64Disasm(e_i386.i386Disasm):\nobyte = ord(bytez[offset])\n- #print \"OBYTE\",hex(obyte)\n+ # print(\"OP-OBYTE\", hex(obyte))\nif (obyte > tabdesc[5]):\n- #print \"Jumping To Overflow Table:\", tabdesc[5]\n+ # print(\"Jumping To Overflow Table:\", tabdesc[5])\ntabdesc = all_tables[tabdesc[6]]\ntabidx = ((obyte - tabdesc[4]) >> tabdesc[2]) & tabdesc[3]\n- #print \"TABIDX: %s\" % tabidx\n+ # print(\"TABIDX: %s\" % tabidx)\nopdesc = tabdesc[0][tabidx]\n- #print 'OPDESC: %s -> %s' % (repr(opdesc), opcode86.tables_lookup.get(opdesc[0]))\n+ # print('OPDESC: %s -> %s' % (repr(opdesc), opcode86.tables_lookup.get(opdesc[0])))\n# Hunt down multi-byte opcodes\nnexttable = opdesc[0]\n- #print \"NEXT\",nexttable,hex(obyte), opcode86.tables_lookup.get(nexttable)\n+ # print(\"NEXT\", nexttable, hex(obyte), opcode86.tables_lookup.get(nexttable))\nif nexttable != 0: # If we have a sub-table specified, use it.\n- #print \"Multi-Byte Next Hop For\",hex(obyte),opdesc[0]\n+ # print(\"Multi-Byte Next Hop For\",hex(obyte),opdesc[0])\ntabdesc = all_tables[nexttable]\n# Account for the table jump we made\n@@ -342,9 +341,9 @@ class Amd64Disasm(e_i386.i386Disasm):\nbreak\nif optype == 0:\n- #print tabidx\n- #print opdesc\n- #print \"OPTTYPE 0\"\n+ # print(tabidx)\n+ # print(opdesc)\n+ # print(\"OPTTYPE 0\")\nraise envi.InvalidInstruction(bytez=bytez[startoff:startoff+16], va=va)\noperoffset = 0\n@@ -363,13 +362,12 @@ class Amd64Disasm(e_i386.i386Disasm):\nif operflags == 0:\nbreak\n- #print \"ADDRTYPE: %.8x OPERTYPE: %.8x\" % (addrmeth, opertype)\n+ # print(\"ADDRTYPE: %.8x OPERTYPE: %.8x\" % (addrmeth, opertype))\n# handles tsize calculations including new REX prefixes\ntsize = self._dis_calc_tsize(opertype, prefixes, operflags)\n- #print hex(opertype),hex(addrmeth),hex(tsize)\n-\n+ # print(hex(opertype), hex(addrmeth), hex(tsize))\n# If addrmeth is zero, we have operands embedded in the opcode\nif addrmeth == 0:\n@@ -377,10 +375,10 @@ class Amd64Disasm(e_i386.i386Disasm):\noper = self.ameth_0(operflags, opdesc[2+tbl_opercnt+i], tsize, prefixes)\nelse:\n- #print \"ADDRTYPE\",hex(addrmeth)\n+ # print(\"ADDRTYPE\", hex(addrmeth))\nameth = self._dis_amethods[addrmeth >> 16]\n- #print \"AMETH\",ameth\n- if ameth == None:\n+ # print(\"AMETH\", ameth)\n+ if ameth is None:\nraise Exception(\"Implement Addressing Method 0x%.8x\" % addrmeth)\n# NOTE: Depending on your addrmethod you may get beginning of operands, or offset\n@@ -400,11 +398,11 @@ class Amd64Disasm(e_i386.i386Disasm):\nelse:\nosize, oper = ameth(bytez, offset, tsize, prefixes, operflags)\n- except struct.error, e:\n+ except struct.error:\n# Catch struct unpack errors due to insufficient data length\nraise envi.InvalidInstruction(bytez=bytez[startoff:startoff+16])\n- if oper != None:\n+ if oper is not None:\n# This is a filty hack for now...\noper._dis_regctx = self._dis_regctx\noperands.append(oper)\n@@ -545,6 +543,12 @@ class Amd64Disasm(e_i386.i386Disasm):\noper.reg += REX_BUMP\nreturn osize, oper\n+ def ameth_z(self, bytes, offset, tsize, prefixes, operflags):\n+ osize, oper = e_i386.i386Disasm.ameth_z(self, bytes, offset, tsize, prefixes, operflags)\n+ if not (prefixes & PREFIX_VEX_L):\n+ oper.reg |= e_i386.RMETA_LOW128\n+ return osize, oper\n+\n# NOTE: The ones below are the only ones to which REX.X or REX.B can apply (besides ameth_0)\n# FIXME: we need to adhere to the ADDR_SIZE/OPER_SIZE rules better... the REX_BUMP is an afterthought...\n# however, all the rules are based on ADDR_SIZE/OPER_SIZE and can be coalesced elegantly into amd64/i386\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/amd64/opcode64.py",
"new_path": "envi/archs/amd64/opcode64.py",
"diff": "@@ -1046,16 +1046,16 @@ tbl32_0F38[0xf3] = (TBL_0F38F3, 0, 0, 0, 0, 0, 0, 0, 0, 0)\ntbl32_660F38 = list(tbl32_0F38)\n-tbl32_660F38[0] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"pshufb\", 0, 0, 0) # all of these require VEX prefix\n-tbl32_660F38[1] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"phaddw\", 0, 0, 0)\n-tbl32_660F38[2] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"phaddd\", 0, 0, 0)\n-tbl32_660F38[3] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"phaddsw\", 0, 0, 0)\n-tbl32_660F38[4] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"pmaddubsw\", 0, 0, 0)\n-tbl32_660F38[5] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"phsubw\", 0, 0, 0)\n-tbl32_660F38[6] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"phsubd\", 0, 0, 0)\n-tbl32_660F38[7] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"phsubsw\", 0, 0, 0)\n-tbl32_660F38[8] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"psignb\", 0, 0, 0)\n-tbl32_660F38[9] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"psignw\", 0, 0, 0)\n+tbl32_660F38[0x0] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"pshufb\", 0, 0, 0) # all of these require VEX prefix\n+tbl32_660F38[0x1] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"phaddw\", 0, 0, 0)\n+tbl32_660F38[0x2] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"phaddd\", 0, 0, 0)\n+tbl32_660F38[0x3] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"phaddsw\", 0, 0, 0)\n+tbl32_660F38[0x4] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"pmaddubsw\", 0, 0, 0)\n+tbl32_660F38[0x5] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"phsubw\", 0, 0, 0)\n+tbl32_660F38[0x6] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"phsubd\", 0, 0, 0)\n+tbl32_660F38[0x7] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"phsubsw\", 0, 0, 0)\n+tbl32_660F38[0x8] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"psignb\", 0, 0, 0)\n+tbl32_660F38[0x9] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"psignw\", 0, 0, 0)\ntbl32_660F38[0xa] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"psignd\", 0, 0, 0)\ntbl32_660F38[0xb] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"pmulhrsw\", 0, 0, 0)\ntbl32_660F38[0xc] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_H | OPTYPE_x | OP_R, ADDRMETH_W | OPTYPE_x | OP_R, cpu_AMD64, \"permilps\", 0, 0, 0)\n@@ -1208,9 +1208,9 @@ tbl32_0F73[2] = ( 0, INS_OTHER, ADDRMETH_N | OPTYPE_q | OP_W, ADDRMETH_I | O\ntbl32_0F73[6] = (0, INS_OTHER, ADDRMETH_N | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psllq\", 0, 0, 0)\ntbl32_660F73 = [(0, 0, 0, 0, 0, 0, 0, 0, 0, 0) for x in range(8)]\n-tbl32_660F73[2] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlq\", 0, 0, 0)\n-tbl32_660F73[6] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psllq\", 0, 0, 0)\n-tbl32_660F73[7] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psldq\", 0, 0, 0)\n+tbl32_660F73[2] = (0, INS_OTHER, ADDRMETH_Z | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlq\", 0, 0, 0)\n+tbl32_660F73[6] = (0, INS_OTHER, ADDRMETH_Z | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psllq\", 0, 0, 0)\n+tbl32_660F73[7] = (0, INS_OTHER, ADDRMETH_Z | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psldq\", 0, 0, 0)\ndesc_0F73 = (tbl32_0F73, 3, 3, 0x07, 0, 0xff)\ndesc_660F73 = (tbl32_660F73, 3, 3, 0x07, 0, 0xff)\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/disasm.py",
"new_path": "envi/archs/i386/disasm.py",
"diff": "@@ -635,7 +635,6 @@ class i386Disasm:\nself._dis_amethods[opcode86.ADDRMETH_C>>16] = self.ameth_c\nself._dis_amethods[opcode86.ADDRMETH_D>>16] = self.ameth_d\nself._dis_amethods[opcode86.ADDRMETH_E>>16] = self.ameth_e\n- self._dis_amethods[opcode86.ADDRMETH_L>>16] = self.ameth_l\nself._dis_amethods[opcode86.ADDRMETH_M>>16] = self.ameth_e\nself._dis_amethods[opcode86.ADDRMETH_N>>16] = self.ameth_n\nself._dis_amethods[opcode86.ADDRMETH_Q>>16] = self.ameth_q\n@@ -651,6 +650,7 @@ class i386Disasm:\nself._dis_amethods[opcode86.ADDRMETH_V>>16] = self.ameth_v\nself._dis_amethods[opcode86.ADDRMETH_X>>16] = self.ameth_x\nself._dis_amethods[opcode86.ADDRMETH_Y>>16] = self.ameth_y\n+ self._dis_amethods[opcode86.ADDRMETH_Z>>16] = self.ameth_z\n# Offsets used to add in addressing method parsers\nself.ROFFSETMMX = getRegOffset(i386regs, \"mm0\")\n@@ -1038,10 +1038,6 @@ class i386Disasm:\nmod, reg, rm = self.parse_modrm(ord(bytez[offset]))\nreturn (0, i386RegOper(reg+self.ROFFSETSIMD, tsize))\n- def ameth_l(self, bytez, offset, tsize, prefixes, operflags):\n- mod, reg, rm = self.parse_modrm(ord(bytez[offset]))\n- return (1, i386RegOper(rm+self.ROFFSETSIMD, tsize))\n-\ndef ameth_x(self, bytez, offset, tsize, prefixes, operflags):\n#FIXME this needs the DS over-ride, but is only for outsb which we don't support\nreturn (0, i386RegMemOper(REG_ESI, tsize))\n@@ -1050,6 +1046,10 @@ class i386Disasm:\n#FIXME this needs the ES over-ride, but is only for insb which we don't support\nreturn (0, i386RegMemOper(REG_ESI, tsize))\n+ def ameth_z(self, bytez, offset, tsize, prefixes, operflags):\n+ mod, reg, rm = self.parse_modrm(ord(bytez[offset]))\n+ return (1, i386RegOper(rm+self.ROFFSETSIMD, tsize))\n+\nif __name__ == '__main__':\nimport envi.archs\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/opcode86.py",
"new_path": "envi/archs/i386/opcode86.py",
"diff": "@@ -1623,11 +1623,11 @@ tbl32_0F73 = [\ntbl32_660F71 = [\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, INS_OTHER, ADDRMETH_L | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlw\", 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_Z | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlw\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, INS_OTHER, ADDRMETH_L | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psraw\", 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_Z | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psraw\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, INS_OTHER, ADDRMETH_L | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psllw\", 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_Z | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psllw\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0)\n]\n@@ -1638,11 +1638,11 @@ tbl32_660F71 = [\ntbl32_660F72 = [\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, INS_OTHER, ADDRMETH_L | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrld\", 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_Z | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrld\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, INS_OTHER, ADDRMETH_L | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrad\", 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_Z | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrad\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, INS_OTHER, ADDRMETH_L | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"pslld\", 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_Z | OPTYPE_q | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"pslld\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0)\n]\n@@ -1653,12 +1653,12 @@ tbl32_660F72 = [\ntbl32_660F73 = [\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, INS_OTHER, ADDRMETH_L | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlq\", 0, 0, 0),\n- (0, INS_OTHER, ADDRMETH_L | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrldq\", 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_Z | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlq\", 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_Z | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psrldq\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, INS_OTHER, ADDRMETH_L | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psllq\", 0, 0, 0),\n- (0, INS_OTHER, ADDRMETH_L | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psldq\", 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_Z | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psllq\", 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_Z | OPTYPE_dq | OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTMMX, \"psldq\", 0, 0, 0),\n]\n\"\"\"\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/opconst.py",
"new_path": "envi/archs/i386/opconst.py",
"diff": "@@ -14,7 +14,7 @@ ADDRMETH_G = 0x00070000 # MODRM byte defines general-purpose reg\nADDRMETH_H = 0x00080000 # VEX.vvvv field selects 128bit XMM or 256bit YMM register\nADDRMETH_I = 0x00090000 # Immediate data follows\nADDRMETH_J = 0x000A0000 # Immediate value is relative to EIP\n-ADDRMETH_L = 0x000B0000 # MODRM rm field (not reg field) defines an XMM register, and reg defines ext\n+ADDRMETH_L = 0x000B0000\nADDRMETH_M = 0x000C0000 # MODRM mod field can refer only to memory\nADDRMETH_N = 0x000D0000 # R/M field of MODRM selects a packed-quadword, MMX register\nADDRMETH_O = 0x000E0000 # Displacement follows (without modrm/sib)\n@@ -27,7 +27,8 @@ ADDRMETH_V = 0x00140000 # MODRM reg field defines XMM register\nADDRMETH_W = 0x00150000 # MODRM defines XMM register or memory\nADDRMETH_X = 0x00160000 # Memory addressed by DS:rSI\nADDRMETH_Y = 0x00170000 # Memory addressd by ES:rDI\n-ADDRMETH_LAST = ADDRMETH_Y\n+ADDRMETH_Z = 0x00180000 # R/M field of MODRM defines XMM register, reg is used as an ext\n+ADDRMETH_LAST = ADDRMETH_Z\nOPTYPE_a = 0x01000000 # 2/4 two one-word operands in memory or two double-word operands in memory (operand-size attribute)\nOPTYPE_b = 0x02000000 # 1 always 1 byte\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_amd64.py",
"new_path": "envi/tests/test_arch_amd64.py",
"diff": "@@ -65,11 +65,31 @@ amd64MultiByteOpcodes = [\n('MOVAPD', '660f28aa41414141', 0x40, 'movapd xmm5,oword [rdx + 1094795585]', 'movapd xmm5,oword [rdx + 1094795585]'),\n('PMULLW (66)', '660faa41414141', 0x40, 'rsm ', 'rsm '),\n('CMPXCH8B', '0fc70a', 0x40, 'cmpxch8b qword [rdx]', 'cmpxch8b qword [rdx]'),\n- ('PSRLDQ (66)', '660f73faaa4141', 0x40, 'psldq xmm7,250', 'psldq xmm7,250'),\n- ('PSRLDQ (66)', '660f73b5aa4141', 0x40, 'psllq xmm6,181', 'psllq xmm6,181'),\n- ('PSRLDQ (66)', '660f73b1aa4141', 0x40, 'psllq xmm6,177', 'psllq xmm6,177'),\n- ('PSRLDQ (66)', '660f73b9aa4141', 0x40, 'psldq xmm7,185', 'psldq xmm7,185'),\n+ ('MOVD (66)', '660f7ecb414141', 0x40, 'movd ebx,xmm1', 'movd ebx,xmm1'),\n+ ('MOVD', '0F6E0D41414100', 0x40, 'movd mm1,[rip + 4276545]', 'movd mm1,dword [rip + 4276545]'),\n+ ('MOVQ', '0F6FCB', 0x40, 'movq mm1,mm3', 'movq mm1,mm3'),\n+ ('PSRAW', '0FE1CA4141', 0x40, 'psraw mm1,mm2', 'psraw mm1,mm2'),\n+ ('PSRLQ (66)', '660FF3CB4141', 0x40, 'psllq xmm1,xmm3', 'psllq xmm1,xmm3'),\n+ ('PALIGNR', '0F3A0FDC03', 0x40, 'palignr xmm3,xmm4,3', 'palignr xmm3,xmm4,3'),\n+ ('PALIGNR (66)', '660F3A0FCA07', 0x40, 'palignr xmm1,xmm2,7', 'palignr xmm1,xmm2,7'),\n+ ('PSLLQ (reg)', '660FF3CA', 0x40, 'psllq xmm1,xmm2', 'psllq xmm1,xmm2'),\n+ ('PSLLW (regs)', '0F71F108', 0x40, 'psllw mm1,8', 'psllw mm1,8'),\n+ ('PSLLQ (66)', '660F73F108', 0x40, 'psllq xmm1,8', 'psllq xmm1,8'),\n+\n+ # TODO: These require deeper fixes in the amd64 parser\n+ # ('PSRLW (66)', '660F71D611', 0x40, 'psrlw xmm6,17', 'psrlw xmm6,17'),\n+ # ('PSRAD (66)', '660F72E704', 0x40, 'psrad xmm7,4', 'psrad xmm7,4'),\n+ # ('PSRLQ (66)', '660F73D308', 0x40, 'psrlq xmm3,8', 'psrlq xmm3,8'),\n+ # ('PSRLQ 2', '660f73d501', 0x40, 'psrlq xmm5,1', 'psrlq xmm5,1'),\n+ # ('PSHUFB', '660F3800EF', 0x40, 'pshufb xmm5,xmm7', 'pshufb xmm5,xmm7'),\n+ ('PSRLDQ (66)', '660f73b5aa4141', 0x40, 'psllq xmm5,170', 'psllq xmm5,170'),\n+ ('PSRLDQ (66)', '660f73f5aa4141', 0x40, 'psllq xmm5,170', 'psllq xmm5,170'),\n+ ('PSRLDQ (66)', '660f73b1aa4141', 0x40, 'psllq xmm1,170', 'psllq xmm1,170'),\n+ ('PSRLDQ (66)', '660f73b9aa4141', 0x40, 'psldq xmm1,170', 'psldq xmm1,170'),\n+ ('PCMPISTRI', '660f3a630f0d', 0x40, 'pcmpistri xmm1,oword [rdi],13', 'pcmpistri xmm1,oword [rdi],13'),\n]\n+\n+\nclass Amd64InstructionSet(unittest.TestCase):\n_arch = envi.getArchModule(\"amd64\")\n@@ -83,7 +103,7 @@ class Amd64InstructionSet(unittest.TestCase):\nfor name, bytez, va, reprOp, renderOp in amd64SingleByteOpcodes:\nop = self._arch.archParseOpcode(bytez.decode('hex'), 0, va)\n- #print \"'%s', 0x%x, '%s' == '%s'\" % (bytez, va, repr(op), reprOp)\n+ # print(\"'%s', 0x%x, '%s' == '%s'\" % (bytez, va, repr(op), reprOp))\nself.assertEqual(repr(op), reprOp)\nscanv.clearCanvas()\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Cutting off fixes here, since any more amd64 ones will balloon this PR even more
|
718,765 |
17.05.2019 13:11:14
| 14,400 |
359096a7e5ac5748d2bd7cec52642f20cca598fd
|
Add rdtscp to amd64 instructions
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/amd64/disasm.py",
"new_path": "envi/archs/amd64/disasm.py",
"diff": "@@ -311,7 +311,7 @@ class Amd64Disasm(e_i386.i386Disasm):\n# print(\"OP-OBYTE\", hex(obyte))\nif (obyte > tabdesc[5]):\n- # print(\"Jumping To Overflow Table:\", tabdesc[5])\n+ # print(\"Jumping To Overflow Table: %s\" % hex(tabdesc[5]))\ntabdesc = all_tables[tabdesc[6]]\ntabidx = ((obyte - tabdesc[4]) >> tabdesc[2]) & tabdesc[3]\n@@ -323,7 +323,7 @@ class Amd64Disasm(e_i386.i386Disasm):\nnexttable = opdesc[0]\n# print(\"NEXT\", nexttable, hex(obyte), opcode86.tables_lookup.get(nexttable))\nif nexttable != 0: # If we have a sub-table specified, use it.\n- # print(\"Multi-Byte Next Hop For\",hex(obyte),opdesc[0])\n+ # print(\"Multi-Byte Next Hop For (%s, %s)\" % (hex(obyte), opdesc[0]))\ntabdesc = all_tables[nexttable]\n# Account for the table jump we made\n@@ -332,7 +332,7 @@ class Amd64Disasm(e_i386.i386Disasm):\ncontinue\n# We are now on the final table...\n- # print repr(opdesc)\n+ # print(repr(opdesc))\ntbl_opercnt = tabdesc[1]\nmnem = opdesc[3 + tbl_opercnt]\noptype = opdesc[1]\n@@ -423,7 +423,6 @@ class Amd64Disasm(e_i386.i386Disasm):\noperands[1]._is_deref = False\nret = Amd64Opcode(va, optype, mnem, prefixes, (offset-startoff)+operoffset, operands, iflags)\n-\nreturn ret\ndef parse_modrm(self, byte, prefixes=0):\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/amd64/opcode64.py",
"new_path": "envi/archs/amd64/opcode64.py",
"diff": "@@ -991,7 +991,7 @@ tbl32_0F01_rest = [\n( 0, INS_SYSTEM, ADDRMETH_E | OPTYPE_w | OP_W, ARG_NONE, ARG_NONE, cpu_80386, \"lmsw\", 0, 0, 0),\n( 0, INS_SYSTEM, ADDRMETH_E | OPTYPE_w | OP_W, ARG_NONE, ARG_NONE, cpu_80386, \"lmsw\", 0, 0, 0),\n( 0, INS_OTHER, 0, 0, 0, cpu_PENTIUM2, \"swapgs\", 0, 0, 0),\n-( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0),\n+(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM, \"rdtscp\", 0, 0, 0),\n( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0),\n( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0),\n( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0),\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/opcode86.py",
"new_path": "envi/archs/i386/opcode86.py",
"diff": "@@ -1439,7 +1439,7 @@ tbl32_0F01_rest = [\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n( 0, INS_SYSTEM, ADDRMETH_E | OPTYPE_w | OP_W, ARG_NONE, ARG_NONE, cpu_80386, \"lmsw\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM, \"rdtscp\", 0, 0, 0), # TODO\n+(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM, \"rdtscp\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_amd64.py",
"new_path": "envi/tests/test_arch_amd64.py",
"diff": "@@ -75,6 +75,8 @@ amd64MultiByteOpcodes = [\n('PSLLQ (reg)', '660FF3CA', 0x40, 'psllq xmm1,xmm2', 'psllq xmm1,xmm2'),\n('PSLLW (regs)', '0F71F108', 0x40, 'psllw mm1,8', 'psllw mm1,8'),\n('PSLLQ (66)', '660F73F108', 0x40, 'psllq xmm1,8', 'psllq xmm1,8'),\n+ ('RDTSC', '0F31', 0x40, 'rdtsc ', 'rdtsc '),\n+ ('RDTSCP', '0F01F9', 0x40, 'rdtscp ', 'rdtscp '),\n# TODO: These require deeper fixes in the amd64 parser\n# ('PSRLW (66)', '660F71D611', 0x40, 'psrlw xmm6,17', 'psrlw xmm6,17'),\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_i386.py",
"new_path": "envi/tests/test_arch_i386.py",
"diff": "@@ -70,6 +70,8 @@ i386MultiByteOpcodes = [\n('PCMPISTRI', '660f3a630f0d', 0x40, 'pcmpistri xmm1,oword [edi],13', 'pcmpistri xmm1,oword [edi],13'),\n('PSHUFB', '660F3800EF', 0x40, 'pshufb xmm5,xmm7', 'pshufb xmm5,xmm7'),\n+ ('RDTSC', '0F31', 0x40, 'rdtsc ', 'rdtsc '),\n+ ('RDTSCP', '0F01F9', 0x40, 'rdtscp ', 'rdtscp '),\n# ('CVTDQ2PD', 'f30fe6c0', 0x40, 'cvtdq2pd xmm0,xmm0', 'cvtdq2pd xmm0,xmm0'),\n# Dang it. movdqu and rep: movq are literalally the same bytes, and movdqu should win out, but it doesn't\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Add rdtscp to amd64 instructions
|
718,765 |
21.05.2019 12:50:01
| 14,400 |
cfc431ea7e849920c42d30aa382d0e0e21c1a9d8
|
Fix lfence and mfence where they wouldn't consume the last byte. Remove duplicate table and fix entry for overflow
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/opcode86.py",
"new_path": "envi/archs/i386/opcode86.py",
"diff": "@@ -1853,38 +1853,6 @@ tbl32_F30FC7_rest = [\n]\n-\"\"\"\n-(optable, optype, operand 0, operand 1, operand 2, CPU required, \"opcodename\", op0Register, op1Register, op2Register)\n-\"\"\"\n-tbl32_F30FC7_00BF = [\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, INS_SYSTEM, ADDRMETH_M | OPTYPE_q | OP_W, ARG_NONE, ARG_NONE, 0, \"vmxon\", 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0)\n-]\n-\n-\n-\"\"\"\n-(optable, optype, operand 0, operand 1, operand 2, CPU required, \"opcodename\", op0Register, op1Register, op2Register)\n-\"\"\"\n-tbl32_F30FC7_rest = [\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0)\n-]\n-\n-\n\"\"\"\n(optable, optype, operand 0, operand 1, operand 2, CPU required, \"opcodename\", op0Register, op1Register, op2Register)\n\"\"\"\n@@ -2862,9 +2830,9 @@ tables86=[\n(tbl32_660FC7_rest, 3, 0x07, 0xc0, 0xff), # 48\n(tbl32_F20FC7_00BF, 3, 0x07, 0, 0xff, 50), # 49\n(tbl32_F20FC7_rest, 3, 0x07, 0xc0, 0xff), # 50\n- (tbl32_F30FC7_00BF, 3, 0x07, 0, 0xff, 50), # 51\n+ (tbl32_F30FC7_00BF, 3, 0x07, 0, 0xff, 52), # 51\n(tbl32_F30FC7_rest, 3, 0x07, 0xc0, 0xff), # 52\n- (tbl32_0FAE_rest, 3, 0x07, 0xc0, 0xff), # 53\n+ (tbl32_0FAE_rest, 3, 0xff, 0xc0, 0xff), # 53\n(tbl32_660F73, 3, 0x7, 0, 0xff), # 54\n(tbl32_0F38, 0, 0xff, 0, 0xff), # 55\n(tbl32_660F38, 0, 0xff, 0, 0xff), # 56 - unused at present\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_i386.py",
"new_path": "envi/tests/test_arch_i386.py",
"diff": "@@ -58,6 +58,14 @@ i386MultiByteOpcodes = [\n('PSRLQ (66)', '660F73D308', 0x40, 'psrlq xmm3,8', 'psrlq xmm3,8'),\n('PSRAW (66)', '660F71E1084141', 0x40, 'psraw xmm1,8', 'psraw xmm1,8'),\n('PSRLDQ (66)', '660f73faaa4141', 0x40, 'psldq xmm2,170', 'psldq xmm2,170'),\n+ ('LFENCE', '0faee8', 0x40, 'lfence ', 'lfence '),\n+ ('LFENCE', '0faeea', 0x40, 'lfence ', 'lfence '),\n+ ('LFENCE', '0faeec', 0x40, 'lfence ', 'lfence '),\n+ ('LFENCE', '0faeef', 0x40, 'lfence ', 'lfence '),\n+ ('MFENCE', '0faef0', 0x40, 'mfence ', 'mfence '),\n+ ('MFENCE', '0faef2', 0x40, 'mfence ', 'mfence '),\n+ ('MFENCE', '0faef5', 0x40, 'mfence ', 'mfence '),\n+ ('MFENCE', '0faef7', 0x40, 'mfence ', 'mfence '),\n# Because of how the MODRM Bytes are set, these map to the same instruction\n# TODO: Would these be the same to a real x86 chip?\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Fix lfence and mfence where they wouldn't consume the last byte. Remove duplicate table and fix entry for overflow
|
718,765 |
23.05.2019 15:07:37
| 14,400 |
c15157003430cc7f703228227eab7d73d7e177c7
|
Few more tests.
|
[
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_amd64.py",
"new_path": "envi/tests/test_arch_amd64.py",
"diff": "@@ -55,6 +55,7 @@ amd64SingleByteOpcodes = [\n('pop', '488ff0', 0x40, 'pop rax', 'pop rax'),\n('pop', '488ffb', 0x40, 'pop rbx', 'pop rbx'),\n]\n+\namd64MultiByteOpcodes = [\n('CVTTPS2PI', '0f2caaaaaaaa41', 0x40, 'cvttps2pi mm5,oword [rdx + 1101703850]', 'cvttps2pi mm5,oword [rdx + 1101703850]'),\n('CVTTSS2SI', 'f30f2caaaaaaaa41', 0x40, 'cvttss2si ebp,oword [rdx + 1101703850]', 'cvttss2si ebp,oword [rdx + 1101703850]'),\n@@ -81,9 +82,12 @@ amd64MultiByteOpcodes = [\n# TODO: These require deeper fixes in the amd64 parser\n# ('PSRLW (66)', '660F71D611', 0x40, 'psrlw xmm6,17', 'psrlw xmm6,17'),\n# ('PSRAD (66)', '660F72E704', 0x40, 'psrad xmm7,4', 'psrad xmm7,4'),\n- # ('PSRLQ (66)', '660F73D308', 0x40, 'psrlq xmm3,8', 'psrlq xmm3,8'),\n- # ('PSRLQ 2', '660f73d501', 0x40, 'psrlq xmm5,1', 'psrlq xmm5,1'),\n+ ('PSRLQ (66)', '660F73D308', 0x40, 'psrlq xmm3,8', 'psrlq xmm3,8'),\n+ ('PSRLQ 2', '660f73d501', 0x40, 'psrlq xmm5,1', 'psrlq xmm5,1'),\n# ('PSHUFB', '660F3800EF', 0x40, 'pshufb xmm5,xmm7', 'pshufb xmm5,xmm7'),\n+ ('PSRLQ', '660FD3DC', 0x40, 'psrlq xmm3,xmm4', 'psrlq xmm3,xmm4'),\n+ # ('VPSRLDQ', 'C5E9D3CB', 0x40, 'vpsrlq xmm1,xmm2,xmm3', 'vpsrlq xmm1,xmm2,xmm3'),\n+ ('PSRLQ', '660F73d10f', 0x40, 'psrlq xmm1,15', 'psrlq xmm1,15'),\n('PSRLDQ (66)', '660f73b5aa4141', 0x40, 'psllq xmm5,170', 'psllq xmm5,170'),\n('PSRLDQ (66)', '660f73f5aa4141', 0x40, 'psllq xmm5,170', 'psllq xmm5,170'),\n('PSRLDQ (66)', '660f73b1aa4141', 0x40, 'psllq xmm1,170', 'psllq xmm1,170'),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Few more tests.
|
718,765 |
04.06.2019 11:31:31
| 14,400 |
5188072b973e1e2aeb572b28f1e4c39e2843652d
|
First cut at better prefix handling
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/disasm.py",
"new_path": "envi/archs/i386/disasm.py",
"diff": "@@ -36,6 +36,8 @@ PREFIX_FS = 0x2000\nPREFIX_GS = 0x4000\nPREFIX_REG_MASK = 0x8000\n+MANDATORY_PREFIXES = [0xF2, 0xF3, 0x66]\n+\n# envi.registers meta offsets\nRMETA_LOW8 = 0x00080000\nRMETA_HIGH8 = 0x08080000\n@@ -516,6 +518,7 @@ class i386Opcode(envi.Opcode):\n# Printable prefix names\nprefix_names = [\n+ (PREFIX_ADDR_SIZE, \"addr\"),\n(PREFIX_LOCK, \"lock\"),\n(PREFIX_REPNZ, \"repnz\"),\n(PREFIX_REP, \"rep\"),\n@@ -818,25 +821,55 @@ class i386Disasm:\nmnem = None\noperands = []\n- prefixes = 0\n+ all_prefixes = 0\n+ prefix_len = 0\nwhile True:\nobyte = ord(bytez[offset])\n+ # print(\"PREFIXBYTE: 0x%x\" % obyte)\n# This line changes in 64 bit mode\np = self._dis_prefixes[obyte]\nif p is None:\nbreak\n- if obyte == 0x66 and ord(bytez[offset+1]) == 0x0f:\n- break\n- prefixes |= p\n+ all_prefixes |= p\noffset += 1\ncontinue\n+ # At this point we should have all the possible prefixes, but some may be mandatory ones that we\n+ # need to not use as display prefixes and use as jumps in the table instead.\n+ # So we're going to lie to the rest of the code in order to use them as we want\n+ obyte = ord(bytez[offset])\n+ ppref = [(None, None)]\n+ # print(\"PREFXIES: 0x%x\" % all_prefixes)\n+ if obyte == 0x0f:\n+ if all_prefixes & PREFIX_REPNZ:\n+ ppref.append((0xF2, PREFIX_REPNZ))\n+ elif all_prefixes & PREFIX_REP:\n+ ppref.append((0xF3, PREFIX_REP))\n+ # XXX: Seriously, don't move this one from here\n+ elif all_prefixes & PREFIX_OP_SIZE:\n+ ppref.append((0x66, PREFIX_OP_SIZE))\n+ # print(\"POSTFXIES: 0x%x\" % all_prefixes)\n+\n#pdone = False\n- while True:\n+ decodings = []\n+ mainbyte = offset\n+ prefixes = all_prefixes\n+ for pref, onehot in ppref:\n+ if pref is not None:\n+ # print(\"pref is not none\")\n+ obyte = pref\n+ offset = mainbyte\n+ prefixes = all_prefixes & (~onehot)\n+ tabdesc = all_tables[0]\n+ else:\n+ # print(\"pref is none\")\n+ offset = mainbyte\nobyte = ord(bytez[offset])\n+\n+ while True:\n# print(\"OBYTE\", hex(obyte))\nif (obyte > tabdesc[4]):\n# print(\"Jumping To Overflow Table: %s\" % repr(tabdesc[5]))\n@@ -844,6 +877,9 @@ class i386Disasm:\ntabidx = ((obyte - tabdesc[3]) >> tabdesc[1]) & tabdesc[2]\n# print(\"TABIDX: %d\" % tabidx)\n+ if tabidx > len(tabdesc[0]):\n+ # print(\"Jumped off end of table. Continuing on\")\n+ break\nopdesc = tabdesc[0][tabidx]\n# print('OPDESC: %s' % repr(opdesc))\n@@ -855,14 +891,8 @@ class i386Disasm:\n# print(\"Jumping to table %d\" % nexttable)\ntabdesc = all_tables[nexttable]\n- # In the case of 66 0f, the next table is *already* assuming we ate\n- # the 66 *and* the 0f... oblidge them.\n- if obyte == 0x66 and ord(bytez[offset+1]) == 0x0f:\n- # print(\"Jumping another byte set for 660F\")\n- offset += 1\n-\n- # Account for the table jump we made\noffset += 1\n+ obyte = ord(bytez[offset])\ncontinue\n@@ -874,11 +904,17 @@ class i386Disasm:\nif tabdesc[2] == 0xff:\noffset += 1 # For our final opcode byte\nbreak\n+ if optype != 0:\n+ decodings.append((opdesc, offset, prefixes))\n+\n+ if not len(decodings):\n+ raise envi.InvalidInstruction(bytez=bytez[startoff:startoff+16], va=va)\n+\n+ opdesc, offset, all_prefixes = decodings.pop()\n+ optype = opdesc[1]\n+ mnem = opdesc[6]\nif optype == 0:\n- #print tabidx\n- #print opdesc\n- #print \"OPTTYPE 0\"\nraise envi.InvalidInstruction(bytez=bytez[startoff:startoff+16], va=va)\noperoffset = 0\n@@ -899,7 +935,7 @@ class i386Disasm:\n# print(\"ADDRTYPE: %.8x OPERTYPE: %.8x\" % (addrmeth, opertype))\n- tsize = self._dis_calc_tsize(opertype, prefixes, operflags)\n+ tsize = self._dis_calc_tsize(opertype, all_prefixes, operflags)\n# print(hex(opertype),hex(addrmeth), hex(tsize))\n@@ -907,7 +943,7 @@ class i386Disasm:\n# If addrmeth is zero, we have operands embedded in the opcode\nif addrmeth == 0:\nosize = 0\n- oper = self.ameth_0(operflags, opdesc[5+i], tsize, prefixes)\n+ oper = self.ameth_0(operflags, opdesc[5+i], tsize, all_prefixes)\nelse:\n# print(\"ADDRTYPE\", hex(addrmeth))\nameth = self._dis_amethods[addrmeth >> 16]\n@@ -918,7 +954,7 @@ class i386Disasm:\n# NOTE: Depending on your addrmethod you may get beginning of operands, or offset\ntry:\nif addrmeth == opcode86.ADDRMETH_I or addrmeth == opcode86.ADDRMETH_J:\n- osize, oper = ameth(bytez, offset+operoffset, tsize, prefixes, operflags)\n+ osize, oper = ameth(bytez, offset+operoffset, tsize, all_prefixes, operflags)\n# If we are a sign extended immediate and not the same as the other operand,\n# do the sign extension during disassembly so nothing else has to worry about it..\n@@ -928,7 +964,7 @@ class i386Disasm:\noper.tsize = otsize\nelse:\n- osize, oper = ameth(bytez, offset, tsize, prefixes, operflags)\n+ osize, oper = ameth(bytez, offset, tsize, all_prefixes, operflags)\nexcept struct.error as e:\n# Catch struct unpack errors due to insufficient data length\n@@ -944,7 +980,7 @@ class i386Disasm:\n# Pull in the envi generic instruction flags\niflags = iflag_lookup.get(optype, 0) | self._dis_oparch\n- if prefixes & PREFIX_REP_MASK:\n+ if all_prefixes & PREFIX_REP_MASK:\niflags |= envi.IF_REPEAT\nif priv_lookup.get(mnem, False):\n@@ -954,7 +990,7 @@ class i386Disasm:\nif optype == opcode86.INS_LEA:\noperands[1]._is_deref = False\n- ret = i386Opcode(va, optype, mnem, prefixes, (offset-startoff)+operoffset, operands, iflags)\n+ ret = i386Opcode(va, optype, mnem, all_prefixes, (offset-startoff)+operoffset, operands, iflags)\nreturn ret\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/opcode86.py",
"new_path": "envi/archs/i386/opcode86.py",
"diff": "@@ -265,8 +265,8 @@ tbl32_Main = [\n# 0xf0\n( 0, INSTR_PREFIX, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80386, \"lock:\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80386, 0, 0, 0, 0),\n- (45, INSTR_PREFIX, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80386, \"repne:\", 0, 0, 0),\n- (46, INSTR_PREFIX, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80386, \"rep:\", 0, 0, 0),\n+ (45, INSTR_PREFIX, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80386, 0, 0, 0, 0),\n+ (46, INSTR_PREFIX, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80386, 0, 0, 0, 0),\n(0, INS_HALT, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80386, \"hlt\", 0, 0, 0),\n(0, INS_TOGCF, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80386, \"cmc\", 0, 0, 0),\n(12, 0, ADDRMETH_E | OPTYPE_b, ARG_NONE, ARG_NONE, cpu_80386, 0, 0, 0, 0),\n@@ -334,7 +334,7 @@ tbl32_0F = [\n( 0, INS_MOV, ADDRMETH_W | OPTYPE_ps | OP_W, ADDRMETH_V | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"movaps\", 0, 0, 0),\n( 0, INS_OTHER, ADDRMETH_V | OPTYPE_ps | OP_R, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvtpi2ps\", 0, 0, 0),\n( 0, INS_MOV, ADDRMETH_M | OPTYPE_ps | OP_W, ADDRMETH_V | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"movntps\", 0, 0, 0),\n-( 0, INS_OTHER, ADDRMETH_Q | OPTYPE_q | OP_W, ADDRMETH_W | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvttps2pi\", 0, 0, 0),\n+( 0, INS_OTHER, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_W | OPTYPE_pi | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvttps2pi\", 0, 0, 0),\n( 0, INS_OTHER, ADDRMETH_Q | OPTYPE_q | OP_R, ADDRMETH_W | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvtps2pi\", 0, 0, 0),\n( 0, INS_OTHER, ADDRMETH_V | OPTYPE_ss | OP_W, ADDRMETH_W | OPTYPE_ss | OP_R, ARG_NONE, cpu_PENTIUM2, \"ucomiss\", 0, 0, 0),\n( 0, INS_OTHER, ADDRMETH_V | OPTYPE_ps | OP_W, ADDRMETH_W | OPTYPE_ps | OP_W, ARG_NONE, cpu_PENTIUM2, \"comiss\", 0, 0, 0),\n@@ -845,7 +845,7 @@ tbl32_F20F = [\n( 0, INS_OTHER, ADDRMETH_E | OPTYPE_v, ARG_NONE, ARG_NONE, cpu_80386, \"prefetchw\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- ( 0, INS_MOV, ADDRMETH_V | OPTYPE_ps | OP_W, ADDRMETH_W | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"movups\", 0, 0, 0),\n+ ( 0, INS_MOV, ADDRMETH_V | OPTYPE_ps | OP_W, ADDRMETH_W | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"movsd\", 0, 0, 0),\n( 0, INS_MOV, ADDRMETH_W | OPTYPE_ps | OP_W, ADDRMETH_V | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"movups\", 0, 0, 0),\n( 0, INS_MOV, ADDRMETH_V | OPTYPE_q | OP_W, ADDRMETH_M | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"movlps\", 0, 0, 0),\n( 0, INS_MOV, ADDRMETH_M | OPTYPE_q | OP_W, ADDRMETH_V | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"movlps\", 0, 0, 0),\n@@ -873,7 +873,7 @@ tbl32_F20F = [\n( 0, INS_MOV, ADDRMETH_W | OPTYPE_ps | OP_W, ADDRMETH_V | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"movaps\", 0, 0, 0),\n( 0, INS_OTHER, ADDRMETH_V | OPTYPE_ps | OP_R, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvtpi2ps\", 0, 0, 0),\n( 0, INS_MOV, ADDRMETH_M | OPTYPE_ps | OP_W, ADDRMETH_V | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"movntps\", 0, 0, 0),\n-( 0, INS_OTHER, ADDRMETH_Q | OPTYPE_q | OP_W, ADDRMETH_W | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvttps2pi\", 0, 0, 0),\n+( 0, INS_OTHER, ADDRMETH_Q | OPTYPE_q | OP_W, ADDRMETH_W | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvttsd2si\", 0, 0, 0),\n( 0, INS_OTHER, ADDRMETH_Q | OPTYPE_q | OP_R, ADDRMETH_W | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvtps2pi\", 0, 0, 0),\n( 0, INS_OTHER, ADDRMETH_V | OPTYPE_ss | OP_W, ADDRMETH_W | OPTYPE_ss | OP_R, ARG_NONE, cpu_PENTIUM2, \"ucomiss\", 0, 0, 0),\n( 0, INS_OTHER, ADDRMETH_V | OPTYPE_ps | OP_W, ADDRMETH_W | OPTYPE_ps | OP_W, ARG_NONE, cpu_PENTIUM2, \"comiss\", 0, 0, 0),\n@@ -1108,7 +1108,7 @@ tbl32_F30F = [\n(0, INS_OTHER, ADDRMETH_E | OPTYPE_v, ARG_NONE, ARG_NONE, cpu_80386, \"prefetchw\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, INS_MOV, ADDRMETH_V | OPTYPE_ps | OP_W, ADDRMETH_W | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"movups\", 0, 0, 0),\n+ (0, INS_MOV, ADDRMETH_V | OPTYPE_ps | OP_W, ADDRMETH_W | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"movss\", 0, 0, 0),\n(0, INS_MOV, ADDRMETH_W | OPTYPE_ps | OP_W, ADDRMETH_V | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"movups\", 0, 0, 0),\n(0, INS_MOV, ADDRMETH_V | OPTYPE_q | OP_W, ADDRMETH_M | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"movlps\", 0, 0, 0),\n(0, INS_MOV, ADDRMETH_M | OPTYPE_q | OP_W, ADDRMETH_V | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"movlps\", 0, 0, 0),\n@@ -1123,7 +1123,7 @@ tbl32_F30F = [\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, INS_OTHER, ADDRMETH_E | OPTYPE_v, ARG_NONE, ARG_NONE, cpu_80386, \"nop\", 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, INS_MOV, ADDRMETH_R | OPTYPE_d | OP_W, ADDRMETH_C | OPTYPE_d | OP_R, ARG_NONE, cpu_80386, \"mov\", 0, 0, 0),\n(0, INS_MOV, ADDRMETH_R | OPTYPE_d | OP_W, ADDRMETH_D | OPTYPE_d | OP_R, ARG_NONE, cpu_80386, \"mov\", 0, 0, 0),\n(0, INS_MOV, ADDRMETH_C | OPTYPE_d | OP_W, ADDRMETH_R | OPTYPE_d | OP_R, ARG_NONE, cpu_80386, \"mov\", 0, 0, 0),\n@@ -1136,7 +1136,7 @@ tbl32_F30F = [\n(0, INS_MOV, ADDRMETH_W | OPTYPE_ps | OP_W, ADDRMETH_V | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"movaps\", 0, 0, 0),\n(0, INS_OTHER, ADDRMETH_V | OPTYPE_ps | OP_R, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvtpi2ps\", 0, 0, 0),\n(0, INS_MOV, ADDRMETH_M | OPTYPE_ps | OP_W, ADDRMETH_V | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"movntps\", 0, 0, 0),\n- (0, INS_OTHER, ADDRMETH_Q | OPTYPE_q | OP_W, ADDRMETH_W | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvttps2pi\", 0, 0, 0),\n+ (0, INS_OTHER, ADDRMETH_G | OPTYPE_q | OP_W, ADDRMETH_W | OPTYPE_d | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvttss2si\", 0, 0, 0),\n(0, INS_OTHER, ADDRMETH_Q | OPTYPE_q | OP_R, ADDRMETH_W | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvtps2pi\", 0, 0, 0),\n(0, INS_OTHER, ADDRMETH_V | OPTYPE_ss | OP_W, ADDRMETH_W | OPTYPE_ss | OP_R, ARG_NONE, cpu_PENTIUM2, \"ucomiss\", 0, 0, 0),\n(0, INS_OTHER, ADDRMETH_V | OPTYPE_ps | OP_W, ADDRMETH_W | OPTYPE_ps | OP_W, ARG_NONE, cpu_PENTIUM2, \"comiss\", 0, 0, 0),\n@@ -1203,7 +1203,7 @@ tbl32_F30F = [\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n( 0, INS_MOV, ADDRMETH_P | OPTYPE_d | OP_W, ADDRMETH_E | OPTYPE_d | OP_R, ARG_NONE, cpu_PENTMMX, \"movd\", 0, 0, 0),\n- ( 0, INS_MOV, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"movq\", 0, 0, 0),\n+ ( 0, INS_MOV, ADDRMETH_V | OPTYPE_q | OP_W, ADDRMETH_W | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"movdqu\", 0, 0, 0),\n( 0, INS_OTHER, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ADDRMETH_I | OPTYPE_b | OP_R, cpu_PENTIUM2, \"pshufw\", 0, 0, 0),\n(19, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTMMX, 0, 0, 0, 0),\n(20, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTMMX, 0, 0, 0, 0),\n@@ -1251,7 +1251,7 @@ tbl32_F30F = [\n( 0, INS_MOVCC, ADDRMETH_E | OPTYPE_b | OP_W, ARG_NONE, ARG_NONE, cpu_80386, \"setl\", 0, 0, 0),\n( 0, INS_MOVCC, ADDRMETH_E | OPTYPE_b | OP_W, ARG_NONE, ARG_NONE, cpu_80386, \"setge\", 0, 0, 0),\n( 0, INS_MOVCC, ADDRMETH_E | OPTYPE_b | OP_W, ARG_NONE, ARG_NONE, cpu_80386, \"setle\", 0, 0, 0),\n- ( 0, INS_MOVCC, ADDRMETH_E | OPTYPE_b | OP_W, ARG_NONE, ARG_NONE, cpu_80386, \"setg\", 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80386, 0, 0, 0, 0),\n(0, INS_PUSH, OP_REG | OP_R, ARG_NONE, ARG_NONE, cpu_80386, \"push\", e_i386_regs.REG_FS, 0, 0),\n(0, INS_POP, OP_REG | OP_W, ARG_NONE, ARG_NONE, cpu_80386, \"pop\", e_i386_regs.REG_FS, 0, 0),\n(0, INS_CPUID, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80486, \"cpuid\", 0, 0, 0),\n@@ -1276,12 +1276,12 @@ tbl32_F30F = [\n( 0, INS_MOV, ADDRMETH_G | OPTYPE_v | OP_W, ADDRMETH_M | OPTYPE_p | OP_R, ARG_NONE, cpu_80386, \"lgs\", 0, 0, 0),\n( 0, INS_MOV, ADDRMETH_G | OPTYPE_v | OP_W, ADDRMETH_E | OPTYPE_b | OP_R, ARG_NONE, cpu_80386, \"movzx\", 0, 0, 0),\n( 0, INS_MOV, ADDRMETH_G | OPTYPE_v | OP_W, ADDRMETH_E | OPTYPE_w | OP_R, ARG_NONE, cpu_80386, \"movzx\", 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+ (0, INS_BITTEST, ADDRMETH_G | OPTYPE_v | OP_W, ADDRMETH_E | OPTYPE_v | OP_R, ARG_NONE, cpu_80386, \"popcnt\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80386, \"ud1\", 0, 0, 0), #### GROUP 10?\n(23, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80386, 0, 0, 0, 0),\n( 0, INS_BITTEST, ADDRMETH_E | OPTYPE_v | OP_R, ADDRMETH_G | OPTYPE_v | OP_R, ARG_NONE, cpu_80386, \"btc\", 0, 0, 0),\n( 0, INS_BITTEST, ADDRMETH_G | OPTYPE_v | OP_R | OP_W, ADDRMETH_E | OPTYPE_v | OP_R, ARG_NONE, cpu_80386, \"bsf\", 0, 0, 0),\n- ( 0, INS_BITTEST, ADDRMETH_G | OPTYPE_v | OP_R | OP_W, ADDRMETH_E | OPTYPE_v | OP_R, ARG_NONE, cpu_80386, \"bsr\", 0, 0, 0),\n+ ( 0, INS_BITTEST, ADDRMETH_G | OPTYPE_v | OP_R | OP_W, ADDRMETH_E | OPTYPE_v | OP_R, ARG_NONE, cpu_80386, \"lzcnt\", 0, 0, 0),\n( 0, INS_MOV, ADDRMETH_G | OPTYPE_v | OP_W, ADDRMETH_E | OPTYPE_b | OP_R, ARG_NONE, cpu_80386, \"movsx\", 0, 0, 0),\n( 0, INS_MOV, ADDRMETH_G | OPTYPE_v | OP_W, ADDRMETH_E | OPTYPE_w | OP_R, ARG_NONE, cpu_80386, \"movsx\", 0, 0, 0),\n( 0, INS_ADD, ADDRMETH_E | OPTYPE_b | OP_W, ADDRMETH_G | OPTYPE_b | OP_W, ARG_NONE, cpu_80486, \"xadd\", 0, 0, 0),\n@@ -1292,15 +1292,16 @@ tbl32_F30F = [\n( 0, INS_OTHER, ADDRMETH_G | OPTYPE_d | OP_W, ADDRMETH_N | OPTYPE_q | OP_R, ADDRMETH_I | OPTYPE_b | OP_R, cpu_PENTIUM2, \"pextrw\", 0, 0, 0),\n( 0, INS_OTHER, ADDRMETH_V | OPTYPE_ps | OP_W, ADDRMETH_W | OPTYPE_ps | OP_R, ADDRMETH_I | OPTYPE_b | OP_R, cpu_PENTIUM2, \"shufps\", 0, 0, 0),\n(25, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTMMX, 0, 0, 0, 0), # group 9\n- ( 0, INS_XCHG, OP_REG | OP_W, ARG_NONE, ARG_NONE, cpu_80486, \"bswap\", e_i386_regs.REG_EAX, 0, 0),\n- ( 0, INS_XCHG, OP_REG | OP_W, ARG_NONE, ARG_NONE, cpu_80486, \"bswap\", e_i386_regs.REG_ECX, 0, 0),\n- ( 0, INS_XCHG, OP_REG | OP_W, ARG_NONE, ARG_NONE, cpu_80486, \"bswap\", e_i386_regs.REG_EDX, 0, 0),\n- ( 0, INS_XCHG, OP_REG | OP_W, ARG_NONE, ARG_NONE, cpu_80486, \"bswap\", e_i386_regs.REG_EBX, 0, 0),\n- ( 0, INS_XCHG, OP_REG | OP_W, ARG_NONE, ARG_NONE, cpu_80486, \"bswap\", e_i386_regs.REG_ESP, 0, 0),\n- ( 0, INS_XCHG, OP_REG | OP_W, ARG_NONE, ARG_NONE, cpu_80486, \"bswap\", e_i386_regs.REG_EBP, 0, 0),\n- ( 0, INS_XCHG, OP_REG | OP_W, ARG_NONE, ARG_NONE, cpu_80486, \"bswap\", e_i386_regs.REG_ESI, 0, 0),\n- ( 0, INS_XCHG, OP_REG | OP_W, ARG_NONE, ARG_NONE, cpu_80486, \"bswap\", e_i386_regs.REG_EDI, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+ ( 0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80486, 0, 0, 0, 0),\n+ ( 0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80486, 0, 0, 0, 0),\n+ ( 0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80486, 0, 0, 0, 0),\n+ ( 0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80486, 0, 0, 0, 0),\n+ ( 0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80486, 0, 0, 0, 0),\n+ ( 0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80486, 0, 0, 0, 0),\n+ ( 0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80486, 0, 0, 0, 0),\n+ ( 0, 0, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80486, 0, 0, 0, 0),\n+ (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+# So a lot of these are actually valid, they're just here as legacy from our previous prefix handling\n( 0, INS_OTHER, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlw\", 0, 0, 0),\n( 0, INS_OTHER, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"psrld\", 0, 0, 0),\n( 0, INS_OTHER, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlq\", 0, 0, 0),\n@@ -1322,7 +1323,7 @@ tbl32_F30F = [\n( 0, INS_OTHER, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"pavgw\", 0, 0, 0),\n( 0, INS_MUL, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"pmulhuw\", 0, 0, 0),\n( 0, INS_MUL, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"pmulhw\", 0, 0, 0),\n- (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ARG_NONE, ARG_NONE, cpu_PENTMMX, \"cvtdq2pd\", 0, 0, 0), # Horked due to how we do prefixes\n+ (0, INS_OTHER, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ARG_NONE, cpu_PENTMMX, \"cvtdq2pd\", 0, 0, 0), # Horked due to how we do prefixes\n( 0, INS_MOV, ADDRMETH_M | OPTYPE_dq | OP_W, ADDRMETH_V | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"movntq\", 0, 0, 0),\n( 0, INS_SUB, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"psubsb\", 0, 0, 0),\n( 0, INS_SUB, ADDRMETH_P | OPTYPE_q | OP_W, ADDRMETH_Q | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"psubsw\", 0, 0, 0),\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_amd64.py",
"new_path": "envi/tests/test_arch_amd64.py",
"diff": "@@ -288,7 +288,7 @@ class Amd64InstructionSet(unittest.TestCase):\n#In [6]: generateTestInfo('673ac4')\nopbytez = '673ac4'\n- oprepr = 'cmp al,ah'\n+ oprepr = 'addr: cmp al,ah'\nopcheck = {'iflags': 131072, 'va': 16384, 'repr': None, 'prefixes': 128, 'mnem': 'cmp', 'opcode': 20482, 'size': 3}\nopercheck = [{'tsize': 1, 'reg': 524288}, {'tsize': 1, 'reg': 134742016}]\nself.checkOpcode( opbytez, 0x4000, oprepr, opcheck, opercheck, oprepr )\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_i386.py",
"new_path": "envi/tests/test_arch_i386.py",
"diff": "@@ -31,13 +31,15 @@ i386SingleByteOpcodes = [\n('setg (dl)', '0f9fc2', 0x40, 'setg dl', 'setg dl'),\n('rep setg (al)', 'f30f9fc0', 0x40, 'rep: setg al', 'rep: setg al'),\n('rep setg (dl)', 'f30f9fc2', 0x40, 'rep: setg dl', 'rep: setg dl'),\n+ ('prefix scas', 'f2ae', 0x40, 'repnz: scasb ', 'repnz: scasb '),\n]\ni386MultiByteOpcodes = [\n- ('CVTTPS2PI', '0f2caaaaaaaa41', 0x40, 'cvttps2pi qword [edx + 1101703850],oword [edx + 1101703850]', 'cvttps2pi qword [edx + 1101703850],oword [edx + 1101703850]'),\n- ('CVTTSS2SI', 'f30f2caaaaaaaa41', 0x40, 'rep: cvttps2pi qword [edx + 1101703850],oword [edx + 1101703850]', 'rep: cvttps2pi qword [edx + 1101703850],oword [edx + 1101703850]'),\n+ ('CVTTPS2PI', '0f2caaaaaaaa41', 0x40, 'cvttps2pi mm5,qword [edx + 1101703850]', 'cvttps2pi mm5,qword [edx + 1101703850]'),\n+ ('CVTTSS2SI', 'f30f2caaaaaaaa41', 0x40, 'cvttss2si ebp,dword [edx + 1101703850]', 'cvttss2si ebp,dword [edx + 1101703850]'),\n+ ('CVTTSS2SI', 'f30f2ce9414141', 0x40, 'cvttss2si ebp,xmm1', 'cvttss2si ebp,xmm1'),\n('CVTTPD2PI', '660f2caaaaaaaa41', 0x40, 'cvttpd2pi oword [edx + 1101703850],oword [edx + 1101703850]', 'cvttpd2pi oword [edx + 1101703850],oword [edx + 1101703850]'),\n- ('CVTTSD2SI', 'f20f2caaaaaaaa41', 0x40, 'repnz: cvttps2pi qword [edx + 1101703850],oword [edx + 1101703850]', 'repnz: cvttps2pi qword [edx + 1101703850],oword [edx + 1101703850]'),\n+ ('CVTTSD2SI', 'f20f2caaaaaaaa41', 0x40, 'cvttsd2si qword [edx + 1101703850],oword [edx + 1101703850]', 'cvttsd2si qword [edx + 1101703850],oword [edx + 1101703850]'),\n('ADDPS', '0f58aa4141414141', 0x40, 'addps xmm5,oword [edx + 1094795585]', 'addps xmm5,oword [edx + 1094795585]'),\n('MOVAPS', '0f28aa41414141', 0x40, 'movaps xmm5,oword [edx + 1094795585]', 'movaps xmm5,oword [edx + 1094795585]'),\n('MOVAPD', '660f28aa41414141', 0x40, 'movapd xmm5,oword [edx + 1094795585]', 'movapd xmm5,oword [edx + 1094795585]'),\n@@ -67,6 +69,11 @@ i386MultiByteOpcodes = [\n('MFENCE', '0faef5', 0x40, 'mfence ', 'mfence '),\n('MFENCE', '0faef7', 0x40, 'mfence ', 'mfence '),\n+ ('CVTTSS2SI', 'f30f2cc8', 0x40, 'cvttss2si ecx,xmm0', 'cvttss2si ecx,xmm0'),\n+ ('PREFIXES', 'f0673e2e65f30f10ca', 0x40, 'addr lock cs ds gs: movss xmm1,xmm2', 'addr lock cs ds gs: movss xmm1,xmm2'),\n+ ('BSR', '0fbdc3414141', 0x40, 'bsr eax,ebx', 'bsr eax,ebx'),\n+ ('LZNT', 'f30fbdc3414141', 0x40, 'lzcnt eax,ebx', 'lzcnt eax,ebx'),\n+\n# Because of how the MODRM Bytes are set, these map to the same instruction\n# TODO: Would these be the same to a real x86 chip?\n('PSRLDQ (66)', '660f73b5aa4141', 0x40, 'psllq xmm5,170', 'psllq xmm5,170'),\n@@ -80,14 +87,19 @@ i386MultiByteOpcodes = [\n('PSHUFB', '660F3800EF', 0x40, 'pshufb xmm5,xmm7', 'pshufb xmm5,xmm7'),\n('RDTSC', '0F31', 0x40, 'rdtsc ', 'rdtsc '),\n('RDTSCP', '0F01F9', 0x40, 'rdtscp ', 'rdtscp '),\n- # ('CVTDQ2PD', 'f30fe6c0', 0x40, 'cvtdq2pd xmm0,xmm0', 'cvtdq2pd xmm0,xmm0'),\n-\n- # Dang it. movdqu and rep: movq are literalally the same bytes, and movdqu should win out, but it doesn't\n- # because we have no mechanism to override the bytes after we decoding the instruction.\n- # ('MOVQ', 'F30F7ECB', 0x40, 'movq xmm1,xmm3', 'movq xmm1,xmm3'),\n- # ('MOVQ (F3)', 'F30F7E0D41414100', 0x40, 'movq xmm1,qword [0x00414141]', 'movq xmm1,qword [0x00414141]'),\n- # ('MOVDQU', 'F30F6FCA', 0x40, 'movdqu xmm1,xmm2', 'movdqu xmm1, xmm2'),\n- # ('MOVDQU (REP)', 'F3F30F6FCA', 0x40, 'rep: movdqu xmm1,xmm2', 'rep: movdqu xmm1, xmm2'),\n+ ('CVTDQ2PD', 'f30fe6c0', 0x40, 'cvtdq2pd xmm0,xmm0', 'cvtdq2pd xmm0,xmm0'),\n+ ('MOVQ', 'F30F7ECB', 0x40, 'movq xmm1,xmm3', 'movq xmm1,xmm3'),\n+ ('MOVQ (F3)', 'F30F7E0D41414100', 0x40, 'movq xmm1,qword [0x00414141]', 'movq xmm1,qword [0x00414141]'),\n+ ('MOVSD', 'f20f10ca', 0x40, 'movsd xmm1,xmm2', 'movsd xmm1,xmm2'),\n+ ('MOVSD (PREFIX)', 'f3f20f10ca', 0x40, 'rep: movsd xmm1,xmm2', 'rep: movsd xmm1,xmm2'),\n+ ('POPCNT', '66f30fb8c3', 0x40, 'popcnt ax,bx', 'popcnt ax,bx'),\n+ ('POPCNT', 'f30fb8c4', 0x40, 'popcnt eax,esp', 'popcnt eax,esp'),\n+ ('POPCNT', 'f30fb80541414100', 0x40, 'popcnt eax,dword [0x00414141]', 'popcnt eax,dword [0x00414141]'),\n+ ('LZCNT', 'f30fbdc4', 0x40, 'lzcnt eax,esp', 'lzcnt eax,esp'),\n+ ('LZCNT', 'f30fbd0541414100', 0x40, 'lzcnt eax,dword [0x00414141]', 'lzcnt eax,dword [0x00414141]'),\n+ ('MOVDQU', 'F30F6FCA', 0x40, 'movdqu xmm1,xmm2', 'movdqu xmm1,xmm2'),\n+ ('MOVDQU (MEM)', 'F30F6F4810', 0x40, 'movdqu xmm1,qword [eax + 16]', 'movdqu xmm1,qword [eax + 16]'),\n+ ('MOVDQU (REP)', 'F3F30F6FCA', 0x40, 'movdqu xmm1,xmm2', 'movdqu xmm1,xmm2'),\n]\n@@ -181,14 +193,14 @@ class i386InstructionSet(unittest.TestCase):\nself.assertEqual( repr(op), oprepr )\nopvars = vars(op)\nfor opk,opv in opcheck.items():\n- #print \"op: %s %s\" % (opk,opv)\n+ # print(\"op: %s %s\" % (opk,opv))\nself.assertEqual( (opk, opvars.get(opk)), (opk, opv) )\nfor oidx in range(len(op.opers)):\noper = op.opers[oidx]\nopervars = vars(oper)\nfor opk,opv in opercheck[oidx].items():\n- #print \"oper: %s %s\" % (opk,opv)\n+ # print(\"oper: %s %s\" % (opk,opv))\nself.assertEqual( (opk, opervars.get(opk)), (opk, opv) )\nvw = vivisect.VivWorkspace()\n@@ -234,8 +246,6 @@ class i386InstructionSet(unittest.TestCase):\nopercheck = ( {'disp': 0, 'tsize': 4, '_is_deref': True, 'reg': 0}, {'tsize': 4, 'reg': 35} )\nself.checkOpcode( opbytez, 0x4000, oprepr, opcheck, opercheck, oprepr )\n-\n-\ndef test_envi_i386_disasm_Imm_Operands(self):\n'''\ntest an opcode encoded with an Imm operand\n@@ -293,7 +303,7 @@ class i386InstructionSet(unittest.TestCase):\ndef test_envi_i386_disasm_SIB_Operands(self):\n'''\nexercize the entire SIB operand space\n- A jmp fa\n+ A jmp ea\nE lar 0f02\nQ cvttps2pi 0f2c\nW cvttps2pi 0f2c\n@@ -311,7 +321,7 @@ class i386InstructionSet(unittest.TestCase):\nself.checkOpcode( opbytez, 0x4000, oprepr, opcheck, opercheck, oprepr )\nopbytez = '0f2caabbccddeeff'\n- oprepr = 'cvttps2pi qword [edx - 287454021],oword [edx - 287454021]'\n+ oprepr = 'cvttps2pi mm5,qword [edx - 287454021]'\nopcheck = {'iflags': 65536, 'va': 16384, 'repr': None, 'prefixes': 0, 'mnem': 'cvttps2pi', 'opcode': 61440}\n- opercheck = [{'disp': -287454021, 'tsize': 8, '_is_deref': True, 'reg': 2}, {'disp': -287454021, 'tsize': 16, '_is_deref': True, 'reg': 2}]\n+ opercheck = [{'tsize': 8, 'reg': 13}, {'disp': -287454021, 'tsize': 8, '_is_deref': True, 'reg': 2}]\nself.checkOpcode(opbytez, 0x4000, oprepr, opcheck, opercheck, oprepr)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
First cut at better prefix handling
|
718,765 |
06.06.2019 10:05:38
| 14,400 |
4770f2ce8e206b7e73ce69dfa1a2ccc9c5415037
|
remove old prove calls.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/symboliks/analysis.py",
"new_path": "vivisect/symboliks/analysis.py",
"diff": "@@ -519,7 +519,7 @@ class SymbolikAnalysisContext:\nfor coneff in newcons:\n# bail if the constraint is dorked\nif coneff.cons.isDiscrete():\n- if not coneff.cons.prove():\n+ if not coneff.cons._solve():\nprint('TRIM: %s' % (str(coneff.cons),))\nreturn False\ncontinue\n@@ -595,7 +595,7 @@ class SymbolikAnalysisContext:\nif self.consolve:\n# If any of the constraints are discrete and false we skip the path\n[ c.reduce() for c in constraints ]\n- discs = [ c.cons.prove() for c in constraints if c.cons.isDiscrete() ]\n+ discs = [ c.cons._solve() for c in constraints if c.cons.isDiscrete() ]\n#print 'CONS',constraints\n#print 'DISCS',discs\nif not all( discs ): # emtpy discs is True...\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
remove old prove calls.
|
718,765 |
10.06.2019 13:36:13
| 14,400 |
beb9c013c1291c739f47b170ab0658981ea613e5
|
Few more tests and instructions. Looks like f20f table is fixed
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/disasm.py",
"new_path": "envi/archs/i386/disasm.py",
"diff": "@@ -803,11 +803,10 @@ class i386Disasm:\nraise \"OPERSIZE FAIL: %.8x\" % opertype\nif prefixes & PREFIX_OP_SIZE:\n-\nmode = MODE_16\n- #print \"OPERTYPE\",hex(opertype)\n- #print \"SIZELIST\",repr(sizelist)\n+ # print(\"OPERTYPE\", hex(opertype))\n+ # print(\"SIZELIST\", repr(sizelist))\nreturn sizelist[mode]\ndef disasm(self, bytez, offset, va):\n@@ -931,12 +930,11 @@ class i386Disasm:\nbreak\n# print(\"ADDRTYPE: %.8x OPERTYPE: %.8x\" % (addrmeth, opertype))\n-\n+ # print(\"ALLPREFIXES 0x%x\" % (all_prefixes))\ntsize = self._dis_calc_tsize(opertype, all_prefixes, operflags)\n# print(hex(opertype), hex(addrmeth), hex(tsize))\n-\n# If addrmeth is zero, we have operands embedded in the opcode\nif addrmeth == 0:\nosize = 0\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/opcode86.py",
"new_path": "envi/archs/i386/opcode86.py",
"diff": "@@ -836,7 +836,7 @@ tbl32_F20F[0x12] = (0, INS_MOV, ADDRMETH_V | OPTYPE_sd | OP_W, ADDRMETH_W | OPTY\ntbl32_F20F[0x2a] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_sd | OP_W, ADDRMETH_E | OPTYPE_ds | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvtsi2sd\", 0, 0, 0)\ntbl32_F20F[0x2c] = (0, INS_OTHER, ADDRMETH_G | OPTYPE_q | OP_W, ADDRMETH_W | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvttsd2si\", 0, 0, 0)\ntbl32_F20F[0x2d] = (0, INS_OTHER, ADDRMETH_G | OPTYPE_d | OP_W, ADDRMETH_W | OPTYPE_sd | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvtsd2si\", 0, 0, 0)\n-#tbl32_F20F[0x38] = (61, 0, 0, 0, 0, 0, 0, 0, 0, 0)\n+tbl32_F20F[0x38] = (61, 0, 0, 0, 0, 0, 0, 0, 0, 0)\ntbl32_F20F[0x51] = (0, INS_ARITH, ADDRMETH_V | OPTYPE_sd | OP_W, ADDRMETH_W | OPTYPE_sd | OP_R, ARG_NONE, cpu_PENTIUM2, \"sqrtsd\", 0, 0, 0)\ntbl32_F20F[0x58] = (0, INS_ADD, ADDRMETH_V | OPTYPE_sd | OP_W, ADDRMETH_W | OPTYPE_sd | OP_R, ARG_NONE, cpu_PENTIUM2, \"addsd\", 0, 0, 0)\ntbl32_F20F[0x59] = (0, INS_MUL, ADDRMETH_V | OPTYPE_sd | OP_R, ADDRMETH_W | OPTYPE_sd | OP_R, ARG_NONE, cpu_PENTIUM2, \"mulsd\", 0, 0, 0)\n@@ -856,6 +856,10 @@ tbl32_F20F[0xe6] = (0, INS_MUL, ADDRMETH_V | OPTYPE_x | OP_W, ADDRMETH_W | OPTYP\ntbl32_F20F[0xf0] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_M | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"lddqu\", 0, 0, 0)\n+tbl32_F20F38 = [(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0) for x in xrange(2)]\n+tbl32_F20F38[0] = (0, INS_OTHER, ADDRMETH_G | OPTYPE_d | OP_W, ADDRMETH_E | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTIUM, \"crc32\", 0, 0, 0)\n+tbl32_F20F38[1] = (0, INS_OTHER, ADDRMETH_G | OPTYPE_d | OP_W, ADDRMETH_E | OPTYPE_z | OP_R, ARG_NONE, cpu_PENTIUM, \"crc32\", 0, 0, 0)\n+\n\"\"\"\n(optable, optype, operand 0, operand 1, operand 2, CPU required, \"opcodename\", op0Register, op1Register, op2Register)\n\"\"\"\n@@ -2383,7 +2387,7 @@ tables86=[\n(tbl32_660F3A, 0, 0xff, 0, 0xff), # 58 - unused at present\n(tbl32_660F71, 3, 0x7, 0, 0xff), # 59\n(tbl32_660F72, 3, 0x7, 0, 0xff), # 60\n- #(tbl32_F20F38, ) # 61\n+ (tbl32_F20F38, 0, 0xff, 0xf0, 0xff), # 61\n]\nregs=[\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_i386.py",
"new_path": "envi/tests/test_arch_i386.py",
"diff": "@@ -114,6 +114,10 @@ i386MultiByteOpcodes = [\n('SQRTSS', 'f30f51d9', 0x40, 'sqrtss xmm3,xmm1', 'sqrtss xmm3,xmm1'),\n('VMXON', 'f30fc73541414100', 0x40, 'vmxon qword [0x00414141]', 'vmxon qword [0x00414141]'),\n('MULSD', 'f20f59c1', 0x40, 'mulsd xmm0,xmm1', 'mulsd xmm0,xmm1'),\n+ ('VMCLEAR', '660FC73541414100', 0x40, 'vmclear qword [0x00414141]', 'vmclear qword [0x00414141]'),\n+ ('CRC 1', 'f20f38f0e8', 0x40, 'crc32 ebp,al', 'crc32 ebp,al'),\n+ ('CRC 2', '66f20f38f1C3', 0x40, 'crc32 eax,bx', 'crc32 eax,bx'),\n+ ('CRC 3', 'f20f38f1C3', 0x40, 'crc32 eax,ebx', 'crc32 eax,ebx'),\n]\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Few more tests and instructions. Looks like f20f table is fixed
|
718,765 |
10.06.2019 14:30:04
| 14,400 |
cc61468014d68c4ad009ffcd46b959362e046cbf
|
Make bulk processing runnable without pyqt
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/cli.py",
"new_path": "vivisect/cli.py",
"diff": "@@ -35,7 +35,6 @@ import envi.expression as e_expr\nimport envi.memcanvas as e_canvas\nimport envi.memcanvas.renderers as e_render\n-from vqt.main import vqtevent\nfrom vivisect.const import *\nclass VivCli(e_cli.EnviCli, vivisect.VivWorkspace):\n@@ -353,7 +352,8 @@ class VivCli(e_cli.EnviCli, vivisect.VivWorkspace):\n# set the color for each finding\ncolor = options.markColor\ncolormap = { va : color for va in res }\n- if self._viv_gui != None:\n+ if self._viv_gui is not None:\n+ from vqt.main import vqtevent\nvqtevent('viv:colormap', colormap)\nself.vprint('matches for: %s (%s)' % (pattern.encode('hex'), repr(pattern)))\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Make bulk processing runnable without pyqt
|
718,765 |
10.06.2019 16:08:47
| 14,400 |
6258c50e404bfeff9f34be6afb5d69130f7b2e39
|
more instructions and corresponding tests
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/opcode86.py",
"new_path": "envi/archs/i386/opcode86.py",
"diff": "@@ -929,6 +929,7 @@ tbl32_0F01_00BF = [\n]\ntbl32_0F01_rest = [\n+# 0f01c0\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"vmcall\", 0, 0, 0),\n(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"vmlaunch\", 0, 0, 0),\n@@ -939,19 +940,20 @@ tbl32_0F01_rest = [\n(0, INS_SYSTEM, ADDRMETH_E | OPTYPE_w | OP_W, ARG_NONE, ARG_NONE, cpu_80386, \"lmsw\", 0, 0, 0),\n(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"monitor\", 0, 0, 0),\n(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"mwait\", 0, 0, 0),\n+(0, INS_CLEARAF, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"clac\", 0, 0, 0),\n+(0, INS_SETAF, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"stac\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n+# 0f01d0\n+(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"xgetbv\", 0, 0, 0),\n+(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"xsetbv\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n- (0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-( 0, INS_SYSTEM, ADDRMETH_E | OPTYPE_w | OP_W, ARG_NONE, ARG_NONE, cpu_80386, \"smsw\", 0, 0, 0),\n-(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n-( 0, INS_SYSTEM, ADDRMETH_E | OPTYPE_w | OP_W, ARG_NONE, ARG_NONE, cpu_80386, \"lmsw\", 0, 0, 0),\n+(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80386, \"vmfunc\", 0, 0, 0),\n+(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_PENTIUM, \"xend\", 0, 0, 0),\n+(0, INS_SYSTEM, ARG_NONE, ARG_NONE, ARG_NONE, cpu_80386, \"xtest\", 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n(0, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0),\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/opconst.py",
"new_path": "envi/archs/i386/opconst.py",
"diff": "@@ -170,6 +170,9 @@ INS_SETOF = INS_FLAG | 0x09\nINS_SETDF = INS_FLAG | 0x0A\nINS_SETSF = INS_FLAG | 0x0B\nINS_SETPF = INS_FLAG | 0x0C\n+INS_CLEARAF = INS_FLAG | 0x0D\n+INS_SETAF = INS_FLAG | 0x0E\n+\nINS_TOGCF = INS_FLAG | 0x10 # /* toggle */\nINS_TOGZF = INS_FLAG | 0x20\nINS_TOGOF = INS_FLAG | 0x30\n@@ -177,14 +180,14 @@ INS_TOGDF = INS_FLAG | 0x40\nINS_TOGSF = INS_FLAG | 0x50\nINS_TOGPF = INS_FLAG | 0x60\n-INS_TRAP = INS_TRAPS | 0x01 #/* generate trap */\n-INS_TRAPCC = INS_TRAPS | 0x02 #/* conditional trap gen */\n-INS_TRET = INS_TRAPS | 0x03 #/* return from trap */\n-INS_BOUNDS = INS_TRAPS | 0x04 #/* gen bounds trap */\n-INS_DEBUG = INS_TRAPS | 0x05 #/* gen breakpoint trap */\n-INS_TRACE = INS_TRAPS | 0x06 #/* gen single step trap */\n-INS_INVALIDOP= INS_TRAPS | 0x07 # /* gen invalid instruction */\n-INS_OFLOW = INS_TRAPS | 0x08 # /* gen overflow trap */\n+INS_TRAP = INS_TRAPS | 0x01 # generate trap\n+INS_TRAPCC = INS_TRAPS | 0x02 # conditional trap gen\n+INS_TRET = INS_TRAPS | 0x03 # return from trap\n+INS_BOUNDS = INS_TRAPS | 0x04 # gen bounds trap\n+INS_DEBUG = INS_TRAPS | 0x05 # gen breakpoint trap\n+INS_TRACE = INS_TRAPS | 0x06 # gen single step trap\n+INS_INVALIDOP = INS_TRAPS | 0x07 # gen invalid instruction\n+INS_OFLOW = INS_TRAPS | 0x08 # gen overflow trap\n#/* INS_SYSTEM */\nINS_HALT = INS_SYSTEM | 0x01 # /* halt machine */\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_i386.py",
"new_path": "envi/tests/test_arch_i386.py",
"diff": "@@ -118,6 +118,13 @@ i386MultiByteOpcodes = [\n('CRC 1', 'f20f38f0e8', 0x40, 'crc32 ebp,al', 'crc32 ebp,al'),\n('CRC 2', '66f20f38f1C3', 0x40, 'crc32 eax,bx', 'crc32 eax,bx'),\n('CRC 3', 'f20f38f1C3', 0x40, 'crc32 eax,ebx', 'crc32 eax,ebx'),\n+ ('CLAC', '0f01ca414141', 0x40, 'clac ', 'clac '),\n+ ('STAC', '0f01cb414141', 0x40, 'stac ', 'stac '),\n+ ('VMFUNC', '0f01d44141', 0x40, 'vmfunc ', 'vmfunc '),\n+ ('XEND', '0f01d54141', 0x40, 'xend ', 'xend '),\n+ ('XGETBV', '0f01d04141', 0x40, 'xgetbv ', 'xgetbv '),\n+ ('XSETBV', '0f01d14141', 0x40, 'xsetbv ', 'xsetbv '),\n+ ('XTEST', '0f01d64141', 0x40, 'xtest ', 'xtest '),\n]\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
more instructions and corresponding tests
|
718,765 |
17.06.2019 09:29:25
| 14,400 |
f44bdd966ad36bf25559ea7e0a82b56440275682
|
Fixups to the tables as per my unit tests
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/amd64/opcode64.py",
"new_path": "envi/archs/amd64/opcode64.py",
"diff": "@@ -755,10 +755,10 @@ tbl32_660F[0x7d] = ( 0, INS_MOV, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_H |\ntbl32_660F[0x7e] = ( 0, INS_MOV, ADDRMETH_E | OPTYPE_y | OP_W, ADDRMETH_V | OPTYPE_y | OP_R, ARG_NONE, ARG_NONE, cpu_PENTMMX, \"movd\", 0, 0, 0)\ntbl32_660F[0x7f] = ( 0, INS_MOV, ADDRMETH_W | OPTYPE_x | OP_W, ADDRMETH_V | OPTYPE_x | OP_R, ARG_NONE, ARG_NONE, cpu_PENTMMX, \"movq\", 0, 0, 0)\n-tbl32_660F[0xc0] = ( 0, INS_ADD, ADDRMETH_E | OPTYPE_b | OP_W, ADDRMETH_G | OPTYPE_b | OP_W, ARG_NONE, ARG_NONE, cpu_80486, \"xadd\", 0, 0, 0)\n-tbl32_660F[0xc1] = ( 0, INS_ADD, ADDRMETH_E | OPTYPE_v | OP_W, ADDRMETH_G | OPTYPE_v, ARG_NONE, ARG_NONE, cpu_80486, \"xadd\", 0, 0, 0)\n+# tbl32_660F[0xc0] = ( 0, INS_ADD, ADDRMETH_E | OPTYPE_b | OP_W, ADDRMETH_G | OPTYPE_b | OP_W, ARG_NONE, ARG_NONE, cpu_80486, \"xadd\", 0, 0, 0)\n+# tbl32_660F[0xc1] = ( 0, INS_ADD, ADDRMETH_E | OPTYPE_v | OP_W, ADDRMETH_G | OPTYPE_v, ARG_NONE, ARG_NONE, cpu_80486, \"xadd\", 0, 0, 0)\ntbl32_660F[0xc2] = ( 0, INS_CMP, ADDRMETH_V | OPTYPE_pd| OP_W, ADDRMETH_W | OPTYPE_pd| OP_W, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTIUM2, \"cmppd\", 0, 0, 0) #### 4 args!\n-tbl32_660F[0xc3] = ( 0, INS_MOV, ADDRMETH_M | OPTYPE_q | OP_W, ADDRMETH_G | OPTYPE_q |OP_R, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"movnti\", 0, 0, 0)\n+# tbl32_660F[0xc3] = ( 0, INS_MOV, ADDRMETH_M | OPTYPE_q | OP_W, ADDRMETH_G | OPTYPE_q |OP_R, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"movnti\", 0, 0, 0)\ntbl32_660F[0xc4] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_E | OPTYPE_w | OP_R, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTIUM2, \"pinsrw\", 0, 0, 0)\ntbl32_660F[0xc5] = ( 0, INS_OTHER, ADDRMETH_G | OPTYPE_d | OP_W, ADDRMETH_U | OPTYPE_dq | OP_R, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTIUM2, \"pextrw\", 0, 0, 0)\ntbl32_660F[0xc6] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ADDRMETH_I | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTIUM2, \"shufps\", 0, 0, 0)\n@@ -804,7 +804,7 @@ tbl32_660F[0xf3] = ( 0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W\ntbl32_660F[0xf4] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, ARG_NONE, cpu_PENTMMX, \"pmuludq\", 0, 0, 0)\ntbl32_660F[0xf5] = (0, INS_ADD, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, ARG_NONE, cpu_PENTMMX, \"pmaddwd\", 0, 0, 0)\ntbl32_660F[0xf6] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"psadbw\", 0, 0, 0)\n-tbl32_660F[0xf7] = ( 0, INS_MOV, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_U | OPTYPE_dq | OP_R, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"maskmovq\", 0, 0, 0)\n+# tbl32_660F[0xf7] = (0, INS_MOV, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_U | OPTYPE_dq | OP_R, ARG_NONE, ARG_NONE, cpu_PENTIUM2, \"maskmovq\", 0, 0, 0) # marked as not prefix\ntbl32_660F[0xf8] = (0, INS_SUB, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, ARG_NONE, cpu_PENTMMX, \"psubb\", 0, 0, 0)\ntbl32_660F[0xf9] = (0, INS_SUB, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, ARG_NONE, cpu_PENTMMX, \"psubw\", 0, 0, 0)\ntbl32_660F[0xfa] = (0, INS_SUB, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, ARG_NONE, cpu_PENTMMX, \"psubd\", 0, 0, 0)\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/opcode86.py",
"new_path": "envi/archs/i386/opcode86.py",
"diff": "@@ -373,7 +373,7 @@ tbl32_0F = [\n( 0, INS_MOVCC, ADDRMETH_G | OPTYPE_v | OP_W, ADDRMETH_E | OPTYPE_v | OP_R, ARG_NONE, cpu_PENTPRO, \"cmovle\", 0, 0, 0),\n( 0, INS_MOVCC, ADDRMETH_G | OPTYPE_v | OP_W, ADDRMETH_E | OPTYPE_v | OP_R, ARG_NONE, cpu_PENTPRO, \"cmovg\", 0, 0, 0),\n# 0f50\n-( 0, INS_MOV, ADDRMETH_G | OPTYPE_d | OP_W, ADDRMETH_U | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"movmskps\", 0, 0, 0),\n+( 0, INS_MOV, ADDRMETH_G | OPTYPE_d | OP_W, ADDRMETH_Z | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"movmskps\", 0, 0, 0),\n( 0, INS_ARITH, ADDRMETH_V | OPTYPE_ps | OP_W, ADDRMETH_W | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"sqrtps\", 0, 0, 0),\n( 0, INS_ARITH, ADDRMETH_V | OPTYPE_ps | OP_W, ADDRMETH_W | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"rsqrtps\", 0, 0, 0),\n( 0, INS_OTHER, ADDRMETH_V | OPTYPE_ps | OP_W, ADDRMETH_W | OPTYPE_ps | OP_R, ARG_NONE, cpu_PENTIUM2, \"rcpps\", 0, 0, 0),\n@@ -568,8 +568,8 @@ tbl32_660F[0x12] = (0, INS_MOV, ADDRMETH_V | OPTYPE_q | OP_W, ADDRMETH_M | OPTYP\ntbl32_660F[0x13] = (0, INS_MOV, ADDRMETH_M | OPTYPE_q | OP_W, ADDRMETH_V | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTIUM2, \"movlpd\", 0, 0, 0)\ntbl32_660F[0x14] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ARG_NONE, cpu_PENTIUM2,\"unpcklpd\", 0, 0, 0)\ntbl32_660F[0x15] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ARG_NONE, cpu_PENTIUM2,\"unpckhpd\", 0, 0, 0)\n-tbl32_660F[0x16] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_M | OPTYPE_pd | OP_R, ARG_NONE, cpu_PENTIUM2, \"movhpd\", 0, 0, 0)\n-tbl32_660F[0x17] = (0, INS_OTHER, ADDRMETH_M | OPTYPE_pd | OP_W, ADDRMETH_V | OPTYPE_pd | OP_R, ARG_NONE, cpu_PENTIUM2, \"movhpd\", 0, 0, 0)\n+tbl32_660F[0x16] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_M | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"movhpd\", 0, 0, 0)\n+tbl32_660F[0x17] = (0, INS_OTHER, ADDRMETH_M | OPTYPE_dq | OP_W, ADDRMETH_V | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"movhpd\", 0, 0, 0)\ntbl32_660F[0x28] = (0, INS_MOV, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ARG_NONE, cpu_PENTIUM2, \"movapd\", 0, 0, 0)\ntbl32_660F[0x29] = (0, INS_MOV, ADDRMETH_W | OPTYPE_pd | OP_W, ADDRMETH_V | OPTYPE_pd | OP_R, ARG_NONE, cpu_PENTIUM2, \"movapd\", 0, 0, 0)\ntbl32_660F[0x2A] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_Q | OPTYPE_pi | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvtpi2pd\", 0, 0, 0)\n@@ -582,7 +582,7 @@ tbl32_660F[0x2F] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_W | OP\ntbl32_660F[0x38] = (56, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0)\ntbl32_660F[0x3a] = (58, 0, ARG_NONE, ARG_NONE, ARG_NONE, 0, 0, 0, 0, 0)\n-tbl32_660F[0x50] = (0, INS_MOV, ADDRMETH_G | OPTYPE_b | OP_W, ADDRMETH_V | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTIUM2, \"movmskpd\", 0, 0, 0)\n+tbl32_660F[0x50] = (0, INS_MOV, ADDRMETH_G | OPTYPE_d | OP_W, ADDRMETH_Z | OPTYPE_b | OP_R, ARG_NONE, cpu_PENTIUM2, \"movmskpd\", 0, 0, 0)\ntbl32_660F[0x51] = (0, INS_ARITH, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ARG_NONE, cpu_PENTIUM2, \"sqrtpd\", 0, 0, 0)\ntbl32_660F[0x54] = (0, INS_AND, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ARG_NONE, cpu_PENTIUM2, \"andpd\", 0, 0, 0)\ntbl32_660F[0x55] = (0, INS_AND, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ARG_NONE, cpu_PENTIUM2, \"andnpd\", 0, 0, 0)\n@@ -623,7 +623,61 @@ tbl32_660F[0x7c] = (0, INS_ADD, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_W | OPTY\ntbl32_660F[0x7d] = (0, INS_SUB, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ARG_NONE, cpu_PENTIUM2, \"hsubpd\", 0, 0, 0)\ntbl32_660F[0x7e] = (0, INS_MOV, ADDRMETH_E | OPTYPE_d | OP_W, ADDRMETH_V | OPTYPE_d | OP_R, ARG_NONE, cpu_PENTIUM2, \"movd\", 0, 0, 0)\ntbl32_660F[0x7f] = (0, INS_MOV, ADDRMETH_W | OPTYPE_x | OP_W, ADDRMETH_V | OPTYPE_x | OP_R, ARG_NONE, cpu_PENTIUM2, \"movdqa\", 0, 0, 0)\n-\n+tbl32_660F[0xc2] = (0, INS_CMP, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ADDRMETH_I | OPTYPE_b | OP_R, cpu_PENTIUM2, \"cmppd\", 0, 0, 0)\n+tbl32_660F[0xc4] = (0, INS_MOV, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_E | OPTYPE_w | OP_R, ADDRMETH_I | OPTYPE_b | OP_R, cpu_PENTIUM2, \"pinsrw\", 0, 0, 0)\n+tbl32_660F[0xc5] = (0, INS_MOV, ADDRMETH_G | OPTYPE_d | OP_W, ADDRMETH_Z | OPTYPE_w | OP_R, ADDRMETH_I | OPTYPE_b | OP_R, cpu_PENTIUM2, \"pextrw\", 0, 0, 0)\n+tbl32_660F[0xc6] = (0, INS_MOV, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ADDRMETH_I | OPTYPE_b | OP_R, cpu_PENTIUM2, \"shufpd\", 0, 0, 0)\n+tbl32_660F[0xc7] = (47, 0, 0, 0, 0, 0, 0, 0, 0, 0)\n+\n+tbl32_660F[0xd0] = (0, INS_ARITH, ADDRMETH_V | OPTYPE_pd | OP_W, ADDRMETH_W | OPTYPE_pd | OP_R, ARG_NONE, cpu_PENTMMX, \"addsubpd\", 0, 0, 0)\n+tbl32_660F[0xd1] = (0, INS_SHR, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlw\", 0, 0, 0)\n+tbl32_660F[0xd2] = (0, INS_SHR, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"psrld\", 0, 0, 0)\n+tbl32_660F[0xd3] = (0, INS_SHR, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"psrlq\", 0, 0, 0)\n+tbl32_660F[0xd4] = (0, INS_ADD, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"paddq\", 0, 0, 0)\n+tbl32_660F[0xd5] = (0, INS_MUL, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"pmullw\", 0, 0, 0)\n+tbl32_660F[0xd6] = (0, INS_MOV, ADDRMETH_W | OPTYPE_q | OP_W, ADDRMETH_V | OPTYPE_q | OP_R, ARG_NONE, cpu_PENTMMX, \"movq\", 0, 0, 0)\n+tbl32_660F[0xd7] = (0, INS_OTHER, ADDRMETH_G | OPTYPE_d | OP_W, ADDRMETH_V | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"pmovmskb\", 0, 0, 0)\n+tbl32_660F[0xd8] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"psubusb\", 0, 0, 0)\n+tbl32_660F[0xd9] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"psubusw\", 0, 0, 0)\n+tbl32_660F[0xda] = (0, INS_ARITH, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"pminub\", 0, 0, 0)\n+tbl32_660F[0xdb] = (0, INS_AND, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"pand\", 0, 0, 0)\n+tbl32_660F[0xdc] = (0, INS_ADD, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"paddusb\", 0, 0, 0)\n+tbl32_660F[0xdd] = (0, INS_ADD, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"paddusw\", 0, 0, 0)\n+tbl32_660F[0xde] = (0, INS_ARITH, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"pmaxub\", 0, 0, 0)\n+tbl32_660F[0xdf] = (0, INS_AND, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTMMX, \"pandn\", 0, 0, 0)\n+\n+tbl32_660F[0xe0] = (0, INS_ARITH, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"pavgb\", 0, 0, 0)\n+tbl32_660F[0xe1] = (0, INS_SHR, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"psraw\", 0, 0, 0)\n+tbl32_660F[0xe2] = (0, INS_SHR, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"psrad\", 0, 0, 0)\n+tbl32_660F[0xe3] = (0, INS_ARITH, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"pavgb\", 0, 0, 0)\n+tbl32_660F[0xe4] = (0, INS_MUL, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"pmulhuw\", 0, 0, 0)\n+tbl32_660F[0xe5] = (0, INS_MUL, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"pmulhw\", 0, 0, 0)\n+\n+# tbl32_660F[0xe6] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_ | OP_W, ADDRMETH_W | OPTYPE_ | OP_R, ARG_NONE, cpu_PENTIUM2, \"cvttpd2dq\", 0, 0, 0)\n+tbl32_660F[0xe7] = (0, INS_MOV, ADDRMETH_M | OPTYPE_dq | OP_W, ADDRMETH_V | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"movntdq\", 0, 0, 0)\n+tbl32_660F[0xe8] = (0, INS_SUB, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"psubsb\", 0, 0, 0)\n+tbl32_660F[0xe9] = (0, INS_SUB, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"psubsw\", 0, 0, 0)\n+tbl32_660F[0xea] = (0, INS_ARITH, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"pminsw\", 0, 0, 0)\n+tbl32_660F[0xeb] = (0, INS_OR, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"por\", 0, 0, 0)\n+tbl32_660F[0xec] = (0, INS_ADD, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"paddsb\", 0, 0, 0)\n+tbl32_660F[0xed] = (0, INS_ADD, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"paddsw\", 0, 0, 0)\n+tbl32_660F[0xee] = (0, INS_ARITH, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"pmaxsw\", 0, 0, 0)\n+tbl32_660F[0xef] = (0, INS_XOR, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"pxor\", 0, 0, 0)\n+\n+tbl32_660F[0xf1] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"psllw\", 0, 0, 0)\n+tbl32_660F[0xf2] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"pslld\", 0, 0, 0)\n+tbl32_660F[0xf3] = (0, INS_OTHER, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"psllq\", 0, 0, 0)\n+tbl32_660F[0xf4] = (0, INS_MUL, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"pmuludq\", 0, 0, 0)\n+tbl32_660F[0xf5] = (0, INS_ARITH, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"pmaddwd\", 0, 0, 0)\n+tbl32_660F[0xf6] = (0, INS_ARITH, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"psadbw\", 0, 0, 0)\n+\n+tbl32_660F[0xf8] = (0, INS_SUB, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"psubb\", 0, 0, 0)\n+tbl32_660F[0xf9] = (0, INS_SUB, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"psubw\", 0, 0, 0)\n+tbl32_660F[0xfa] = (0, INS_SUB, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"psubd\", 0, 0, 0)\n+tbl32_660F[0xfb] = (0, INS_SUB, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"psubq\", 0, 0, 0)\n+tbl32_660F[0xfc] = (0, INS_ADD, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"paddb\", 0, 0, 0)\n+tbl32_660F[0xfd] = (0, INS_ADD, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"paddw\", 0, 0, 0)\n+tbl32_660F[0xfe] = (0, INS_ADD, ADDRMETH_V | OPTYPE_dq | OP_W, ADDRMETH_W | OPTYPE_dq | OP_R, ARG_NONE, cpu_PENTIUM2, \"paddd\", 0, 0, 0)\n\"\"\"\n(optable, optype, operand 0, operand 1, operand 2, CPU required, \"opcodename\", op0Register, op1Register, op2Register)\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_i386.py",
"new_path": "envi/tests/test_arch_i386.py",
"diff": "@@ -73,12 +73,10 @@ i386MultiByteOpcodes = [\n('PREFIXES', 'f0673e2e65f30f10ca', 0x40, 'addr lock cs ds gs: movss xmm1,xmm2', 'addr lock cs ds gs: movss xmm1,xmm2'),\n('BSR', '0fbdc3414141', 0x40, 'bsr eax,ebx', 'bsr eax,ebx'),\n('LZNT', 'f30fbdc3414141', 0x40, 'lzcnt eax,ebx', 'lzcnt eax,ebx'),\n-\n# Because of how the MODRM Bytes are set, these map to the same instruction\n# TODO: Would these be the same to a real x86 chip?\n('PSRLDQ (66)', '660f73b5aa4141', 0x40, 'psllq xmm5,170', 'psllq xmm5,170'),\n('PSRLDQ (66)', '660f73f5aa4141', 0x40, 'psllq xmm5,170', 'psllq xmm5,170'),\n-\n# Same for these two\n('PSRLDQ (66)', '660f73b1aa4141', 0x40, 'psllq xmm1,170', 'psllq xmm1,170'),\n('PSRLDQ (66)', '660f73b9aa4141', 0x40, 'psldq xmm1,170', 'psldq xmm1,170'),\n@@ -125,16 +123,22 @@ i386MultiByteOpcodes = [\n('XSETBV', '0f01d14141', 0x40, 'xsetbv ', 'xsetbv '),\n('XTEST', '0f01d64141', 0x40, 'xtest ', 'xtest '),\n('MOVUPD', '660f10cc', 0x40, 'movupd xmm1,xmm4', 'movupd xmm1,xmm4'),\n- ('MOVUPD', '660f1018', 0x40, 'movupd xmm3,[eax]', 'movupd xmm3,[eax]'),\n- ('UNPCKLPD', '660F14A241414100', 0x40, 'unpcklpd xmm4,[edx+4276545]', 'unpcklpd xmm4,[edx+4276545]'),\n- ('MOVHPD', '660f16cb', 0x40, 'movhpd xmm1,xmm3', 'movhpd xmm1,xmm3'),\n+ ('MOVUPD', '660f1018', 0x40, 'movupd xmm3,oword [eax]', 'movupd xmm3,oword [eax]'),\n+ ('UNPCKLPD', '660F14A241414100', 0x40, 'unpcklpd xmm4,oword [edx + 4276545]', 'unpcklpd xmm4,oword [edx + 4276545]'),\n+ ('MOVHPD', '660F162541414141', 0x40, 'movhpd xmm4,oword [0x41414141]', 'movhpd xmm4,oword [0x41414141]'),\n+ ('MOVHPD', '660F172D41414141', 0x40, 'movhpd oword [0x41414141],xmm5', 'movhpd oword [0x41414141],xmm5'),\n('MOVMSKPS', '0F50D6', 0x40, 'movmskps edx,xmm6', 'movmskps edx,xmm6'),\n('MOVMSKPD', '660F50D6', 0x40, 'movmskpd edx,xmm6', 'movmskpd edx,xmm6'),\n- ('SUBPD', '660F5C6C240E', 0x40, 'subpd xmm5,[esp+14]', 'subpd xmm5,[esp+14]'),\n- ('MAXPD', '660F5FAB0F270000', 0x40, 'maxpd xmm5,[ebx+9999]', 'maxpd xmm5, [ebx+9999]'),\n- ('XORPD', '660F57BD15CD5B07', 0x40, 'xorpd xmm7,[ebp+123456789]', 'xorpd xmm7,[ebp+123456789]'),\n+ ('SUBPD', '660F5C6C240E', 0x40, 'subpd xmm5,oword [esp + 14]', 'subpd xmm5,oword [esp + 14]'),\n+ ('MAXPD', '660F5FAB0F270000', 0x40, 'maxpd xmm5,oword [ebx + 9999]', 'maxpd xmm5,oword [ebx + 9999]'),\n+ ('XORPD', '660F57BD15CD5B07', 0x40, 'xorpd xmm7,oword [ebp + 123456789]', 'xorpd xmm7,oword [ebp + 123456789]'),\n('SQRTPD', '660f51ca', 0x40, 'sqrtpd xmm1,xmm2', 'sqrtpd xmm1,xmm2'),\n('PSHUFD', '660F70CD11', 0x40, 'pshufd xmm1,xmm5,17', 'pshufd xmm1,xmm5,17'),\n+ ('PEXTRW', '660FC5C307', 0x40, 'pextrw eax,xmm3,7', 'pextrw eax,xmm3,7'),\n+ ('MOVQ', '660FD620', 0x40, 'movq qword [eax],xmm4', 'movq qword [eax],xmm4'),\n+ ('PMAXUB', '660FDE2541414141', 0x40, 'pmaxub xmm4,oword [0x41414141]', 'pmaxub xmm4,oword [0x41414141]'),\n+ ('MOVNTDQ', '660FE73D78563412', 0x40, 'movntdq oword [0x12345678],xmm7', 'movntdq oword [0x12345678],xmm7'),\n+ ('PADDD', '660FFECE', 0x40, 'paddd xmm1,xmm6', 'paddd xmm1,xmm6'),\n]\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Fixups to the tables as per my unit tests
|
718,765 |
18.06.2019 08:55:46
| 14,400 |
5c613ff7a45ef1db529f5848e8439377c066884b
|
More tests and consistency
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/i386/disasm.py",
"new_path": "envi/archs/i386/disasm.py",
"diff": "@@ -861,11 +861,11 @@ class i386Disasm:\nobyte = pref\noffset = mainbyte\nprefixes = all_prefixes & (~onehot)\n- tabdesc = all_tables[0]\nelse:\noffset = mainbyte\nobyte = ord(bytez[offset])\n+ tabdesc = all_tables[0]\nwhile True:\n# print(\"OBYTE\", hex(obyte))\nif (obyte > tabdesc[4]):\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_i386.py",
"new_path": "envi/tests/test_arch_i386.py",
"diff": "@@ -32,6 +32,7 @@ i386SingleByteOpcodes = [\n('rep setg (al)', 'f30f9fc0', 0x40, 'rep: setg al', 'rep: setg al'),\n('rep setg (dl)', 'f30f9fc2', 0x40, 'rep: setg dl', 'rep: setg dl'),\n('prefix scas', 'f2ae', 0x40, 'repnz: scasb ', 'repnz: scasb '),\n+ ('TEST', '84db', 0x40, 'test bl,bl', 'test bl,bl'),\n]\ni386MultiByteOpcodes = [\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
More tests and consistency
|
718,765 |
19.06.2019 11:18:02
| 14,400 |
9e4cb9fd84f2f8ff40216fef418cfa62bb64ab4b
|
Remove UNKs in i386
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/symboliks/archs/i386.py",
"new_path": "vivisect/symboliks/archs/i386.py",
"diff": "@@ -10,6 +10,7 @@ import vivisect.symboliks.translator as vsym_trans\nfrom vivisect.const import *\nfrom vivisect.symboliks.common import *\n+\ndef getSegmentSymbol(op):\nif op.prefixes & e_i386.PREFIX_CS:\nreturn Var('cs', 4)\n@@ -24,6 +25,7 @@ def getSegmentSymbol(op):\nif op.prefixes & e_i386.PREFIX_GS:\nreturn Var('gs', 4)\n+\nclass ArgDefSymEmu(object):\n'''\nAn emulator snapped in to return the symbolic representation of\n@@ -276,11 +278,12 @@ class IntelSymbolikTranslator(vsym_trans.SymbolikTranslator):\nobj = o_and(v1, v2, v1.getWidth())\n- u = UNK(v1, v2)\n- self.effSetVariable('eflags_gt', u)\n- self.effSetVariable('eflags_lt', u)\n+ self.effSetVariable('eflags_gt', gt(v1, v2))\n+ self.effSetVariable('eflags_lt', lt(v1, v2))\nself.effSetVariable('eflags_sf', lt(obj, Const(0, self._psize))) # v1 & v2 < 0\nself.effSetVariable('eflags_eq', eq(obj, Const(0, self._psize))) # v1 & v2 == 0\n+ self.effSetVariable('eflags_of', Const(0, self._psize))\n+ self.effSetVariable('eflags_cf', Const(0, self._psize))\nself.setOperObj(op, 0, obj)\n@@ -477,11 +480,10 @@ class IntelSymbolikTranslator(vsym_trans.SymbolikTranslator):\ndef i_inc(self, op):\nv1 = self.getOperObj(op, 0)\nobj = o_add(v1, Const(1, self._psize), v1.getWidth())\n- u = UNK(obj, Const(1, self._psize))\n- self.effSetVariable('eflags_gt', u)\n- self.effSetVariable('eflags_lt', u)\n- self.effSetVariable('eflags_sf', u)\n- self.effSetVariable('eflags_eq', u)\n+ self.effSetVariable('eflags_gt', gt(v1, obj))\n+ self.effSetVariable('eflags_lt', lt(v1, obj))\n+ self.effSetVariable('eflags_sf', gt(v1, obj))\n+ self.effSetVariable('eflags_eq', eq(onj, Const(0, self._psize)))\nself.setOperObj(op, 0, obj)\ndef i_int3(self, op):\n@@ -653,9 +655,11 @@ class IntelSymbolikTranslator(vsym_trans.SymbolikTranslator):\nv1 = self.getOperObj(op, 0)\nv2 = self.getOperObj(op, 1)\nobj = o_or(v1, v2, v1.getWidth())\n- u = UNK(v1, v2)\n- self.effSetVariable('eflags_gt', u)\n- self.effSetVariable('eflags_lt', u)\n+\n+ self.effSetVariable('eflags_gt', gt(v1, v2))\n+ self.effSetVariable('eflags_lt', lt(v1, v2))\n+ self.effSetVariable('eflags_of', Const(0, self._psize))\n+ self.effSetVariable('eflags_cf', Const(0, self._psize))\nself.effSetVariable('eflags_sf', lt(obj, Const(0, self._psize))) # v1 | v2 < 0\nself.effSetVariable('eflags_eq', eq(obj, Const(0, self._psize))) # v1 & v2 == 0\nself.setOperObj(op, 0, obj)\n@@ -676,11 +680,6 @@ class IntelSymbolikTranslator(vsym_trans.SymbolikTranslator):\nv1 = self.getOperObj(op, 0)\nv2 = self.getOperObj(op, 1)\nobj = o_xor(v1, v2, v1.getWidth())\n- u = UNK(v1, v2)\n- self.effSetVariable('eflags_gt', u)\n- self.effSetVariable('eflags_lt', u)\n- self.effSetVariable('eflags_sf', lt(obj, Const(0, self._psize))) # v1 & v2 < 0\n- self.effSetVariable('eflags_eq', eq(obj, Const(0, self._psize))) # v1 & v2 == 0\nself.setOperObj(op, 0, obj)\ndef i_ret(self, op):\n@@ -698,9 +697,24 @@ class IntelSymbolikTranslator(vsym_trans.SymbolikTranslator):\n# Arithmetic shifts are multiplies and divides!\nres = o_div(v1, o_pow(Const(2, self._psize), v2, self._psize), v1.getWidth())\n- u = UNK(v1, v2)\n- self.effSetVariable('eflags_gt', u)\n- self.effSetVariable('eflags_lt', u)\n+ if v2.isDiscrete():\n+ bit = v2.solve()\n+ if bit == 1:\n+ self.effSetVariable('eflags_of', Const(0, self._psize))\n+ if bit != 0:\n+ power = o_pow(Const(2, self._psize), Const(bit, self._psize), self._psize)\n+ cf = o_div(v1 & power, power, v1.getWidth())\n+ self.effSetVariable('eflags_cf', cf)\n+ # TODO: I'm hesitant to put this in here blindly, because on a shift of 0, we'd generate an effect\n+ # that doesn't happen\n+ #else:\n+ # power = o_pow(Const(2, self._psize), v2, self._psize)\n+ # cf = o_div(v1 & power, power, v1.getWidth())\n+ # cf = v1 & (o_pow(2, self._psize), v2, self._psize - 1)\n+\n+\n+ self.effSetVariable('eflags_gt', gt(v1, v2))\n+ self.effSetVariable('eflags_lt', lt(v1, v2))\nself.effSetVariable('eflags_sf', lt(res, Const(0, self._psize))) # v1 | v2 < 0\nself.effSetVariable('eflags_eq', eq(res, Const(0, self._psize))) # v1 & v2 == 0\n@@ -835,31 +849,38 @@ class IntelSymbolikTranslator(vsym_trans.SymbolikTranslator):\n#v2 = v2 & 0xff\n# No effect (not even flags) if shift is 0\n- #if v2.solve() == 0:\n- #return\n+ if v2.isDiscrete() and v2.solve() == 0:\n+ return\n- self.setOperObj(op, 0, v1 << v2)\n+ res = v1 << v2\n+ self.setOperObj(op, 0, res)\n- u = UNK(v1, v2) # COP OUT FOR NOW...\n- self.effSetVariable('eflags_gt', u)\n- self.effSetVariable('eflags_lt', u)\n- self.effSetVariable('eflags_sf', u)\n- self.effSetVariable('eflags_eq', u)\n+ self.effSetVariable('eflags_gt', gt(res, Const(0, self._psize)))\n+ self.effSetVariable('eflags_lt', lt(res, Const(0, self._psize)))\n+ self.effSetVariable('eflags_sf', lt(res, Const(0, self._psize)))\n+ self.effSetVariable('eflags_eq', eq(res, Const(0, self._psize)))\ndef i_shr(self, op):\nv1 = self.getOperObj(op, 0)\nv2 = self.getOperObj(op, 1)\n- #if v2.isDiscrete() and v2.solve() > 0xff:\n- #v2 = v2 & 0xff\n-\n- self.setOperObj(op, 0, v1 >> v2)\n+ # No effect (not even flags) if shift is 0\n+ if v2.isDiscrete():\n+ bit = v2.solve()\n+ if bit == 0:\n+ return\n+ elif bit == 1:\n+ tsize = v1.getWidth()\n+ power = o_pow(Const(2, tsize), tsize - 1, self._psize)\n+ msb = o_div((v1 & power), power, v1.getWidth())\n+ self.effSetVariable('eflags_of', msb)\n- u = UNK(v1, v2) # COP OUT FOR NOW...\n- self.effSetVariable('eflags_gt', u)\n- self.effSetVariable('eflags_lt', u)\n- self.effSetVariable('eflags_sf', u)\n- self.effSetVariable('eflags_eq', u)\n+ res = v1 >> v2\n+ self.setOperObj(op, 0, res)\n+ self.effSetVariable('eflags_gt', gt(res, Const(0, self._psize)))\n+ self.effSetVariable('eflags_lt', lt(res, Const(0, self._psize)))\n+ self.effSetVariable('eflags_sf', lt(res, Const(0, self._psize)))\n+ self.effSetVariable('eflags_eq', eq(res, Const(0, self._psize)))\ndef i_std(self, op):\nself.effSetVariable('eflags_df', Const(1, self._psize))\n@@ -887,13 +908,18 @@ class IntelSymbolikTranslator(vsym_trans.SymbolikTranslator):\nv1 = self.getOperObj(op, 0)\nv2 = self.getOperObj(op, 1)\nobj = o_and(v1, v2, v1.getWidth())\n- u = UNK(v1, v2)\n- self.effSetVariable('eflags_gt', u)\n+ self.effSetVariable('eflags_gt', gt(v1, v2))\nself.effSetVariable('eflags_lt', lt(obj, Const(0, self._psize))) # ( SF != OF ) ( OF is cleared )\nself.effSetVariable('eflags_sf', lt(obj, Const(0, self._psize))) # v1 & v2 < 0\nself.effSetVariable('eflags_eq', eq(obj, Const(0, self._psize))) # v1 & v2 == 0\n+ self.effSetVariable('eflags_of', Const(0, self._psize))\n+ self.effSetVariable('eflags_cf', Const(0, self._psize))\n+\n+ pf = o_xor(o_xor(v1, v2, v1.getWidth()), Const(-1, self._psize), self._psize)\n+ self.effSetVariable('eflags_pf', pf)\n+\ndef i_xadd(self, op):\nv1 = self.getOperObj(op, 0)\nv2 = self.getOperObj(op, 1)\n@@ -909,10 +935,9 @@ class IntelSymbolikTranslator(vsym_trans.SymbolikTranslator):\nv1 = self.getOperObj(op, 0)\nv2 = self.getOperObj(op, 1)\nobj = o_xor(v1, v2, v1.getWidth())\n- u = UNK(v1, v2)\n- self.effSetVariable('eflags_gt', u)\n- self.effSetVariable('eflags_lt', u)\n- self.effSetVariable('eflags_sf', lt(obj, Const(0, self._psize))) # v1 & v2 < 0\n+ self.effSetVariable('eflags_gt', gt(v1, v2))\n+ self.effSetVariable('eflags_lt', lt(v1, v2))\n+ self.effSetVariable('eflags_sf', lt(obj, Const(0, self._psize))) # v1 ^ v2 < 0\nself.effSetVariable('eflags_eq', eq(obj, Const(0, self._psize))) # v1 & v2 == 0\nself.setOperObj(op, 0, obj)\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/symboliks/common.py",
"new_path": "vivisect/symboliks/common.py",
"diff": "@@ -994,11 +994,15 @@ class ge(Constraint):\nclass UNK(Constraint):\noperstr = 'UNK'\nsymtype = SYMT_CON_UNK\n+ def oper(self, v1, v2):\n+ raise Exception('Attempted reduce/solve on UNK, which has no oper')\nclass NOTUNK(Constraint):\noperstr = '!UNK'\nsymtype = SYMT_CON_NOTUNK\n+ def oper(self, v1, v2):\n+ raise Exception('Attempted reduce/solve on NOUNK, which has no oper')\n# Create our oposing constraints\noppose(ne, eq)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Remove UNKs in i386
|
718,765 |
24.06.2019 17:35:03
| 14,400 |
e6807514635ea4e37991d9b76111a349652fbde4
|
Fix issue with walkTree where we wouldn't hit all of the things in the tree if we had say, two piva_globals that had different _sym_ids
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/symboliks/archs/i386.py",
"new_path": "vivisect/symboliks/archs/i386.py",
"diff": "@@ -871,7 +871,7 @@ class IntelSymbolikTranslator(vsym_trans.SymbolikTranslator):\nreturn\nelif bit == 1:\ntsize = v1.getWidth()\n- power = o_pow(Const(2, tsize), tsize - 1, self._psize)\n+ power = o_pow(Const(2, tsize), Const(tsize - 1, self._psize), self._psize)\nmsb = o_div((v1 & power), power, v1.getWidth())\nself.effSetVariable('eflags_of', msb)\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/symboliks/common.py",
"new_path": "vivisect/symboliks/common.py",
"diff": "@@ -303,7 +303,7 @@ class SymbolikBase:\nif idx < len(cur.kids):\n# sys.stdout.write('+')\nkid = cur.kids[idx]\n- if once and kid in done:\n+ if once and kid._sym_id in done:\nidx += 1\ncontinue\n@@ -325,7 +325,7 @@ class SymbolikBase:\npath.pop() # clean up, since our algorithm doesn't expect cur on the top...\n#sys.stdout.write(' << ')\n- done.append(cur)\n+ done.append(cur._sym_id)\nif not len(path):\n#sys.stdout.write('=')\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/symboliks/tests/test_analysis.py",
"new_path": "vivisect/symboliks/tests/test_analysis.py",
"diff": "import sys\nimport unittest\n+import vivisect.symboliks.common as vsc\nimport vivisect.symboliks.analysis as vsym_analysis\nfrom vivisect.tests.helpers import MockVw\n@@ -64,6 +65,54 @@ class WalkTreeTest(unittest.TestCase):\nexcept Exception:\nsys.excepthook(*sys.exc_info())\n+ def test_coverage(self):\n+ '''\n+ ((mem[piva_global(0xbfbfee08):1] | (mem[(arg0 + 72):4] & 0xffffff00)) + piva_global())\n+ '''\n+ ids = []\n+ piva1 = vsc.Var('piva_global', 4)\n+ ids.append(piva1._sym_id)\n+ arg = vsc.Const(0xbfbfee08, 4)\n+ ids.append(arg._sym_id)\n+ call = vsc.Call(piva1, 4, argsyms=[arg])\n+ ids.append(call._sym_id)\n+ con = vsc.Const(1, 4)\n+ ids.append(con._sym_id)\n+ mem1 = vsc.Mem(call, con)\n+ ids.append(mem1._sym_id)\n+\n+ arg = vsc.Arg(0, 4)\n+ ids.append(arg._sym_id)\n+ addop = vsc.Const(72, 4)\n+ ids.append(addop._sym_id)\n+ add = vsc.o_add(arg, addop, 4)\n+ ids.append(add._sym_id)\n+ con = vsc.Const(4, 4)\n+ ids.append(con._sym_id)\n+ memac = vsc.Mem(add, con)\n+ ids.append(memac._sym_id)\n+ andop = vsc.Const(0xffffff00, 4)\n+ ids.append(andop._sym_id)\n+ mem2 = vsc.o_and(memac, andop, 4)\n+ ids.append(mem2._sym_id)\n+ memor = vsc.o_or(mem1, mem2, 4)\n+ ids.append(memor._sym_id)\n+\n+ piva2 = vsc.Var('piva_global', 4)\n+ ids.append(piva2._sym_id)\n+ call2 = vsc.Call(piva2, 4, argsyms=[])\n+ ids.append(call2._sym_id)\n+ add = vsc.o_add(memor, call2, 4)\n+ ids.append(add._sym_id)\n+\n+ traveled_ids = []\n+ def walkerTest(path, symobj, ctx):\n+ traveled_ids.append(symobj._sym_id)\n+\n+ add.walkTree(walkerTest)\n+ self.assertEqual(traveled_ids, ids)\n+ self.assertEqual('((mem[piva_global(0xbfbfee08):1] | (mem[(arg0 + 72):4] & 0xffffff00)) + piva_global())', str(add))\n+\ndef walkTreeDoer(vw):\nsctx = vsym_analysis.getSymbolikAnalysisContext(vw)\n"
},
{
"change_type": "ADD",
"old_path": null,
"new_path": "vivisect/symboliks/tests/test_archind.py",
"diff": "+import unittest\n+\n+import envi.memory as e_mem\n+\n+import vivisect as viv\n+import vivisect.const as viv_const\n+import vivisect.symboliks.common as vsc\n+import vivisect.symboliks.archind as vsym_archind\n+import vivisect.symboliks.analysis as vsym_analysis\n+\n+\n+class TestArchind(unittest.TestCase):\n+\n+ def test_wipeAstArch(self):\n+ vw = viv.VivWorkspace()\n+ vw.addMemoryMap(0x00, e_mem.MM_RWX, 'code', [0 for x in range(256)])\n+ vw.addLocation(0x40, 47, viv_const.LOC_POINTER)\n+ vw.setMeta('Architecture', 'i386')\n+ symctx = vsym_analysis.SymbolikAnalysisContext(vw)\n+\n+ func = vsc.Var('eax', 4)\n+ call = vsc.Call(func, 4)\n+ addr = vsc.Var('arg0', 4) + call\n+ mem = vsc.Mem(addr, vsc.Const(4, 4))\n+\n+ op = mem + vsc.Var('edx', 4)\n+ final = op * vsc.Var('edx', 4)\n+ wiped = vsym_archind.wipeAstArch(symctx, [final])\n+ self.assertEquals(1, len(wiped))\n+ self.assertEquals('((mem[(arg0 + 1indreg()):4] + 0indreg) * 0indreg)', str(wiped[0]))\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Fix issue with walkTree where we wouldn't hit all of the things in the tree if we had say, two piva_globals that had different _sym_ids
|
718,770 |
26.06.2019 15:03:16
| 14,400 |
9229eb8840e13a206c4d1558cbfbf101420e425a
|
mods from suggestions
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/emu.py",
"new_path": "envi/archs/arm/emu.py",
"diff": "@@ -239,7 +239,7 @@ class ArmEmulator(ArmRegisterContext, envi.Emulator):\n# other than None, that is the new eip\ntry:\nself.setMeta('forrealz', True)\n- x = None\n+ newpc = None\nskip = False\n# IT block handling\n@@ -264,14 +264,14 @@ class ArmEmulator(ArmRegisterContext, envi.Emulator):\nraise envi.UnsupportedInstruction(self, op)\n# executing opcode now...\n- x = meth(op)\n+ newpc = meth(op)\n# returned None, so the instruction hasn't directly changed PC\n- if x == None:\n+ if newpc == None:\npc = self.getProgramCounter()\n- x = pc+op.size\n+ newpc = pc+op.size\n- self.setProgramCounter(x)\n+ self.setProgramCounter(newpc)\nfinally:\nself.setMeta('forrealz', False)\n@@ -927,18 +927,12 @@ class ArmEmulator(ArmRegisterContext, envi.Emulator):\ni_ldrt = i_ldr\ndef i_ldrex(self, op):\n- try:\n- self.mem_access_lock.acquire()\n+ with self.mem_access_lock:\nreturn self.i_ldr(op)\n- finally:\n- self.mem_access_lock.release()\ndef i_strex(self, op):\n- try:\n- self.mem_access_lock.acquire()\n+ with self.mem_access_lock:\nreturn self.i_str(op)\n- finally:\n- self.mem_access_lock.release()\ndef i_mov(self, op):\nval = self.getOperValue(op, 1)\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/impemu/platarch/arm.py",
"new_path": "vivisect/impemu/platarch/arm.py",
"diff": "import sys\nimport envi\nimport logging\n+import traceback\nimport envi.archs.arm as e_arm\nimport vivisect\n@@ -10,7 +11,6 @@ import visgraph.pathcore as vg_path\nfrom envi.archs.arm.regs import *\nlogger = logging.getLogger(__name__)\n-verbose = True\nclass ArmWorkspaceEmulator(v_i_emulator.WorkspaceEmulator, e_arm.ArmEmulator):\n@@ -127,7 +127,7 @@ class ArmWorkspaceEmulator(v_i_emulator.WorkspaceEmulator, e_arm.ArmEmulator):\nif armop == None and thumbop == None:\n# we didn't have a single push in either direction\n- print(\"TOTAL FAILURE TO DETERMINE THUMB MODE\")\n+ logger.warn(\"TOTAL FAILURE TO DETERMINE THUMB MODE\")\nraise Exception(\"Neither architecture parsed the first opcode\")\nelif armthumb < 0:\n@@ -153,12 +153,10 @@ class ArmWorkspaceEmulator(v_i_emulator.WorkspaceEmulator, e_arm.ArmEmulator):\nvg_path.setNodeProp(self.curpath, 'bva', funcva)\nhits = {}\n- todo = [(funcva,self.getEmuSnap(),self.path),]\n+ todo = [(funcva, self.getEmuSnap(), self.path)]\nvw = self.vw # Save a dereference many many times\nwhile len(todo):\n- #try:\n-\nva, esnap, self.curpath = todo.pop()\nself.setEmuSnap(esnap)\n@@ -166,7 +164,7 @@ class ArmWorkspaceEmulator(v_i_emulator.WorkspaceEmulator, e_arm.ArmEmulator):\nself.setProgramCounter(va)\n# Check if we are beyond our loop max...\n- if maxloop != None:\n+ if maxloop is not None:\nlcount = vg_path.getPathLoopCount(self.curpath, 'bva', va)\nif lcount > maxloop:\ncontinue\n@@ -197,7 +195,6 @@ class ArmWorkspaceEmulator(v_i_emulator.WorkspaceEmulator, e_arm.ArmEmulator):\ntry:\ntmode = self.getFlag(PSR_T_bit)\n- #print(\"tmode: %x\" % tmode)\n# FIXME unify with stepi code...\nop = self.parseOpcode(starteip | tmode)\n@@ -207,7 +204,7 @@ class ArmWorkspaceEmulator(v_i_emulator.WorkspaceEmulator, e_arm.ArmEmulator):\nself.emumon.prehook(self, op, starteip)\nexcept Exception, e:\nif not self.getMeta('silent'):\n- print(\"funcva: 0x%x opva: 0x%x: %r %r (in emumon prehook)\" % (funcva, starteip, op, e))\n+ logger.warn(\"funcva: 0x%x opva: 0x%x: %r %r (in emumon prehook)\", funcva, starteip, op, e)\nif self.emustop:\nreturn\n@@ -223,7 +220,7 @@ class ArmWorkspaceEmulator(v_i_emulator.WorkspaceEmulator, e_arm.ArmEmulator):\nself.emumon.posthook(self, op, endeip)\nexcept Exception, e:\nif not self.getMeta('silent'):\n- print(\"funcva: 0x%x opva: 0x%x: %r %r (in emumon posthook)\" % (funcva, starteip, op, e))\n+ logger.warn(\"funcva: 0x%x opva: 0x%x: %r %r (in emumon posthook)\", funcva, starteip, op, e)\nif self.emustop:\nreturn\n@@ -265,10 +262,8 @@ class ArmWorkspaceEmulator(v_i_emulator.WorkspaceEmulator, e_arm.ArmEmulator):\nself.emumon.logAnomaly(self, starteip, str(e))\nlogger.debug('runFunction breaking after exception (fva: 0x%x): %s', funcva, e)\n- if verbose: sys.excepthook(*sys.exc_info())\n+ logger.info('\\n'.join(traceback.format_exception(*sys.exc_info())))\nbreak # If we exc during execution, this branch is dead.\n- #except:\n- # sys.excepthook(*sys.exc_info())\nclass ThumbWorkspaceEmulator(ArmWorkspaceEmulator):\ndef __init__(self, vw, logwrite=False, logread=False):\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
mods from @rakuyo's suggestions
|
718,770 |
26.06.2019 17:31:24
| 14,400 |
c39de17e001503f4d0c3f1a73312003043d491a2
|
rakuyo should be happy with this one: flake8 stuff
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/emu.py",
"new_path": "envi/archs/arm/emu.py",
"diff": "@@ -185,17 +185,17 @@ class ArmEmulator(ArmRegisterContext, envi.Emulator):\nself.setCPSR(flags)\ndef getFlag(self, which): # FIXME: CPSR?\n- #if (flags_reg == None):\n+ #if (flags_reg is None):\n# flags_reg = proc_modes[self.getProcMode()][5]\n#flags = self.getRegister(flags_reg)\nflags = self.getCPSR()\n- if flags == None:\n+ if flags is None:\nraise envi.PDEUndefinedFlag(self)\nreturn bool(flags & which)\ndef readMemValue(self, addr, size):\nbytes = self.readMemory(addr, size)\n- if bytes == None:\n+ if bytes is None:\nreturn None\nif len(bytes) != size:\nraise Exception(\"Read Gave Wrong Length At 0x%.8x (va: 0x%.8x wanted %d got %d)\" % (self.getProgramCounter(),addr, size, len(bytes)))\n@@ -211,7 +211,7 @@ class ArmEmulator(ArmRegisterContext, envi.Emulator):\ndef readMemSignedValue(self, addr, size):\nbytes = self.readMemory(addr, size)\n- if bytes == None:\n+ if bytes is None:\nreturn None\nif len(bytes) != size:\nraise Exception(\"Read Gave Wrong Length At 0x%.8x (va: 0x%.8x wanted %d got %d)\" % (self.getProgramCounter(),addr, size, len(bytes)))\n@@ -1099,7 +1099,7 @@ class ArmEmulator(ArmRegisterContext, envi.Emulator):\nsrc2 = self.getOperValue(op, 1)\n#FIXME PDE and flags\n- if src1 == None or src2 == None:\n+ if src1 is None or src2 is None:\nself.undefFlags()\nself.setOperValue(op, 0, None)\nreturn\n@@ -1176,7 +1176,7 @@ class ArmEmulator(ArmRegisterContext, envi.Emulator):\nsrc2 = self.getOperValue(op, 2)\n#FIXME PDE and flags\n- if src1 == None or src2 == None:\n+ if src1 is None or src2 is None:\nself.undefFlags()\nself.setOperValue(op, 0, None)\nreturn\n@@ -1196,7 +1196,7 @@ class ArmEmulator(ArmRegisterContext, envi.Emulator):\nsrc1 = self.getOperValue(op, 1)\nsrc2 = self.getOperValue(op, 2)\n#FIXME PDE and flags\n- if src1 == None or src2 == None:\n+ if src1 is None or src2 is None:\nself.undefFlags()\nself.setOperValue(op, 0, None)\nreturn\n@@ -1226,7 +1226,7 @@ class ArmEmulator(ArmRegisterContext, envi.Emulator):\nSflag = op.iflags & IF_PSR_S\nmask = e_bits.u_maxes[op.opers[1].tsize]\n- if src1 == None or src2 == None:\n+ if src1 is None or src2 is None:\nself.undefFlags()\nreturn None\n@@ -1262,7 +1262,7 @@ class ArmEmulator(ArmRegisterContext, envi.Emulator):\nsrc2 = self.getOperValue(op, 1)\n#FIXME PDE and flags\n- if src1 == None or src2 == None:\n+ if src1 is None or src2 is None:\nself.undefFlags()\nself.setOperValue(op, 0, None)\nreturn\n@@ -1616,7 +1616,7 @@ class ArmEmulator(ArmRegisterContext, envi.Emulator):\nbreak\nloc = emu.vw.getLocation(va)\n- if loc != None:\n+ if loc is not None:\nlogger.warn(\"Terminating TB at Location/Reference\")\nlogger.warn(\"%x, %d, %x, %r\", loc)\nbreak\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
rakuyo should be happy with this one: flake8 stuff
|
718,770 |
26.06.2019 23:08:16
| 14,400 |
e09e4d66e3c5394a92fd8d02433f76520642a105
|
add a couple more no-return function names.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -117,6 +117,8 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nvw.addNoReturnApi(\"*._exit\")\nvw.addNoReturnApi(\"*.longjmp\")\nvw.addNoReturnApi(\"*._setjmp\")\n+ vw.addNoReturnApi(\"*.j__ZSt9terminatev\")\n+ vw.addNoReturnApi(\"*.std::terminate(void)\")\n# Base addr is earliest section address rounded to pagesize\n# NOTE: This is only for prelink'd so's and exe's. Make something for old style so.\n@@ -491,7 +493,7 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nlogger.info('R_ARM_JUMP_SLOT: adding Relocation 0x%x -> 0x%x (%s) ', rlva, ptr, dmglname)\nvw.addRelocation(rlva, vivisect.RTYPE_BASEOFF, ptr)\npname = \"ptr_%s\" % name\n- if vw.vaByName(pname) == None:\n+ if vw.vaByName(pname) is None:\nvw.makeName(rlva, pname)\nif addbase: ptr += baseaddr\n@@ -512,7 +514,7 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nlogger.info('R_ARM_GLOB_DAT: adding Relocation 0x%x -> 0x%x (%s) ', rlva, ptr, dmglname)\nvw.addRelocation(rlva, vivisect.RTYPE_BASEOFF, ptr)\npname = \"ptr_%s\" % name\n- if vw.vaByName(pname) == None:\n+ if vw.vaByName(pname) is None:\nvw.makeName(rlva, pname)\nif addbase: ptr += baseaddr\n@@ -531,6 +533,10 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nif ptr:\nlogger.info('R_ARM_ABS32: adding Relocation 0x%x -> 0x%x (%s) ', rlva, ptr, dmglname)\nvw.addRelocation(rlva, vivisect.RTYPE_BASEOFF, ptr)\n+ pname = \"ptr_%s\" % name\n+ if vw.vaByName(pname) is None and len(name):\n+ vw.makeName(rlva, pname)\n+\nelse:\nlogger.info('R_ARM_ABS32: adding Import 0x%x (%s) ', rlva, dmglname)\nvw.makeImport(rlva, \"*\", name)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
add a couple more no-return function names.
|
718,770 |
26.06.2019 23:20:39
| 14,400 |
d12bd441f84be4bd54865757fb5c05f6d4a0565b
|
improved pointer naming.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -492,7 +492,7 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nif ptr:\nlogger.info('R_ARM_JUMP_SLOT: adding Relocation 0x%x -> 0x%x (%s) ', rlva, ptr, dmglname)\nvw.addRelocation(rlva, vivisect.RTYPE_BASEOFF, ptr)\n- pname = \"ptr_%s\" % name\n+ pname = \"ptr_%s_%.8x\" % (name, rlva)\nif vw.vaByName(pname) is None:\nvw.makeName(rlva, pname)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
improved pointer naming.
|
718,765 |
27.06.2019 14:13:45
| 14,400 |
c0bbcfed5770a0a7eec75aae43126943dba75f95
|
Fix issue where we don't respect the number of Data Directories in the PE when doing PE parsing
|
[
{
"change_type": "MODIFY",
"old_path": "PE/__init__.py",
"new_path": "PE/__init__.py",
"diff": "@@ -369,7 +369,6 @@ class PE(object):\nself.pe32p = False\nself.psize = 4\nself.high_bit_mask = 0x80000000\n-\nself.IMAGE_DOS_HEADER = vstruct.getStructure(\"pe.IMAGE_DOS_HEADER\")\ndosbytes = self.readAtOffset(0, len(self.IMAGE_DOS_HEADER))\nself.IMAGE_DOS_HEADER.vsParse(dosbytes)\n@@ -635,9 +634,10 @@ class PE(object):\nself.sections = []\noff = self.IMAGE_DOS_HEADER.e_lfanew + len(self.IMAGE_NT_HEADERS)\n+ off -= len(self.IMAGE_NT_HEADERS.OptionalHeader.DataDirectory)\n+ off += self.IMAGE_NT_HEADERS.OptionalHeader.NumberOfRvaAndSizes * len(vstruct.getStructure(\"pe.IMAGE_DATA_DIRECTORY\"))\nsecsize = len(vstruct.getStructure(\"pe.IMAGE_SECTION_HEADER\"))\n-\nsbytes = self.readAtOffset(off, secsize * self.IMAGE_NT_HEADERS.FileHeader.NumberOfSections)\nwhile sbytes:\ns = vstruct.getStructure(\"pe.IMAGE_SECTION_HEADER\")\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Fix issue where we don't respect the number of Data Directories in the PE when doing PE parsing
|
718,770 |
27.06.2019 23:53:38
| 14,400 |
d8418cf161989f8f2e8c3578e8e3df71daa8705e
|
pltelf analysis improvements. now uses an emulator as a cheat. probably could be any emulator. heck, we could pick i386 emulator if we really wanted to avoid problems with future architectures which may not have an emulator. for now, we assume vw.getEmulator() always works for ELF-supporting platforms.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/elfplt.py",
"new_path": "vivisect/analysis/elf/elfplt.py",
"diff": "If a \"function\" is in the plt it's a wrapper for something in the GOT.\nMake that apparent.\n\"\"\"\n-\n+import logging\nimport vivisect\nimport envi\nimport envi.archs.i386 as e_i386\n-import envi.archs.i386.opcode86 as opcode86\n+\n+logger = logging.getLogger(__name__)\n+\ndef analyze(vw):\n\"\"\"\n@@ -23,9 +25,13 @@ def analyze(vw):\nltup = vw.getLocation(sva)\nsva += ltup[vivisect.L_SIZE]\n+\n+MAX_OPS = 10\n+\n+\ndef analyzeFunction(vw, funcva):\nseg = vw.getSegment(funcva)\n- if seg == None:\n+ if seg is None:\nreturn\nsegva, segsize, segname, segfname = seg\n@@ -33,16 +39,34 @@ def analyzeFunction(vw, funcva):\nif segname not in (\".plt\", \".plt.got\"):\nreturn\n- op = vw.parseOpcode(funcva)\n+ count = 0\n+ opva = funcva\n+ op = vw.parseOpcode(opva)\n+ while count < MAX_OPS and op.iflags & envi.IF_BRANCH == 0:\n+ opva += len(op)\n+ op = vw.parseOpcode(opva)\n+\nif op.iflags & envi.IF_BRANCH == 0:\n+ logger.warn(\"PLT: 0x%x - Could not find a branch!\", funcva)\nreturn\n+ # slight hack, but we don't currently know if thunk_bx exists\n+ gotplt = None\n+ for va, size, name, fname in vw.getSegments():\n+ if name == \".got.plt\":\n+ gotplt = va\n+ break\n+\n+ # all architectures should at least have some minimal emulator\n+ emu = vw.getEmulator()\n+ emu.setRegister(e_i386.REG_EBX, gotplt) # every emulator will have a 4th register, and if it's not used, no harm done.\noper0 = op.opers[0]\n- opval = oper0.getOperAddr(op, None)\n+ opval = oper0.getOperAddr(op, emu)\nloctup = vw.getLocation(opval)\n- if loctup == None:\n+ if loctup is None:\n+ logger.warn(\"PLT: 0x%x - branch deref not defined: 0x%x\", opva, opval)\nreturn\nif loctup[vivisect.L_LTYPE] != vivisect.LOC_IMPORT: # FIXME: Why are some AMD64 IMPORTS showing up as LOC_POINTERs?\n@@ -50,6 +74,8 @@ def analyzeFunction(vw, funcva):\nreturn\nfname = vw.getName(opval)\n- vw.makeName(funcva, \"plt_%s\" % fname, filelocal=True)\n- vw.makeFunctionThunk(funcva, fname)\n+ if fname.endswith('_%.8x' % opval):\n+ fname = fname[:-9]\n+ #vw.makeName(funcva, \"plt_%s\" % fname, filelocal=True)\n+ vw.makeFunctionThunk(funcva, \"plt_\" + fname)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
pltelf analysis improvements. now uses an emulator as a cheat. probably could be any emulator. heck, we could pick i386 emulator if we really wanted to avoid problems with future architectures which may not have an emulator. for now, we assume vw.getEmulator() always works for ELF-supporting platforms.
|
718,770 |
27.06.2019 23:55:23
| 14,400 |
e7a63987d5537192812ac790b80290b696ce8ee9
|
use "addEntryPoint()" instead of "makeFunction()" to delay function processing until it's supposed to start later. keeping the "new_functions" array around for now because it allows us to mark why it's a function.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -445,7 +445,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\n# for now, ignore them.\nfor cmnt, fva in new_functions:\nlogger.info('adding function from ELF metadata: 0x%x (%s)', fva, cmnt)\n- vw.makeFunction(fva)\n+ vw.addEntryPoint(fva)\nfor va, tva in new_pointers:\nlogger.info('adding pointer 0x%x -> 0x%x', va, tva)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
use "addEntryPoint()" instead of "makeFunction()" to delay function processing until it's supposed to start later. keeping the "new_functions" array around for now because it allows us to mark why it's a function.
|
718,770 |
28.06.2019 10:35:29
| 14,400 |
b4423a1e96a9518ec35c3c0357ea1d719117de66
|
Elf/__init__.py update for and some flake8 changes to make him extra happy :)
|
[
{
"change_type": "MODIFY",
"old_path": "Elf/__init__.py",
"new_path": "Elf/__init__.py",
"diff": "@@ -21,6 +21,7 @@ Send bug reports to Invisigoth or Metr0.\nimport os\nimport sys\nimport struct\n+import logging\nimport traceback\nimport zlib\n@@ -31,6 +32,9 @@ import vstruct.defs.elf as vs_elf\nverbose = False\n+logger = logging.getLogger(__name__)\n+\n+\nclass ElfReloc:\n\"\"\"\nElf relocation entries consist mostly of \"fixup\" address which\n@@ -54,6 +58,7 @@ class ElfReloc:\ndef getType(self):\nreturn self.r_info & 0xff\n+\nclass Elf32Reloc(ElfReloc, vs_elf.Elf32Reloc):\ndef __init__(self, bigend=False):\nvs_elf.Elf32Reloc.__init__(self, bigend=bigend)\n@@ -62,6 +67,7 @@ class Elf32Reloc(ElfReloc, vs_elf.Elf32Reloc):\ndef getSymTabIndex(self):\nreturn self.r_info >> 8\n+\nclass Elf32Reloca(ElfReloc, vs_elf.Elf32Reloca):\ndef __init__(self, bigend=False):\nvs_elf.Elf32Reloca.__init__(self, bigend=bigend)\n@@ -70,6 +76,7 @@ class Elf32Reloca(ElfReloc, vs_elf.Elf32Reloca):\ndef getSymTabIndex(self):\nreturn self.r_info >> 8\n+\nclass Elf64Reloc(ElfReloc, vs_elf.Elf64Reloc):\ndef __init__(self, bigend=False):\nvs_elf.Elf64Reloc.__init__(self, bigend=bigend)\n@@ -78,6 +85,7 @@ class Elf64Reloc(ElfReloc, vs_elf.Elf64Reloc):\ndef getSymTabIndex(self):\nreturn self.r_info >> 32\n+\nclass Elf64Reloca(ElfReloc, vs_elf.Elf64Reloca):\ndef __init__(self, bigend=False):\nvs_elf.Elf64Reloca.__init__(self, bigend=bigend)\n@@ -86,12 +94,13 @@ class Elf64Reloca(ElfReloc, vs_elf.Elf64Reloca):\ndef getSymTabIndex(self):\nreturn self.r_info >> 32\n+\nclass ElfDynamic:\n- has_string = [DT_NEEDED,DT_SONAME]\n\"\"\"\nAn object to represent an Elf dynamic entry.\n(linker/loader directives)\n\"\"\"\n+ has_string = [DT_NEEDED, DT_SONAME]\ndef __init__(self, bytes=None):\nself.name = \"\"\n@@ -356,7 +365,7 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\ndef _parseDynamic(self):\nsymtab = self.getSectionBytes('.dynsym')\n- if symtab == None:\n+ if symtab is None:\nreturn\nsym = self._cls_symbol(bigend=self.bigend)\n@@ -438,14 +447,14 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nif pgm.p_vaddr == 0:\ncontinue\n- if base == None:\n+ if base is None:\nbase = pgm.p_vaddr\ncontinue\nif pgm.p_vaddr < base:\nbase = pgm.p_vaddr\n- if base == None:\n+ if base is None:\nbase = 0x20000000\nbase &= 0xfffff000\n@@ -480,7 +489,7 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nrvaoff = rva - phrva\nreturn pgm.p_offset + rvaoff\n- raise 'omg',hex(rva)\n+ raise ('omg', hex(rva))\nreturn None\ndef readAtOffset(self, off, size):\n@@ -501,7 +510,7 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\ndef getSectionBytes(self, secname):\nsec = self.getSection(secname)\n- if sec == None:\n+ if sec is None:\nreturn None\nreturn self.readAtOffset(sec.sh_offset, sec.sh_size)\n@@ -531,12 +540,14 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nwhile offset < notebyteslen:\nnote = vs_elf.ElfNote()\nif notebyteslen - offset < len(note):\n- #print (\"\\nNOTES section length mismatch!\\n\\t%s\\n\\tSection Bytes: %s\\n\\tStranded bytes: %s\\n\" % (sec, repr(notebytes), repr(notebytes[offset:])))\n+ logger.warn(\"\"\"\\nNOTES section length mismatch!\\n\\t%s\n+ \\tSection Bytes: %s\\n\\tStranded bytes: %s\\n\"\"\",\n+ sec, repr(notebytes), repr(notebytes[offset:]))\nbreak\noffset = note.vsParse(notebytes, offset=offset)\nyield note\n- except Exception, e:\n+ except Exception as e:\nprint(\"Elf.getNotes() Exception: %r\" % e)\ndef getPlatform(self):\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Elf/__init__.py update for @rakuyo, and some flake8 changes to make him extra happy :)
|
718,770 |
28.06.2019 23:42:54
| 14,400 |
1f7e8868dbc2dbf57b7e3c8680b2718a9d0f4c12
|
elf dynamics parsing changes, making relocations from more i386 relocs.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -468,16 +468,25 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nlogger.debug('relocs: 0x%x: %r', rlva, name)\nif arch in ('i386','amd64'):\nif name:\n- if rtype == Elf.R_386_JMP_SLOT:\n+ if rtype in (Elf.R_386_JMP_SLOT, Elf.R_X86_64_GLOB_DAT):\nvw.makeImport(rlva, \"*\", name)\nvw.setComment(rlva, dmglname)\n- elif rtype == Elf.R_386_32:\n+ elif rtype in (Elf.R_386_32, Elf.R_386_COPY):\npass\n- elif rtype == Elf.R_X86_64_GLOB_DAT: # Elf.R_386_GLOB_DAT is same number\n- vw.makeImport(rlva, \"*\", name)\n- vw.setComment(rlva, dmglname)\n+ else:\n+ logger.info('unknown reloc type: %d %s (at %s)' % (rtype, name, hex(rlva)))\n+\n+ else:\n+ symidx = Elf.getRelocSymTabIndex(r.r_info)\n+ sym = dsyms[symidx]\n+ ptr = sym.st_value\n+\n+ if rtype in (Elf.R_386_RELATIVE, ):\n+ ptr = vw.readMemoryPtr(rlva)\n+ logger.info('R_386_RELATIVE: adding Relocation 0x%x -> 0x%x (name: %s) ', rlva, ptr, dmglname)\n+ vw.addRelocation(rlva, vivisect.RTYPE_BASEOFF, ptr)\nelse:\nlogger.info('unknown reloc type: %d %s (at %s)' % (rtype, name, hex(rlva)))\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
elf dynamics parsing changes, making relocations from more i386 relocs.
|
718,770 |
29.06.2019 12:08:27
| 14,400 |
d25f3d2d612f40ff6657704d6c1e8b9497c04e27
|
unittests: break up individual ELF files, fix Relocs test, make pltgot test (optional)
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/testelf.py",
"new_path": "vivisect/tests/testelf.py",
"diff": "@@ -26,13 +26,15 @@ class ELFTests(unittest.TestCase):\ncls.vw_sh.loadFromFile(cls.sh_fn)\ncls.vw_sh.analyze()\n- def test_files(self):\n+ def test_ls(self):\nprint \"self.ls_fn: %s\" % self.ls_fn\nself.do_file(self.vw_ls, ls_data)\n+ def test_libc(self):\nprint \"self.libc_fn: %s\" % self.libc_fn\nself.do_file(self.vw_libc, libc_data)\n+ def test_sh(self):\nprint \"self.sh_fn: %s\" % self.sh_fn\nself.do_file(self.vw_sh, sh_data)\n@@ -55,11 +57,16 @@ class ELFTests(unittest.TestCase):\ndef relocs(self, vw, data):\n# simple comparison to ensure same relocs. perhaps too simple.\n- newrels = vw.getExports()\n+ newrels = vw.getRelocations()\nself.assertEqual(newrels, data['relocs'])\ndef pltgot(self, vw, data):\n- pass\n+ for pltva, gotva in data['pltgot']:\n+ match = False\n+ for xfr, xto, xtype, xinfo in vw.getXrefsFrom(pltva):\n+ if xfr == pltva and xto == gotva:\n+ match = True\n+ self.assertEqual((hex(pltva), match), (hex(pltva), True))\ndef debuginfosyms(self, vw, data):\n# we don't currently parse debugging symbols.\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
unittests: break up individual ELF files, fix Relocs test, make pltgot test (optional)
|
718,770 |
02.07.2019 10:56:35
| 14,400 |
0438d3d30dcc3cd1914e4bf71d3e08c17726bcba
|
Elf logging update
|
[
{
"change_type": "MODIFY",
"old_path": "Elf/__init__.py",
"new_path": "Elf/__init__.py",
"diff": "@@ -389,6 +389,8 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nelse:\nraise Exception('Platform not supported: %d' % (self.bits))\ndyn.vsParse(dynbytes)\n+ logger.debug(\"dynamic: %r: 0x%x\", dt_names.get(dyn.d_tag), dyn.d_value)\n+\nif dyn.d_tag in Elf32Dynamic.has_string:\nname = self.getStrtabString(dyn.d_value, \".dynstr\")\ndyn.setName(name)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Elf logging update
|
718,770 |
05.07.2019 01:00:57
| 14,400 |
8f24e92d20cdc139a06c9029720ce564866a859b
|
VIVISECT core change: don't let makePointer() succeed overwriting other locations.
also, add logging to vivisect.__init__
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -13,6 +13,7 @@ import string\nimport struct\nimport weakref\nimport hashlib\n+import logging\nimport itertools\nimport traceback\nimport threading\n@@ -50,6 +51,9 @@ from vivisect.defconfig import *\nimport vivisect.analysis.generic.emucode as v_emucode\n+logger = logging.getLogger(__name__)\n+\n+\ndef guid(size=16):\nreturn hexlify(os.urandom(size))\n@@ -145,6 +149,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nself.addVaSet(\"Emulation Anomalies\", ((\"va\", VASET_ADDRESS), (\"Message\", VASET_STRING)))\nself.addVaSet(\"Bookmarks\", ((\"va\", VASET_ADDRESS), (\"Bookmark Name\", VASET_STRING)))\nself.addVaSet('DynamicBranches', (('va', VASET_ADDRESS), ('opcode', VASET_STRING), ('bflags', VASET_INTEGER)))\n+ self.addVaSet('PointersFromFile', (('va', VASET_ADDRESS), ('target', VASET_ADDRESS), ('comment', VASET_STRING), ))\ndef verbprint(self, msg):\nif self.verbose:\n@@ -1637,6 +1642,11 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nparsed out the pointers value, you may specify tova to speed things\nup.\n\"\"\"\n+ loctup = self.getLocation(va)\n+ if loctup is not None:\n+ logger.warn(\"0x%x: Attempting to make a Pointer where another location object exists (of type %r)\", va, loctup[L_LTYPE])\n+ return None\n+\npsize = self.psize\n# Get and document the xrefs created for the new location\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
VIVISECT core change: don't let makePointer() succeed overwriting other locations.
also, add logging to vivisect.__init__
|
718,770 |
05.07.2019 01:02:02
| 14,400 |
597922fef082455749485f6a6c59f1911ed77bb7
|
logging improvement: elfplt.py
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/elfplt.py",
"new_path": "vivisect/analysis/elf/elfplt.py",
"diff": "@@ -67,16 +67,16 @@ def analyzeFunction(vw, funcva):\nopval = oper0.getOperAddr(op, emu)\nloctup = vw.getLocation(opval)\n+ fname = vw.getName(opval)\nif loctup is None:\nlogger.warn(\"PLT: 0x%x - branch deref not defined: 0x%x\", opva, opval)\nreturn\nif loctup[vivisect.L_LTYPE] != vivisect.LOC_IMPORT: # FIXME: Why are some AMD64 IMPORTS showing up as LOC_POINTERs?\n- vw.vprint(\"0x%x: %r != %r\" % (funcva, loctup[vivisect.L_LTYPE], vivisect.LOC_IMPORT))\n+ logger.warn(\"0x%x: (0x%x) %r != %r (%r)\" % (funcva, opval, loctup[vivisect.L_LTYPE], vivisect.LOC_IMPORT, fname))\nreturn\n- fname = vw.getName(opval)\nif fname.endswith('_%.8x' % opval):\nfname = fname[:-9]\n#vw.makeName(funcva, \"plt_%s\" % fname, filelocal=True)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
logging improvement: elfplt.py
|
718,770 |
05.07.2019 09:38:31
| 14,400 |
103d05fdb0448c3fe67df13f0b563918fb7219ed
|
function array parsing (.init_array and .fini_array) extracted into it's own function. pointer analysis changes.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/generic/pointers.py",
"new_path": "vivisect/analysis/generic/pointers.py",
"diff": "@@ -4,7 +4,10 @@ country looking for pointers to interesting things.\nin a previous life, this analysis code lived inside VivWorkspace.analyze()\n\"\"\"\n-from vivisect.const import RTYPE_BASEPTR\n+import logging\n+from vivisect.const import RTYPE_BASEPTR, LOC_POINTER\n+\n+logger = logging.getLogger(__name__)\ndef analyze(vw):\n@@ -19,6 +22,31 @@ def analyze(vw):\nfor xfr, xto, xtype, xinfo in vw.getXrefsFrom(rva):\nvw.analyzePointer(xto)\n+ # Now, we'll analyze the pointers placed by the file wrapper (ELF, PE, MACHO, etc...)\n+ for pva, tva, pname in vw.getVaSetRows('PointersFromFile'):\n+ if vw.getLocation(pva) is None:\n+ if tva is None:\n+ logger.info('making pointer 0x%x (%r)', pva, pname)\n+ else:\n+ logger.info('making pointer 0x%x -> 0x%x (%r)', pva, tva, pname)\n+ vw.makePointer(pva, tva, follow=True)\n+\n+ for lva, lsz, lt, li in vw.getLocations(LOC_POINTER):\n+ tva = vw.readMemoryPtr(lva)\n+ if not vw.isValidPointer(tva):\n+ continue\n+\n+ if vw.getLocation(tva) is not None:\n+ continue\n+\n+ logger.info('following previously discovered pointer 0x%x -> 0x%x', lva, tva)\n+ try:\n+ vw.followPointer(tva)\n+ except Exception:\n+ if vw.verbose:\n+ vw.vprint(\"followPointer() failed for 0x%.8x (pval: 0x%.8x)\" % (lva, tva))\n+\n+\n# Now, lets find likely free-hanging pointers\nfor addr, pval in vw.findPointers():\nif vw.isDeadData(pval):\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -80,6 +80,26 @@ def makeRelocTable(vw, va, maxva, addbase, baseaddr):\nvw.setComment(va, tname)\nva += len(s)\n+def makeFunctionTable(elf, vw, tbladdr, size, tblname, funcs, ptrs, baseaddr=0):\n+ psize = vw.getPointerSize()\n+ pfmt = e_bits.le_fmt_chars[psize] #FIXME: make Endian-aware (needs plumbing through ELF)\n+ secbytes = elf.readAtRva(tbladdr, size)\n+ tbladdr += baseaddr\n+\n+ ptr_count = 0\n+ for off in range(0, size, psize):\n+ addr, = struct.unpack_from(pfmt, secbytes, off)\n+ addr += baseaddr\n+\n+ nstub = tblname + \"_%d\"\n+ pname = nstub % ptr_count\n+\n+ vw.makeName(addr, pname, filelocal=True)\n+ ptrs.append((tbladdr + off, addr, pname))\n+ funcs.append((pname, addr))\n+ ptr_count += 1\n+\n+\narch_names = {\nElf.EM_ARM:'arm',\nElf.EM_386:'i386',\n@@ -216,46 +236,14 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nnew_functions.append((\"init_function\", sva))\nelif sname == \".init_array\":\n- # handle pseudo-fixups first: these pointers require base-addresses\n- psize = vw.getPointerSize()\n- pfmt = e_bits.le_fmt_chars[psize] #FIXME: make Endian-aware (needs plumbing through ELF)\n- secbytes = elf.readAtRva(sec.sh_addr, size)\n- sh_addr = sec.sh_addr\n- if addbase: sh_addr += baseaddr\n-\n- ptr_count = 0\n- for off in range(0, size, psize):\n- addr, = struct.unpack_from(pfmt, secbytes, off)\n- if addbase: addr += baseaddr\n-\n- new_pointers.append((sh_addr + off, addr))\n- vw.makeName(addr, \"init_function_%d\" % ptr_count, filelocal=True)\n- vw.addXref(sh_addr + off, addr, REF_PTR)\n- new_functions.append((\"init_function\", addr))\n- ptr_count += 1\n+ makeFunctionTable(elf, vw, sec.sh_addr, size, 'init_function', new_functions, new_pointers, baseaddr)\nelif sname == \".fini\":\nvw.makeName(sva, \"fini_function\", filelocal=True)\nnew_functions.append((\"fini_function\", sva))\nelif sname == \".fini_array\":\n- # handle pseudo-fixups first: these pointers require base-addresses\n- psize = vw.getPointerSize()\n- pfmt = e_bits.le_fmt_chars[psize] #FIXME: make Endian-aware (needs plumbing through ELF)\n- secbytes = elf.readAtRva(sec.sh_addr, size)\n- sh_addr = sec.sh_addr\n- if addbase: sh_addr += baseaddr\n-\n- ptr_count = 0\n- for off in range(0, size, psize):\n- addr, = struct.unpack_from(pfmt, secbytes, off)\n- if addbase: addr += baseaddr\n-\n- new_pointers.append((sh_addr + off, addr))\n- vw.makeName(addr, \"fini_function_%d\" % ptr_count, filelocal=True)\n- vw.addXref(sec.sh_addr + off, addr, REF_PTR)\n- new_functions.append((\"fini_array entry\", addr))\n- ptr_count += 1\n+ makeFunctionTable(elf, vw, sec.sh_addr, size, 'fini_function', new_functions, new_pointers, baseaddr)\nelif sname == \".dynamic\": # Imports\nmakeDynamicTable(vw, sva, sva+size)\n@@ -441,18 +429,15 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nif vw.isValidPointer(baseaddr):\nvw.makeStructure(baseaddr, \"elf.Elf32\")\n- # do we add data_ptrs here? ideally they would be marked out, but analyzed after all other analysis...\n- # for now, ignore them.\n+ # mark all the entry points for analysis later\nfor cmnt, fva in new_functions:\nlogger.info('adding function from ELF metadata: 0x%x (%s)', fva, cmnt)\nvw.addEntryPoint(fva) # addEntryPoint queue's code analysis for later in the analysis pass\n- for va, tva in new_pointers:\n+ # mark all the pointers for analysis later\n+ for va, tva, pname in new_pointers:\nlogger.info('adding pointer 0x%x -> 0x%x', va, tva)\n- if tva is not None:\n- vw.makePointer(va, tva, follow=False) # depend on Pointer Analysis module, after code analysis\n- else:\n- vw.makePointer(va, follow=False)\n+ vw.setVaSetRow('PointersFromFile', (va, tva, pname))\nreturn fname\n@@ -474,6 +459,7 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nif arch in ('i386','amd64'):\nif name:\nif rtype in (Elf.R_386_JMP_SLOT, Elf.R_X86_64_GLOB_DAT):\n+ logger.info('Reloc: making Import 0x%x (name: %s/%s) ', rlva, name, dmglname)\nvw.makeImport(rlva, \"*\", name)\nvw.setComment(rlva, dmglname)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
function array parsing (.init_array and .fini_array) extracted into it's own function. pointer analysis changes.
|
718,770 |
08.07.2019 15:27:54
| 14,400 |
4e87a4f6a449b6e7e60951feb12618a0304dcf44
|
improved "ELF RELOC" types coverage, enhanced unit test robustness.
|
[
{
"change_type": "MODIFY",
"old_path": "Elf/elf_lookup.py",
"new_path": "Elf/elf_lookup.py",
"diff": "@@ -416,6 +416,20 @@ R_X86_64_DTPOFF32 = 21\nR_X86_64_GOTTPOFF = 22\nR_X86_64_TPOFF32 = 23\nR_X86_64_NUM = 24\n+R_X86_64_GOTOFF64 = 25\n+R_X86_64_GOTPC32 = 26\n+R_X86_64_GOT64 = 27\n+R_X86_64_GOTPCREL64 = 28\n+R_X86_64_GOTPC64 = 29\n+R_X86_64_GOTPLT64 = 30\n+R_X86_64_PLTOFF64 = 31\n+R_X86_64_SIZE32 = 32\n+R_X86_64_SIZE64 = 33\n+R_X86_64_GOTPC32_TLSDESC = 34\n+R_X86_64_TLSDESC_CALL = 35\n+R_X86_64_TLSDESC = 36\n+R_X86_64_IRELATIVE = 37\n+\nr_types_amd64 = {\nR_X86_64_NONE :'No reloc',\n@@ -442,6 +456,19 @@ R_X86_64_TLSLD :'32 bit signed PC relative offset to two GOT entries for LD\nR_X86_64_DTPOFF32 :'Offset in TLS block',\nR_X86_64_GOTTPOFF :'32 bit signed PC relative offset to GOT entry for IE symbol',\nR_X86_64_TPOFF32 :'Offset in initial TLS block',\n+R_X86_64_GOTOFF64 :'64 bit offset to GOT',\n+R_X86_64_GOTPC32 :'32 bit signed pc relative offset to GOT',\n+R_X86_64_GOT64 :'64-bit GOT entry offset',\n+R_X86_64_GOTPCREL64 :'64-bit PC relative offset to GOT entry',\n+R_X86_64_GOTPC64 :'64-bit PC relative offset to GOT',\n+R_X86_64_GOTPLT64 :'like GOT64, says PLT entry needed',\n+R_X86_64_PLTOFF64 :'64-bit GOT relative offset to PLT entry',\n+R_X86_64_SIZE32 :'Size of symbol plus 32-bit addend',\n+R_X86_64_SIZE64 :'Size of symbol plus 64-bit addend',\n+R_X86_64_GOTPC32_TLSDESC :'GOT offset for TLS descriptor. ',\n+R_X86_64_TLSDESC_CALL :'Marker for call through TLS descriptor. ',\n+R_X86_64_TLSDESC :'TLS descriptor. ',\n+R_X86_64_IRELATIVE :'Adjust indirectly by program base',\n}\n## Define e_flags to 386\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -474,7 +474,7 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nsym = dsyms[symidx]\nptr = sym.st_value\n- if rtype in (Elf.R_386_RELATIVE, ):\n+ if rtype in (Elf.R_386_RELATIVE, ): # R_X86_64_RELATIVE is the same number\nptr = vw.readMemoryPtr(rlva)\nlogger.info('R_386_RELATIVE: adding Relocation 0x%x -> 0x%x (name: %s) ', rlva, ptr, dmglname)\nvw.addRelocation(rlva, vivisect.RTYPE_BASEPTR, ptr)\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/testelf.py",
"new_path": "vivisect/tests/testelf.py",
"diff": "@@ -48,12 +48,12 @@ class ELFTests(unittest.TestCase):\ndef imports(self, vw, data):\n# simple comparison to ensure same imports. perhaps too simple.\nnewimps = vw.getImports()\n- self.assertEqual(newimps, data['imports'])\n+ self.assertListEqual(newimps, data['imports'])\ndef exports(self, vw, data):\n# simple comparison to ensure same exports. perhaps too simple.\nnewexps = vw.getExports()\n- self.assertEqual(newexps, data['exports'])\n+ self.assertListEqual(newexps, data['exports'])\ndef relocs(self, vw, data):\n# simple comparison to ensure same relocs. perhaps too simple.\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
improved "ELF RELOC" types coverage, enhanced unit test robustness.
|
718,770 |
09.07.2019 11:46:50
| 14,400 |
e851b1e0f0e4885b93341aa6d9eeebc97cac03aa
|
adding analysis module debug logger.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -435,6 +435,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nmod = self.loadModule(modname)\nself.amods[modname] = mod\nself.amodlist.append(modname)\n+ logger.debug('Adding Analysis Module: %s', modname)\ndef delAnalysisModule(self, modname):\n\"\"\"\n@@ -461,6 +462,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nmod = self.loadModule(modname)\nself.fmods[modname] = mod\nself.fmodlist.append(modname)\n+ logger.debug('Adding Function Analysis Module: %s', modname)\ndef delFuncAnalysisModule(self, modname):\n'''\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
adding analysis module debug logger.
|
718,770 |
10.07.2019 14:48:03
| 14,400 |
1f17fdc2cd70e9f2e24461cd9581842fd74b2375
|
move naming out of _handleADDEXPORT() and back into addExport(). allow makeuniq for addExport()
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -755,7 +755,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\n\"\"\"\nreturn list(self.exports)\n- def addExport(self, va, etype, name, filename):\n+ def addExport(self, va, etype, name, filename, makeuniq=False):\n\"\"\"\nAdd an already created export object.\n\"\"\"\n@@ -764,10 +764,11 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\n# check if it exists and is *not* what we're trying to make it\ncurval = self.vaByName(rname)\n- if curval != None and curval != va:\n+ if curval != None and curval != va and not makeuniq:\n# if we don't force it to make a uniq name, bail\nraise Exception(\"Duplicate Name: %s => 0x%x (cur: 0x%x)\" % (rname, va, curval))\n+ rname = self.makeName(va, rname, makeuniq=makeuniq)\nself._fireEvent(VWE_ADDEXPORT, (va,etype,name,filename))\ndef getExport(self, va):\n@@ -2094,6 +2095,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nname = newname\nself._fireEvent(VWE_SETNAME, (va,name))\n+ return name\ndef saveWorkspace(self, fullsave=True):\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/base.py",
"new_path": "vivisect/base.py",
"diff": "@@ -396,8 +396,6 @@ class VivWorkspaceCore(object, viv_impapi.ImportApi):\nva, etype, name, filename = einfo\nself.exports.append(einfo)\nself.exports_by_va[va] = einfo\n- fullname = \"%s.%s\" % (filename,name)\n- self.makeName(va, fullname, makeuniq=True)\ndef _handleSETMETA(self, einfo):\nname,value = einfo\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -297,7 +297,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nif stype == Elf.STT_FUNC or (stype == Elf.STT_GNU_IFUNC and arch in ('i386','amd64')): # HACK: linux is what we're really after.\ntry:\nnew_functions.append((\"DynSym: STT_FUNC\", sva))\n- vw.addExport(sva, EXP_FUNCTION, s.name, fname)\n+ vw.addExport(sva, EXP_FUNCTION, s.name, fname, makeuniq=True)\nvw.setComment(sva, dmglname)\nexcept Exception, e:\nvw.vprint('addExport Failure: (%s) %s' % (s.name, e))\n@@ -305,7 +305,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nelif stype == Elf.STT_OBJECT:\nif vw.isValidPointer(sva):\ntry:\n- vw.addExport(sva, EXP_DATA, s.name, fname)\n+ vw.addExport(sva, EXP_DATA, s.name, fname, makeuniq=True)\nvw.setComment(sva, dmglname)\nexcept Exception as e:\nvw.vprint('WARNING: %s' % e)\n@@ -318,7 +318,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nif vw.isValidPointer(sva):\ntry:\nnew_functions.append((\"DynSym: STT_HIOS\", sva))\n- vw.addExport(sva, EXP_FUNCTION, s.name, fname)\n+ vw.addExport(sva, EXP_FUNCTION, s.name, fname, makeuniq=True)\nvw.setComment(sva, dmglname)\nexcept Exception as e:\nvw.vprint('WARNING: %s' % e)\n@@ -328,7 +328,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nif addbase: sva += baseaddr\nif vw.isValidPointer(sva):\ntry:\n- vw.addExport(sva, EXP_DATA, s.name, fname)\n+ vw.addExport(sva, EXP_DATA, s.name, fname, makeuniq=True)\nvw.setComment(sva, dmglname)\nexcept Exception as e:\nvw.vprint('WARNING: %s' % e)\n@@ -571,6 +571,7 @@ def normName(name):\n'''\nNormalize symbol names. ie. drop the @@GOBBLEDEGOOK from the end\n'''\n+ return name\natidx = name.find('@@')\nif atidx > -1:\nname = name[:atidx]\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
move naming out of _handleADDEXPORT() and back into addExport(). allow makeuniq for addExport()
|
718,770 |
10.07.2019 17:14:43
| 14,400 |
b1f3f817d756823bf90af443095ab83449aa8421
|
give a name to "14" Processor-specific and OS-specific symbols
|
[
{
"change_type": "MODIFY",
"old_path": "Elf/elf_lookup.py",
"new_path": "Elf/elf_lookup.py",
"diff": "@@ -590,8 +590,10 @@ STT_FILE = 4\nSTT_COMMON = 5\nSTT_TLS = 6\nSTT_LOOS = 10\n+STT_MDOS = 11 # there's only one that isn't HI or LO...\nSTT_HIOS = 12\nSTT_LOPROC = 13\n+STT_MDPROC = 14\nSTT_HIPROC = 15\nSTT_GNU_IFUNC = 10\n@@ -605,8 +607,10 @@ STT_FILE:\"Symbol's name is file name\",\nSTT_COMMON:\"Symbol is a common data object\",\nSTT_TLS:\"Symbol is thread-local data\",\nSTT_LOOS:\"Start of OS-specific\",\n+STT_MDOS:\"Middle of OS-specific\",\nSTT_HIOS:\"End of OS-specific\",\nSTT_LOPROC:\"Start of processor-specific\",\n+STT_MDPROC:\"Middle of processor-specific\",\nSTT_HIPROC:\"End of processor-specific\",\n}\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -323,7 +323,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nexcept Exception as e:\nvw.vprint('WARNING: %s' % e)\n- elif stype == 14:# OMG WTF FUCK ALL THIS NONSENSE! FIXME\n+ elif stype == Elf.STT_MDPROC: # there's only one that isn't HI or LO...\nsva = s.st_other\nif addbase: sva += baseaddr\nif vw.isValidPointer(sva):\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
give a name to "14" Processor-specific and OS-specific symbols
|
718,770 |
10.07.2019 17:52:25
| 14,400 |
1767ccd12f9114ca10368ef89c1724adebee64cc
|
Reloc R_X86_64_IRELATIVE support (amd64 libc is *much* happier now)
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -758,6 +758,10 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\ndef addExport(self, va, etype, name, filename, makeuniq=False):\n\"\"\"\nAdd an already created export object.\n+\n+ makeuniq allows Vivisect to append some number to make the name unique.\n+ This behavior allows for colliding names (eg. different versions of a function)\n+ to coexist in the same workspace.\n\"\"\"\nrname = \"%s.%s\" % (filename,name)\n@@ -2065,6 +2069,12 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nSet a readable name for the given location by va. There\n*must* be a Location defined for the VA before you may name\nit. You may set a location's name to None to remove a name.\n+\n+ makeuniq allows Vivisect to append some number to make the name unique.\n+ This behavior allows for colliding names (eg. different versions of a function)\n+ to coexist in the same workspace.\n+\n+ default behavior is to fail on duplicate (False).\n\"\"\"\nif filelocal:\nsegtup = self.getSegment(va)\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/elfplt.py",
"new_path": "vivisect/analysis/elf/elfplt.py",
"diff": "@@ -39,6 +39,7 @@ def analyzeFunction(vw, funcva):\nif segname not in (\".plt\", \".plt.got\"):\nreturn\n+ logger.info('analysis of PLT function: 0x%x', funcva)\ncount = 0\nopva = funcva\nop = vw.parseOpcode(opva)\n@@ -63,6 +64,7 @@ def analyzeFunction(vw, funcva):\n# all architectures should at least have some minimal emulator\nemu = vw.getEmulator()\nemu.setRegister(e_i386.REG_EBX, gotplt) # every emulator will have a 4th register, and if it's not used, no harm done.\n+ # FIXME: should we use op.getBranches(emu)?\noper0 = op.opers[0]\nopval = oper0.getOperAddr(op, emu)\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -458,7 +458,13 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nlogger.debug('relocs: 0x%x: %r', rlva, name)\nif arch in ('i386', 'amd64'):\nif name:\n- if rtype in (Elf.R_386_JMP_SLOT, Elf.R_X86_64_GLOB_DAT):\n+ if rtype == Elf.R_X86_64_IRELATIVE:\n+ # before making import, let's fix up the pointer as a BASEPTR Relocation\n+ ptr = r.r_addend\n+ vw.addRelocation(rlva, vivisect.RTYPE_BASEPTR, ptr)\n+ logger.info('Reloc: R_X86_64_IRELATIVE 0x%x', rlva)\n+\n+ if rtype in (Elf.R_386_JMP_SLOT, Elf.R_X86_64_GLOB_DAT, Elf.R_X86_64_IRELATIVE):\nlogger.info('Reloc: making Import 0x%x (name: %s/%s) ', rlva, name, dmglname)\nvw.makeImport(rlva, \"*\", name)\nvw.setComment(rlva, dmglname)\n@@ -467,7 +473,7 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\npass\nelse:\n- logger.info('unknown reloc type: %d %s (at %s)' % (rtype, name, hex(rlva)))\n+ logger.warn('unknown reloc type: %d %s (at %s)' % (rtype, name, hex(rlva)))\nelse:\nsymidx = Elf.getRelocSymTabIndex(r.r_info)\n@@ -479,6 +485,20 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nlogger.info('R_386_RELATIVE: adding Relocation 0x%x -> 0x%x (name: %s) ', rlva, ptr, dmglname)\nvw.addRelocation(rlva, vivisect.RTYPE_BASEPTR, ptr)\n+ elif rtype == Elf.R_X86_64_IRELATIVE:\n+ # first make it a relocation that is based on the imagebase\n+ ptr = r.r_addend\n+ logger.info('R_X86_64_IRELATIVE: adding Relocation 0x%x -> 0x%x (name: %r %r) ', rlva, ptr, name, dmglname)\n+ vw.addRelocation(rlva, vivisect.RTYPE_BASEPTR, ptr)\n+\n+ # next get the target and find a name, since the reloc itself doesn't have one\n+ tgt = vw.readMemoryPtr(rlva)\n+ tgtname = vw.getName(tgt)\n+ logger.info(' name(0x%x): %r', tgt, tgtname)\n+ fn, symname = tgtname.split('.', 1)\n+ vw.makeImport(rlva, fn, symname)\n+ logger.info('Reloc: making Import 0x%x (name: %s.%s) ', rlva, fn, symname)\n+\nelse:\nlogger.info('unknown reloc type: %d %s (at %s)' % (rtype, name, hex(rlva)))\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Reloc R_X86_64_IRELATIVE support (amd64 libc is *much* happier now)
|
718,770 |
11.07.2019 00:15:39
| 14,400 |
a34507b3b7b77f1cfbcc3e495735b72ba3f3c267
|
__libc_start_main analysis mod for Elf. a couple options here for discussion and posterity. while the emulator approach for fmod is appealing, the one-shot mod is more practical... perhaps a merging of the two.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/__init__.py",
"new_path": "vivisect/analysis/__init__.py",
"diff": "@@ -77,6 +77,7 @@ def addAnalysisModules(vw):\nvw.addAnalysisModule(\"vivisect.analysis.generic.funcentries\")\nvw.addAnalysisModule(\"vivisect.analysis.generic.relocations\")\n+ vw.addAnalysisModule(\"vivisect.analysis.elf.libc_start_main\")\nvw.addAnalysisModule(\"vivisect.analysis.generic.pointertables\")\nvw.addAnalysisModule(\"vivisect.analysis.generic.emucode\")\n"
},
{
"change_type": "ADD",
"old_path": null,
"new_path": "vivisect/analysis/elf/libc_start_main.py",
"diff": "+import sys\n+import envi\n+import logging\n+\n+import vivisect\n+import vivisect.impemu.monitor as viv_imp_monitor\n+\n+logger = logging.getLogger(__name__)\n+\n+\n+def analyzeFunction(vw, funcva):\n+ '''\n+ search through all calls, looking for a call to an import named __libc_start_main\n+ then check for arg0\n+ '''\n+ global emu, emumon, cconv\n+ try:\n+ emu = vw.getEmulator()\n+ emumon = AnalysisMonitor(vw, funcva)\n+\n+ emu.setEmulationMonitor(emumon)\n+ emu.runFunction(funcva, maxhit=1)\n+\n+ if not emumon.success:\n+ return\n+\n+ api = vw.getFunctionApi(emumon.startmain)\n+ cconv = emu.getCallingConvention(api[vivisect.API_CCONV])\n+\n+ args = cconv.getCallArgs(emu, 6)\n+ print args\n+ vw.addEntryPoint(args[0])\n+ vw.makeFunction(args[0])\n+\n+ except Exception as e:\n+ sys.excepthook(*sys.exc_info())\n+\n+\n+\n+def analyze(vw):\n+ global emu, emumon\n+ cg = vw.getCallGraph()\n+\n+ for va, name in vw.getNames():\n+ if name == '__libc_start_main_%.8x' % va:\n+ for xfr, xto, xtype, xtinfo in vw.getXrefsTo(va):\n+ logger.info(\"0x%x -> 0x%x\", xfr, xto)\n+ arg0va = vw.getLocation(xfr-1)[0]\n+ op0 = vw.parseOpcode(arg0va)\n+\n+ arg1va = vw.getLocation(arg0va-1)[0]\n+ op1 = vw.parseOpcode(arg1va)\n+\n+ arg2va = vw.getLocation(arg1va-1)[0]\n+ op2 = vw.parseOpcode(arg2va)\n+\n+ try: # attempt to use emulation to setup call, requires accurate calling convention\n+ emu = vw.getEmulator()\n+ emu.setProgramCounter(arg2va)\n+ except Exception as e:\n+ print repr(e)\n+\n+ main = op0.opers[-1].getOperValue(op0)\n+ logger.info(\"main = 0x%x\", main)\n+ vw.addEntryPoint(main)\n+ vw.makeFunction(main)\n+ vw.makeName(main, 'main', True)\n+\n+\n+\n+class AnalysisMonitor(viv_imp_monitor.AnalysisMonitor):\n+\n+ def __init__(self, vw, fva):\n+ self.success = False\n+ self.emu = None\n+ self.startmain = None\n+ viv_imp_monitor.AnalysisMonitor.__init__(self, vw, fva)\n+ for va, name in vw.getNames():\n+ if name == '__libc_start_main_%.8x' % va:\n+ self.startmain = va\n+\n+ def prehook(self, emu, op, starteip):\n+ viv_imp_monitor.AnalysisMonitor.prehook(self, emu, op, starteip)\n+\n+ if op.iflags & envi.IF_CALL:\n+ # it's a call, get the target\n+ tgt = [br for br in op.getBranches(emu) if br[0] != op.va + len(op)]\n+\n+ # check if it matches what we believe to be __libc_start_main\n+ if tgt[0][0] == self.startmain:\n+ self.success = True\n+ self.emu = emu\n+ self.stop()\n+\n+\n+\n+\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
__libc_start_main analysis mod for Elf. a couple options here for discussion and posterity. while the emulator approach for fmod is appealing, the one-shot mod is more practical... perhaps a merging of the two.
|
718,770 |
11.07.2019 10:48:13
| 14,400 |
6d761092ba70c2419caddbb2c38526b3e8f24dc6
|
improved list comparison unit tests
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/testelf.py",
"new_path": "vivisect/tests/testelf.py",
"diff": "@@ -53,17 +53,26 @@ class ELFTests(unittest.TestCase):\ndef imports(self, vw, data):\n# simple comparison to ensure same imports. perhaps too simple.\nnewimps = vw.getImports()\n- self.assertListEqual(newimps, data['imports'])\n+ newimps.sort()\n+ oldimps = data['imports']\n+ oldimps.sort()\n+ self.assertListEqual(newimps, oldimps)\ndef exports(self, vw, data):\n# simple comparison to ensure same exports. perhaps too simple.\nnewexps = vw.getExports()\n- self.assertListEqual(newexps, data['exports'])\n+ newexps.sort()\n+ oldexps = data['exports']\n+ oldexps.sort()\n+ self.assertListEqual(newexps, oldexps)\ndef relocs(self, vw, data):\n# simple comparison to ensure same relocs. perhaps too simple.\nnewrels = vw.getRelocations()\n- self.assertEqual(newrels, data['relocs'])\n+ newrels.sort()\n+ oldrels = data['relocs']\n+ oldrels.sort()\n+ self.assertEqual(newrels, newrels)\ndef pltgot(self, vw, data):\nfor pltva, gotva in data['pltgot']:\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
improved list comparison unit tests
|
718,765 |
15.07.2019 11:52:38
| 14,400 |
ccf7fa4db5d5a81f7daf912e115a99e3f52cb928
|
Fix one place where we have tained args causing infinite loops in emulation
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/impemu/emulator.py",
"new_path": "vivisect/impemu/emulator.py",
"diff": "@@ -36,6 +36,7 @@ class WorkspaceEmulator:\nself.hooks = {}\nself.taints = {}\nself.taintva = itertools.count(0x41560000, 8192)\n+ self.taintrepr = {}\nself.uninit_use = {}\nself.logwrite = logwrite\n@@ -430,44 +431,43 @@ class WorkspaceEmulator:\nFor the base \"known\" taint types, return a humon readable string\nto represent the value of the taint.\n'''\n+\n+ if taint in self.trepr:\n+ return self.trepr[taint]\n+\nva, ttype, tinfo = taint\nif ttype == 'uninitreg':\n- return self.getRegisterName(tinfo)\n-\n- if ttype == 'import':\n+ trepr = self.getRegisterName(tinfo)\n+ elif ttype == 'import':\nlva,lsize,ltype,linfo = tinfo\n- return linfo\n-\n- if ttype == 'dynlib':\n+ trepr = linfo\n+ elif ttype == 'dynlib':\nlibname = tinfo\n- return libname\n-\n- if ttype == 'dynfunc':\n+ trepr = libname\n+ elif ttype == 'dynfunc':\nlibname,funcname = tinfo\n- return '%s.%s' % (libname,funcname)\n-\n- if ttype == 'funcstack':\n+ trepr = '%s.%s' % (libname,funcname)\n+ elif ttype == 'funcstack':\nstackoff = tinfo\nif self.funcva:\nflocal = self.vw.getFunctionLocal(self.funcva, stackoff)\nif flocal != None:\ntypename,argname = flocal\nreturn argname\n-\no = '+'\nif stackoff < 0:\no = '-'\n-\n- return 'sp%s%d' % (o, abs(stackoff))\n-\n- if ttype == 'apicall':\n+ trepr = 'sp%s%d' % (o, abs(stackoff))\n+ elif ttype == 'apicall':\nop, pc, api, argv = tinfo\nrettype, retname, callconv, callname, callargs = api\ncallstr = self.reprVivValue(pc)\nargsstr = ','.join([self.reprVivValue(x) for x in argv])\n- return '%s(%s)' % (callstr,argsstr)\n+ trepr = '%s(%s)' % (callstr, argsstr)\n+ else:\n+ trepr = 'taint: 0x%.8x %s %r' % (va, ttype, tinfo)\n- return 'taint: 0x%.8x %s %r' % (va, ttype, tinfo)\n+ self.taintrepr[taint] = trepr\ndef reprVivValue(self, val):\n'''\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Fix one place where we have tained args causing infinite loops in emulation
|
718,770 |
15.07.2019 15:29:50
| 14,400 |
11050072e49afa8b48c29ed7e41fef0287a3dd03
|
Viv shouldn't crash just because we accidentally ask to repr a non-existent pointer. previously the QT4 "non-crashing" policy saved us...
|
[
{
"change_type": "MODIFY",
"old_path": "envi/cli.py",
"new_path": "envi/cli.py",
"diff": "@@ -716,11 +716,15 @@ class EnviCli(Cmd):\nif va == 0:\nreturn \"NULL\"\n+ try:\nmbase,msize,mperm,mfile = self.memobj.getMemoryMap(va)\nret = mfile\nsym = self.symobj.getSymByAddr(va, exact=False)\nif sym != None:\nret = \"%s + %d\" % (repr(sym),va-long(sym))\n+ except:\n+ ret = hex(va)\n+\nreturn ret\ndef do_memdump(self, line):\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Viv shouldn't crash just because we accidentally ask to repr a non-existent pointer. previously the QT4 "non-crashing" policy saved us...
|
718,770 |
15.07.2019 16:52:17
| 14,400 |
06e736655792202144a61cb3458560902cf1d416
|
endianness and other recommendations from
|
[
{
"change_type": "MODIFY",
"old_path": "Elf/__init__.py",
"new_path": "Elf/__init__.py",
"diff": "@@ -232,10 +232,8 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nbytes = fd.read(len(e))\ne.vsParse(bytes)\n- if e.e_data == ELFDATA2MSB:\n- bigend = True\n- else:\n- bigend = False\n+ # if e_data == 1, then 32 bit, if e_data == 2, 64bit\n+ bigend = (e.e_data == ELFDATA2MSB)\n#Parse 32bit header\nif e.e_class == ELFCLASS32:\n@@ -501,6 +499,19 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nself.fd.seek(off)\nreturn self.fd.read(size)\n+ def getEndian(self):\n+ '''\n+ Is architecture BigEndian?\n+ Returns True for MSB, False for LSB\n+\n+ This works with Vivisect's definitions of ENDIAN_MSB/ENDIAN_LSB constants:\n+ (defined in envi/const.py)\n+ ENDIAN_LSB = 0\n+ ENDIAN_MSB = 1\n+\n+ '''\n+ return self.e_data == ELFDATA2MSB\n+\ndef getSection(self, secname):\nreturn self.secnames.get(secname, None)\n@@ -550,7 +561,7 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\noffset = note.vsParse(notebytes, offset=offset)\nyield note\nexcept Exception as e:\n- print(\"Elf.getNotes() Exception: %r\" % e)\n+ logger.warn(\"Elf.getNotes() Exception: %r\", e)\ndef getPlatform(self):\n'''\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/libc_start_main.py",
"new_path": "vivisect/analysis/elf/libc_start_main.py",
"diff": "@@ -28,7 +28,6 @@ def analyzeFunction(vw, funcva):\ncconv = emu.getCallingConvention(api[vivisect.API_CCONV])\nargs = cconv.getCallArgs(emu, 6)\n- print args\nvw.addEntryPoint(args[0])\nvw.makeFunction(args[0])\n@@ -58,7 +57,7 @@ def analyze(vw):\nemu = vw.getEmulator()\nemu.setProgramCounter(arg2va)\nexcept Exception as e:\n- print repr(e)\n+ logger.warn(repr(e))\nmain = op0.opers[-1].getOperValue(op0)\nlogger.info(\"main = 0x%x\", main)\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -47,7 +47,7 @@ def makeStringTable(vw, va, maxva):\nreturn\nl = vw.makeString(va)\nva += l[vivisect.L_SIZE]\n- except Exception, e:\n+ except Exception as e:\nlogger.warn(\"makeStringTable\\t%r\", e)\nreturn\n@@ -82,7 +82,8 @@ def makeRelocTable(vw, va, maxva, addbase, baseaddr):\ndef makeFunctionTable(elf, vw, tbladdr, size, tblname, funcs, ptrs, baseaddr=0):\npsize = vw.getPointerSize()\n- pfmt = e_bits.le_fmt_chars[psize] #FIXME: make Endian-aware (needs plumbing through ELF)\n+ fmtgrps = e_bits.fmt_chars[vw.getEndian()]\n+ pfmt = fmtgrps[psize]\nsecbytes = elf.readAtRva(tbladdr, size)\ntbladdr += baseaddr\n@@ -140,6 +141,9 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nvw.addNoReturnApi(\"*.j__ZSt9terminatev\")\nvw.addNoReturnApi(\"*.std::terminate(void)\")\n+ # for VivWorkspace, MSB==1, LSB==0... which is the same as True/False\n+ vw.setEndian(elf.getEndian())\n+\n# Base addr is earliest section address rounded to pagesize\n# NOTE: This is only for prelink'd so's and exe's. Make something for old style so.\naddbase = False\n@@ -299,7 +303,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nnew_functions.append((\"DynSym: STT_FUNC\", sva))\nvw.addExport(sva, EXP_FUNCTION, s.name, fname, makeuniq=True)\nvw.setComment(sva, dmglname)\n- except Exception, e:\n+ except Exception as e:\nvw.vprint('addExport Failure: (%s) %s' % (s.name, e))\nelif stype == Elf.STT_OBJECT:\n@@ -411,7 +415,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nelse:\nvw.makeName(sva, dmglname, filelocal=True, makeuniq=True)\n- except Exception, e:\n+ except Exception as e:\nlogger.warn(\"WARNING:\\t%r\",e)\nif s.st_info == Elf.STT_FUNC:\n@@ -577,7 +581,7 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nelse:\nlogger.warn('unknown reloc type: %d %s (at %s)' % (rtype, name, hex(rlva)))\n- except vivisect.InvalidLocation, e:\n+ except vivisect.InvalidLocation as e:\nlogger.warn(\"NOTE\\t%r\", e)\ndef connectSymbols(vw):\n@@ -606,7 +610,7 @@ def demangle(name):\ntry:\nimport cxxfilt\nname = cxxfilt.demangle(name)\n- except Exception, e:\n+ except Exception as e:\nlogger.debug('failed to demangle name (%r): %r', name, e)\nreturn name\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
endianness and other recommendations from @rakuyo.
|
718,770 |
15.07.2019 22:12:24
| 14,400 |
fd420d1288bbc7ca5c93b5be4140bbf4cecd1e34
|
bugfix: addbase for makeFunctionTable()
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -80,17 +80,19 @@ def makeRelocTable(vw, va, maxva, addbase, baseaddr):\nvw.setComment(va, tname)\nva += len(s)\n-def makeFunctionTable(elf, vw, tbladdr, size, tblname, funcs, ptrs, baseaddr=0):\n+def makeFunctionTable(elf, vw, tbladdr, size, tblname, funcs, ptrs, baseaddr=0, addbase=False):\n+ logger.debug('makeFunctionTable(tbladdr=0x%x, size=0x%x, tblname=%r, baseaddr=0x%x)',\n+ tbladdr, size, tblname, baseaddr)\npsize = vw.getPointerSize()\nfmtgrps = e_bits.fmt_chars[vw.getEndian()]\npfmt = fmtgrps[psize]\nsecbytes = elf.readAtRva(tbladdr, size)\n- tbladdr += baseaddr\n+ if addbase: tbladdr += baseaddr\nptr_count = 0\nfor off in range(0, size, psize):\naddr, = struct.unpack_from(pfmt, secbytes, off)\n- addr += baseaddr\n+ if addbase: addr += baseaddr\nnstub = tblname + \"_%d\"\npname = nstub % ptr_count\n@@ -240,14 +242,14 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nnew_functions.append((\"init_function\", sva))\nelif sname == \".init_array\":\n- makeFunctionTable(elf, vw, sec.sh_addr, size, 'init_function', new_functions, new_pointers, baseaddr)\n+ makeFunctionTable(elf, vw, sec.sh_addr, size, 'init_function', new_functions, new_pointers, baseaddr, addbase)\nelif sname == \".fini\":\nvw.makeName(sva, \"fini_function\", filelocal=True)\nnew_functions.append((\"fini_function\", sva))\nelif sname == \".fini_array\":\n- makeFunctionTable(elf, vw, sec.sh_addr, size, 'fini_function', new_functions, new_pointers, baseaddr)\n+ makeFunctionTable(elf, vw, sec.sh_addr, size, 'fini_function', new_functions, new_pointers, baseaddr, addbase)\nelif sname == \".dynamic\": # Imports\nmakeDynamicTable(vw, sva, sva+size)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
bugfix: addbase for makeFunctionTable()
|
718,770 |
15.07.2019 22:13:09
| 14,400 |
34df01bbead725bba8cef29a9c81ad9a3b0a4420
|
wrap interactive python compiling in try/except clause.
|
[
{
"change_type": "MODIFY",
"old_path": "vqt/qpython.py",
"new_path": "vqt/qpython.py",
"diff": "@@ -63,9 +63,14 @@ class VQPythonView(QWidget):\ndef _okClicked(self):\npycode = str(self._textWidget.document().toPlainText())\n+ try:\ncobj = compile(pycode, \"vqpython_exec.py\", \"exec\")\nsthr = ScriptThread(cobj, self._locals)\nsthr.start()\n+ except:\n+ exceptstr = traceback.format_exc()\n+ scripterr(\"Can't Compile\", exceptstr)\n+\ndef _helpClicked(self):\nwithhelp = []\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
wrap interactive python compiling in try/except clause.
|
718,770 |
15.07.2019 22:31:32
| 14,400 |
8be6a6b463d86b1630474502b23e20070703ccdc
|
reworking libc_start_main analysis module to use emulation and calling convention objects. fixed bugs when __entry uses a deref call directly against the IMPORT instead of through the PLT.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/libc_start_main.py",
"new_path": "vivisect/analysis/elf/libc_start_main.py",
"diff": "import sys\n-import envi\nimport logging\n+import envi\nimport vivisect\nimport vivisect.impemu.monitor as viv_imp_monitor\n@@ -22,14 +22,24 @@ def analyzeFunction(vw, funcva):\nemu.runFunction(funcva, maxhit=1)\nif not emumon.success:\n+ logger.info(\" emumon failure: %r\", vars(emumon))\nreturn\n-\n+ try:\napi = vw.getFunctionApi(emumon.startmain)\ncconv = emu.getCallingConvention(api[vivisect.API_CCONV])\n+ except:\n+ ccname = vw.getMeta('DefaultCall')\n+ cconv = emu.getCallingConvention(ccname)\n+\n+ args = cconv.getCallArgs(emu, 1)\n+ mainva = args[0]\n- args = cconv.getCallArgs(emu, 6)\n- vw.addEntryPoint(args[0])\n- vw.makeFunction(args[0])\n+ vw.addEntryPoint(mainva)\n+ vw.makeFunction(mainva)\n+\n+ curname = vw.getName(mainva)\n+ if curname in (None, \"sub_%.8x\" % mainva):\n+ vw.makeName(mainva, 'main', True)\nexcept Exception as e:\nsys.excepthook(*sys.exc_info())\n@@ -37,13 +47,16 @@ def analyzeFunction(vw, funcva):\ndef analyze(vw):\n- global emu, emumon\n- cg = vw.getCallGraph()\n+ logger.info('analyze() ')\nfor va, name in vw.getNames():\n- if name == '__libc_start_main_%.8x' % va:\n+ lcsm = '__libc_start_main_%.8x' % va\n+ if name in (lcsm, \"*.\"+lcsm):\nfor xfr, xto, xtype, xtinfo in vw.getXrefsTo(va):\nlogger.info(\"0x%x -> 0x%x\", xfr, xto)\n+ funcva = vw.getFunction(xfr)\n+ analyzeFunction(vw, funcva)\n+ '''\narg0va = vw.getLocation(xfr-1)[0]\nop0 = vw.parseOpcode(arg0va)\n@@ -64,6 +77,7 @@ def analyze(vw):\nvw.addEntryPoint(main)\nvw.makeFunction(main)\nvw.makeName(main, 'main', True)\n+ '''\n@@ -74,8 +88,10 @@ class AnalysisMonitor(viv_imp_monitor.AnalysisMonitor):\nself.emu = None\nself.startmain = None\nviv_imp_monitor.AnalysisMonitor.__init__(self, vw, fva)\n+\nfor va, name in vw.getNames():\n- if name == '__libc_start_main_%.8x' % va:\n+ lcsm = '__libc_start_main_%.8x' % va\n+ if name in (lcsm, '*.' + lcsm):\nself.startmain = va\ndef prehook(self, emu, op, starteip):\n@@ -83,13 +99,16 @@ class AnalysisMonitor(viv_imp_monitor.AnalysisMonitor):\nif op.iflags & envi.IF_CALL:\n# it's a call, get the target\n- tgt = [br for br in op.getBranches(emu) if br[0] != op.va + len(op)]\n+ branches = [br for br in op.getBranches(emu) if not (br[1] & envi.BR_FALL)]\n+ logger.debug('libc_start_main: 0x%x\\ttgts: %r', self.startmain, branches)\n# check if it matches what we believe to be __libc_start_main\n- if tgt[0][0] == self.startmain:\n+ for branch in branches:\n+ tgt, flags = branch\n+ if tgt == self.startmain:\nself.success = True\nself.emu = emu\n- self.stop()\n+ emu.stop()\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
reworking libc_start_main analysis module to use emulation and calling convention objects. fixed bugs when __entry uses a deref call directly against the IMPORT instead of through the PLT.
|
718,765 |
16.07.2019 15:23:03
| 14,400 |
6a9ac612c00b0f6f1db553864004291246418c49
|
fix issue where we would sometimes jump off the end of a jump table if it's at the end of the segment
|
[
{
"change_type": "MODIFY",
"old_path": "envi/codeflow.py",
"new_path": "envi/codeflow.py",
"diff": "@@ -156,7 +156,7 @@ class CodeFlowContext(object):\nexcept envi.InvalidInstruction, e:\nprint 'parseOpcode error at 0x%.8x: %s' % (va,e)\ncontinue\n- except Exception, e:\n+ except Exception as e:\nprint 'parseOpcode error at 0x%.8x: %s' % (va,e)\ncontinue\n@@ -193,6 +193,8 @@ class CodeFlowContext(object):\nbranches.append((bdest, envi.BR_COND))\nptrbase += self._mem.psize\n+ if not self._mem.isValidPointer(ptrbase):\n+ break\nbdest = self._mem.readMemoryFormat(ptrbase, ptrfmt)[0]\ncontinue\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -1006,8 +1006,9 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nself.makeName(rdest, \"case%d_%.8x\" % (i, rdest))\nptrbase += self.psize\n- if len(self.getXrefsTo(ptrbase)):\n- break # Another xref means not our table anymore\n+ if len(self.getXrefsTo(ptrbase)) or not self.isValidPointer(ptrbase):\n+ # Another xref or an invalid pointer means we're done here\n+ break\ni += 1\nrdest = self.castPointer(ptrbase)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
fix issue where we would sometimes jump off the end of a jump table if it's at the end of the segment
|
718,765 |
16.07.2019 15:24:05
| 14,400 |
04239e4dcf2ba88de37db2b672de9427393a43b4
|
small err compat
|
[
{
"change_type": "MODIFY",
"old_path": "envi/codeflow.py",
"new_path": "envi/codeflow.py",
"diff": "@@ -153,7 +153,7 @@ class CodeFlowContext(object):\ntry:\nop = self._mem.parseOpcode(va, arch=arch)\n- except envi.InvalidInstruction, e:\n+ except envi.InvalidInstruction as e:\nprint 'parseOpcode error at 0x%.8x: %s' % (va,e)\ncontinue\nexcept Exception as e:\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
small err compat
|
718,765 |
16.07.2019 15:27:05
| 14,400 |
bce632a9fa9e009bca96706c770f766c5d4ab34b
|
remove (hopefully) dead comment
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/impemu/emulator.py",
"new_path": "vivisect/impemu/emulator.py",
"diff": "@@ -487,8 +487,6 @@ class WorkspaceEmulator:\ntaint = self.getVivTaint(val)\nif taint:\n- # NOTE we need to prevent infinite recursion due to args being\n- # tainted and then referencing the same api call\nva, ttype, tinfo = taint\nif ttype == 'apicall':\nop, pc, api, argv = tinfo\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
remove (hopefully) dead comment
|
718,770 |
26.07.2019 13:38:12
| 14,400 |
303b1b9e6a89093e4232aa5188efc7de63eb4507
|
bugfix: one too many strings, leading to one too many symbols, leading to one trailing crazy symbol, leading to breakage in vtrace (thanks unit tests!)
|
[
{
"change_type": "MODIFY",
"old_path": "Elf/__init__.py",
"new_path": "Elf/__init__.py",
"diff": "@@ -985,6 +985,12 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nself.dynstrtabmeta = (rva, size)\nself.dynstrtab = self.readAtRva(rva, size).split('\\0')\n+ # since our string table should certainly end in '\\0', we'll have an empty string\n+ # at the end. since this array is used to determine the number of symbols, we\n+ # need to clean it up.\n+ if len(self.dynstrtab) and not len(self.dynstrtab[-1]):\n+ self.dynstrtab.pop()\n+\ndef getDynStrtabString(self, stroff):\n'''\nReturns a string starting at stroff\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
bugfix: one too many strings, leading to one too many symbols, leading to one trailing crazy symbol, leading to breakage in vtrace (thanks unit tests!)
|
718,770 |
29.07.2019 18:22:15
| 14,400 |
5c8f67f00500b8b00bbc81b028977533233dd290
|
dramatic performance improvements, sanity checking.
|
[
{
"change_type": "MODIFY",
"old_path": "Elf/__init__.py",
"new_path": "Elf/__init__.py",
"diff": "@@ -49,13 +49,6 @@ class ElfReloc:\ndef __repr__(self):\nreturn \"reloc: @%s %d %s\" % (hex(self.r_offset), self.getType(), self.getName())\n- def __eq__(self, other):\n- if self.name != other.name:\n- return False\n- if self._vs_values != other._vs_values:\n- return False\n- return True\n-\ndef setName(self, name):\nself.name = name\n@@ -152,21 +145,6 @@ class ElfSymbol:\nreturn 1\nreturn -1\n- def __eq__(self, other):\n- if self.st_value != other.st_value:\n- return False\n- if self.st_name != other.st_name:\n- return False\n- if self.st_size != other.st_size:\n- return False\n- if self.st_info != other.st_info:\n- return False\n- if self.st_other != other.st_other:\n- return False\n- if self.st_shndx != other.st_shndx:\n- return False\n- return True\n-\ndef setName(self, name):\nself.name = name\n@@ -297,12 +275,14 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nself.secnames = {}\nself.symbols = []\nself.relocs = []\n+ self.relocvas = []\nself.symbols_by_name = {}\nself.symbols_by_addr = {}\nself.dynamics = []\nself.dynamic_symbols = []\nself.dynstrtabmeta = (None, None)\nself.dynstrtab = []\n+ self.dynsymtabct = None # populated by _parseDynStrs()\nself._parsePheaders()\nself._parseDynLinkInfo()\n@@ -311,6 +291,7 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nself._parseDynamicsFromSections()\n# load symbols and relocs from DYNAMICS\n+ self._parseDynStrs()\nself._parseDynSyms()\nself._parseDynRelocs()\n@@ -400,10 +381,26 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nif symtab is None:\nreturn\n+ ssymtabva = self.getSection('.dynsym').sh_addr\n+ dsymtabva = self.dyns.get(DT_SYMTAB)\n+ if ssymtabva != dsymtabva:\n+ logger.warn(\"Section headers and Dynamics disagree on Symbol Table: sec: 0x%x, dyn: 0x%x\",\n+ ssymtabva, dsymtabva)\n+\n+ # only parse the symbols that are not already accounted for.\n+ # symbols are ordered, so existence of index Y is always the same\nsym = self._cls_symbol(bigend=self.bigend)\n- syms = sym * (len(symtab) / len(sym))\n- vstruct.VArray(elems=syms).vsParse(symtab, fast=True)\n+ count = len(symtab) / len(sym)\n+ diff = count - len(self.dynamic_symbols)\n+ if diff == 0:\n+ return\n+\n+ offset = len(self.dynamic_symbols) * len(sym)\n+\n+ syms = sym * diff\n+ vstruct.VArray(elems=syms).vsParse(symtab[offset:], fast=True)\n+ logger.warn(\"_parseDynSymsFromSections: current_count: %d\\tdiff: %d\\toffset: %d\\t\", count, diff, offset)\nfor sym in syms:\nif not sym.st_name:\ncontinue\n@@ -427,13 +424,16 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nelse:\nraise Exception('Platform not supported: %d' % (self.bits))\ndyn.vsParse(dynbytes)\n- logger.debug(\"dynamic: %r: 0x%x\", dt_names.get(dyn.d_tag), dyn.d_value)\nif dyn.d_tag in Elf32Dynamic.has_string:\nname = self.getStrtabString(dyn.d_value, \".dynstr\")\ndyn.setName(name)\n+ # don't add a second entry\n+ if dyn not in self.dynamics:\n+ logger.debug(\"dynamic: %r: 0x%x\", dt_names.get(dyn.d_tag), dyn.d_value)\nself.dynamics.append(dyn)\n+\nif dyn.d_tag == DT_NULL: # Represents the end\nbreak\ndynbytes = dynbytes[len(dyn):]\n@@ -473,25 +473,49 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nbreak\ndynbytes = dynbytes[len(dyn):]\n- def _parseDynSyms(self):\n- '''\n- Parses the Symbol Table and sets up Dynamic String Table\n- Using Dynamics instead of ELF Sections\n- '''\n- # fyi: '.dynsym' section == DT_SYMTAB\n- # '.dynstr' section == DT_STRTAB\n-\n+ def _parseDynStrs(self):\n# setup STRTAB for string recovery:\ndynstrtab = self.dyns.get(DT_STRTAB)\nstrsz = self.dyns.get(DT_STRSZ)\n- if dynstrtab is not None and strsz is not None:\n- self.setDynStrTab(dynstrtab, strsz)\n+ if dynstrtab is None or strsz is None:\n+ logger.warn('no dynamic string tableinfo found: DT_STRTAB: %r DT_STRSZ: %r', dynstrtab, strsz)\n+\n+\n+ if self.dynstrtabmeta != (None, None):\n+ curtab = self.dynstrtabmeta[0]\n+ logger.warn('wtf? multiple dynamic string tables? old: 0x%x new: 0x%x', curtab, rva)\n+ strtabbytes = self.readAtRva(dynstrtab, strsz)\n+\n+ self.dynstrtabmeta = (dynstrtab, strsz)\n+ self.dynstrtab = strtabbytes.split('\\0')\n+ self.dynsymtabct = len(self.dynstrtab) # cheat: there is a 1-to-1 relationship between symbols and strings in these tables\n+ # if \"DT_SONAME\" is within this string table, there are no symbols to match that or thereafter:\n+ soname = self.dyns.get(DT_SONAME)\n+ if soname is not None and soname != -1 and soname < strsz:\n+ dynsymstrs = strtabbytes[:soname].split('\\0')\n+ self.dynsymtabct = len(dynsymstrs) - 1\n+\n+ # since our string table should certainly end in '\\0', we'll have an empty string\n+ # at the end. since this array is used to determine the number of symbols, we\n+ # need to clean it up.\n+ if len(self.dynstrtab) and not len(self.dynstrtab[-1]):\n+ self.dynstrtab.pop()\n+\n+ # setup names for the dynamics table entries\nfor dyn in self.dynamics:\nif dyn.d_tag in Elf32Dynamic.has_string:\nname = self.getDynStrtabString(dyn.d_value)\ndyn.setName(name)\n+ def _parseDynSyms(self):\n+ '''\n+ Parses the Symbol Table and sets up Dynamic String Table\n+ Using Dynamics instead of ELF Sections\n+ '''\n+ # fyi: '.dynsym' section == DT_SYMTAB\n+ # '.dynstr' section == DT_STRTAB\n+\n# parse Dynamic Symbol Table\nsymtabrva, symsz, symtabsz = self.getDynSymTabInfo()\nif symtabrva is None:\n@@ -572,6 +596,7 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nif sym is not None:\nreloc.setName( sym.getName() )\nself.relocs.append(reloc)\n+ self.relocvas.append(reloc.r_offset)\nlogger.info('dynamic reloc: %r', reloc)\ndef _parseSectionRelocs(self):\n@@ -582,10 +607,18 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nIgnores repeat relocs (ie. those already parsed from DYNAMICS)\n\"\"\"\n# could it ever be interesting? perhaps if dynamic relocs fail?\n+ rel, relent, relsz = self.getDynRelInfo()\n+ rela, relaent, relasz = self.getDynRelaInfo()\n+ jmprel, pltrel, pltrelsz = self.getDynPltRelInfo()\n+ dynrels = (rel, rela, jmprel)\n+\nfor sec in self.sections:\nif sec.sh_type not in (SHT_REL, SHT_RELA):\ncontinue\n+ if sec.sh_offset not in dynrels:\n+ logger.warn(\"_parseSectionRelocs: Reloc section differs from Dynamics: 0x%x\", sec.sh_offset)\n+\nreloccls = self._cls_reloc\nif sec.sh_type == SHT_RELA:\nreloccls = self._cls_reloca\n@@ -603,12 +636,13 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nsym = self.dynamic_symbols[index]\nreloc.setName( sym.getName() )\n- if reloc in self.relocs:\n+ if reloc.r_offset in self.relocvas:\nlogger.debug(\"duplicate relocation (section): %r\", reloc)\ncontinue\nlogger.info('section reloc: %r', reloc)\nself.relocs.append(reloc)\n+ self.relocvas.append(reloc.r_offset)\ndef getBaseAddress(self):\n\"\"\"\n@@ -972,25 +1006,11 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nreturn None, None, None\nsymsz = self.dyns.get(DT_SYMENT)\n- count = len(self.dynstrtab) # cheat: there is a 1-to-1 relationship between symbols and strings in these tables\n+ count = self.dynsymtabct\nsymtabsz = count * symsz\nreturn symtabva, symsz, symtabsz\n- def setDynStrTab(self, rva, size):\n- if self.dynstrtabmeta != (None, None):\n- curtab = self.dynstrtabmeta[0]\n- logger.warn('wtf? multiple dynamic string tables? old: 0x%x new: 0x%x', curtab, rva)\n-\n- self.dynstrtabmeta = (rva, size)\n- self.dynstrtab = self.readAtRva(rva, size).split('\\0')\n-\n- # since our string table should certainly end in '\\0', we'll have an empty string\n- # at the end. since this array is used to determine the number of symbols, we\n- # need to clean it up.\n- if len(self.dynstrtab) and not len(self.dynstrtab[-1]):\n- self.dynstrtab.pop()\n-\ndef getDynStrtabString(self, stroff):\n'''\nReturns a string starting at stroff\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -1753,9 +1753,9 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nand will not create one (use makeStructure).\n\"\"\"\ns = vstruct.getStructure(vstructname)\n- if s == None:\n+ if s is None:\ns = self.vsbuilder.buildVStruct(vstructname)\n- if s != None:\n+ if s is not None:\nbytes = self.readMemory(va, len(s))\ns.vsParse(bytes)\nreturn s\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -690,7 +690,6 @@ def normName(name):\n'''\nNormalize symbol names. ie. drop the @@GOBBLEDEGOOK from the end\n'''\n- return name\natidx = name.find('@@')\nif atidx > -1:\nname = name[:atidx]\n"
},
{
"change_type": "MODIFY",
"old_path": "vstruct/defs/elf.py",
"new_path": "vstruct/defs/elf.py",
"diff": "@@ -60,11 +60,31 @@ class Elf32Reloc(vstruct.VStruct):\nself.r_offset = v_ptr32(bigend=bigend)\nself.r_info = v_uint32(bigend=bigend)\n+ def __eq__(self, other):\n+ if self.name != other.name:\n+ return False\n+ if self.r_offset != other.r_offset:\n+ return False\n+ if self.r_info != other.r_info:\n+ return False\n+ return True\n+\nclass Elf32Reloca(Elf32Reloc):\ndef __init__(self, bigend=False):\nElf32Reloc.__init__(self)\nself.r_addend = v_uint32(bigend=bigend)\n+ def __eq__(self, other):\n+ if self.name != other.name:\n+ return False\n+ if self.r_offset != other.r_offset:\n+ return False\n+ if self.r_info != other.r_info:\n+ return False\n+ if self.r_addend != other.r_addend:\n+ return False\n+ return True\n+\nclass Elf32Symbol(vstruct.VStruct):\ndef __init__(self, bigend=False):\nvstruct.VStruct.__init__(self)\n@@ -75,12 +95,33 @@ class Elf32Symbol(vstruct.VStruct):\nself.st_other = v_uint8()\nself.st_shndx = v_uint16(bigend=bigend)\n+ def __eq__(self, other):\n+ if self.st_value != other.st_value:\n+ return False\n+ if self.st_name != other.st_name:\n+ return False\n+ if self.st_size != other.st_size:\n+ return False\n+ if self.st_info != other.st_info:\n+ return False\n+ if self.st_other != other.st_other:\n+ return False\n+ if self.st_shndx != other.st_shndx:\n+ return False\n+ return True\n+\nclass Elf32Dynamic(vstruct.VStruct):\ndef __init__(self, bigend=False):\nvstruct.VStruct.__init__(self)\nself.d_tag = v_uint32(bigend=bigend)\nself.d_value = v_uint32(bigend=bigend)\n+ def __eq__(self, other):\n+ if self.d_tag != other.d_tag:\n+ return False\n+ if self.d_value != other.d_value:\n+ return False\n+ return True\nclass Elf64(vstruct.VStruct):\ndef __init__(self, bigend=False):\n@@ -139,6 +180,15 @@ class Elf64Reloc(vstruct.VStruct):\nself.r_offset = v_ptr64(bigend=bigend)\nself.r_info = v_uint64(bigend=bigend)\n+ def __eq__(self, other):\n+ if self.name != other.name:\n+ return False\n+ if self.r_offset != other.r_offset:\n+ return False\n+ if self.r_info != other.r_info:\n+ return False\n+ return True\n+\nclass Elf64Reloca(Elf64Reloc):\ndef __init__(self, bigend=False):\n#Elf64Reloc.__init__(self)\n@@ -147,6 +197,17 @@ class Elf64Reloca(Elf64Reloc):\nself.r_info = v_uint64(bigend=bigend)\nself.r_addend = v_uint64(bigend=bigend)\n+ def __eq__(self, other):\n+ if self.name != other.name:\n+ return False\n+ if self.r_offset != other.r_offset:\n+ return False\n+ if self.r_info != other.r_info:\n+ return False\n+ if self.r_addend != other.r_addend:\n+ return False\n+ return True\n+\nclass Elf64Symbol(vstruct.VStruct):\ndef __init__(self, bigend=False):\nvstruct.VStruct.__init__(self)\n@@ -157,6 +218,21 @@ class Elf64Symbol(vstruct.VStruct):\nself.st_value = v_uint64(bigend=bigend)\nself.st_size = v_uint64(bigend=bigend)\n+ def __eq__(self, other):\n+ if self.st_value != other.st_value:\n+ return False\n+ if self.st_name != other.st_name:\n+ return False\n+ if self.st_size != other.st_size:\n+ return False\n+ if self.st_info != other.st_info:\n+ return False\n+ if self.st_other != other.st_other:\n+ return False\n+ if self.st_shndx != other.st_shndx:\n+ return False\n+ return True\n+\nclass Elf64Dynamic(Elf32Dynamic):\ndef __init__(self, bigend=False):\nvstruct.VStruct.__init__(self)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
dramatic performance improvements, sanity checking.
|
718,770 |
29.07.2019 18:26:20
| 14,400 |
deaa52e5404c344414fc9d6bd88278d071ec2684
|
logging and is/not None cleanup
|
[
{
"change_type": "MODIFY",
"old_path": "Elf/__init__.py",
"new_path": "Elf/__init__.py",
"diff": "@@ -284,21 +284,32 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nself.dynstrtab = []\nself.dynsymtabct = None # populated by _parseDynStrs()\n+ logger.info('self._parsePheaders')\nself._parsePheaders()\n- self._parseDynLinkInfo()\n+ logger.info('self._parseDynLinkInfo')\n+ self._parseDynLinkInfo() # FIXME: should we parse string info early and have string info available for other _parse sections?\n+ logger.info('self._parseDynLinkInfo')\nself._parseSections()\n+ logger.info('self._parseDynamicsFromSections')\nself._parseDynamicsFromSections()\n# load symbols and relocs from DYNAMICS\n+ logger.info('self._parseDynStrs')\nself._parseDynStrs()\n+ logger.info('self._parseDynSyms')\nself._parseDynSyms()\n+ logger.info('self._parseDynRelocs')\nself._parseDynRelocs()\n# load symbols and relocs from SECTIONS\n+ logger.info('self._parseDynSymsFromSections')\nself._parseDynSymsFromSections()\n+ logger.info('self._parseSectionSymbols')\nself._parseSectionSymbols()\n+ logger.info('self._parseSectionRelocs')\nself._parseSectionRelocs()\n+ logger.info('done parsing ELF')\ndef getRelocTypeName(self, rtype):\n'''\n@@ -461,7 +472,7 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\n# dump the tag/value pairs into the \"dyns\" dictionary. if multiples, create a tuple\ncurdyn = self.dyns.get(dyn.d_tag)\n- if curdyn != None:\n+ if curdyn is not None:\nself.dyns[dyn.d_tag] = (curdyn, dyn.d_value)\nelse:\nself.dyns[dyn.d_tag] = dyn.d_value\n@@ -562,17 +573,17 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\n* JMPREL\n\"\"\"\nrel, relent, relsz = self.getDynRelInfo()\n- if rel != None:\n+ if rel is not None:\ncls = self._cls_reloc\nself._doDynRelocs(rel, relsz, cls)\nrela, relaent, relasz = self.getDynRelaInfo()\n- if rela != None:\n+ if rela is not None:\ncls = self._cls_reloca\nself._doDynRelocs(rela, relasz, cls)\njmprel, pltrel, pltrelsz = self.getDynPltRelInfo()\n- if jmprel != None:\n+ if jmprel is not None:\ncls = (self._cls_reloc, self._cls_reloca)[pltrel==DT_RELA]\nself._doDynRelocs(jmprel, pltrelsz, cls)\n@@ -580,7 +591,7 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nsyms = self.getDynSyms()\nsymslen = len(syms)\n- if cls == None:\n+ if cls is None:\ncls = self._cls_reloc\nreloc = cls(bigend=self.bigend)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
logging and is/not None cleanup
|
718,770 |
29.07.2019 19:05:04
| 14,400 |
c67df26f586507b0341b852fa94e057e253a4930
|
bugfix: dynstrtab analysis for static-linked files.
|
[
{
"change_type": "MODIFY",
"old_path": "Elf/__init__.py",
"new_path": "Elf/__init__.py",
"diff": "@@ -490,7 +490,7 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nstrsz = self.dyns.get(DT_STRSZ)\nif dynstrtab is None or strsz is None:\nlogger.warn('no dynamic string tableinfo found: DT_STRTAB: %r DT_STRSZ: %r', dynstrtab, strsz)\n-\n+ return\nif self.dynstrtabmeta != (None, None):\ncurtab = self.dynstrtabmeta[0]\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
bugfix: dynstrtab analysis for static-linked files.
|
718,770 |
31.07.2019 03:13:48
| 14,400 |
9275863a5c79779ac81a2df43dba37854031bbe6
|
updates to unit tests and _parseDynSyms2()
|
[
{
"change_type": "MODIFY",
"old_path": "Elf/__init__.py",
"new_path": "Elf/__init__.py",
"diff": "@@ -299,6 +299,7 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nself._parseDynStrs()\n#logger.info('self._parseDynSyms') # DEPRECATED: autoparsing by Relocs\n#self._parseDynSyms()\n+ self._parseDynSyms2()\nlogger.info('self._parseDynRelocs')\nself._parseDynRelocs()\n@@ -540,6 +541,37 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nsym.setName(name)\nself.dynamic_symbols.append(sym)\n+ def _parseDynSyms2(self):\n+ symtabrva, symsz, symtabsz = self.getDynSymTabInfo()\n+ if symtabrva is None:\n+ return\n+\n+ #for dsoff in xrange(0, symtabsz, symsz):\n+ dsoff = 0\n+ while True:\n+ syment = self.readAtRva(symtabrva + dsoff, symsz)\n+ sym = self._cls_symbol(bigend=self.bigend)\n+ sym.vsParse(syment)\n+ #print sym.tree()\n+ if sym.st_info & 0xf not in st_info_type:\n+ break\n+\n+ if sym.st_info >> 4 not in st_info_bind:\n+ break\n+\n+ name = self.getDynStrtabString(sym.st_name)\n+ #print name\n+ if name is None:\n+ break\n+\n+ sym.setName(name)\n+ #self.dynamic_symbols.append(sym)\n+\n+ dsoff += symsz\n+ #if dsoff % (symsz*100) == 0:\n+ # raw_input()\n+\n+\n# FIXME: wrap in VERDEF and SYMINFO into the analysis.\n@@ -1033,6 +1065,8 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\ndynstrtabva, strsz = self.dynstrtabmeta\nstrings = self.readAtRva(dynstrtabva, strsz)\nstrend = strings.find('\\0', stroff)\n+ if stroff > len(strings):\n+ return None\nreturn strings[stroff:strend]\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/linux_amd64_chown_data.py",
"new_path": "vivisect/tests/linux_amd64_chown_data.py",
"diff": "@@ -104,6 +104,7 @@ chown_data = {\n(0x22100a8, 1, u'__progname_full', 'chown'),\n(0x22100a8, 1, u'program_invocation_name', 'chown'),\n(0x22100c0, 1, u'stderr', 'chown'),\n+ (0x22100f8, 1, u'program_name', 'chown'),\n],\n'relocs' : [\n@@ -518,6 +519,7 @@ chown_data = {\n(0x22100a0, u'chown.optarg'),\n(0x22100a8, u'chown.__progname_full'),\n(0x22100c0, u'chown.stderr'),\n+ (0x22100f8, u'chown.program_name'),\n],\n'pltgot' : [\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/testelf.py",
"new_path": "vivisect/tests/testelf.py",
"diff": "@@ -4,6 +4,9 @@ import unittest\nimport Elf\nimport vivisect.cli as viv_cli\nimport vivisect.tests.helpers as helpers\n+import vivisect.analysis.elf.elfplt as vaeep\n+import vivisect.analysis.generic.pointers as vagp\n+\nfrom vivisect.tests import linux_amd64_ls_data\nfrom vivisect.tests import linux_amd64_chown_data\nfrom vivisect.tests import linux_amd64_libc_2_27_data\n@@ -42,7 +45,9 @@ class ELFTests(unittest.TestCase):\ne = Elf.Elf(file(fn))\nvw = viv_cli.VivCli()\nvw.loadFromFile(fn)\n- vw.analyze()\n+ #vw.analyze()\n+ vaeep.analyze(vw)\n+ vagp.analyze(vw)\ncls.tests.append((name, test_data, fn, e, vw))\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
updates to unit tests and _parseDynSyms2()
|
718,770 |
31.07.2019 03:16:17
| 14,400 |
2ae0857c3edfc4c953d2978f03ddb4f769637ac1
|
more unit test updates.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/linux_amd64_libstdc_data.py",
"new_path": "vivisect/tests/linux_amd64_libstdc_data.py",
"diff": "@@ -3795,6 +3795,7 @@ libstdc_data = {\n(0x20fc080, 0, u'std::basic_istream<char, std::char_traits<char> >& std::operator>><std::char_traits<char> >(std::basic_istream<char, std::char_traits<char> >&, unsigned char*)', 'libstdc___so_6_0'),\n(0x20fc090, 0, u'std::basic_istream<char, std::char_traits<char> >& std::operator>><std::char_traits<char> >(std::basic_istream<char, std::char_traits<char> >&, signed char*)', 'libstdc___so_6_0'),\n(0x20fc0a0, 0, u'std::basic_istream<char, std::char_traits<char> >& std::operator>><char, std::char_traits<char> >(std::basic_istream<char, std::char_traits<char> >&, std::_Setfill<char>)', 'libstdc___so_6_0'),\n+ (0x20fc130, 0, u'std::basic_istream<char, std::char_traits<char> >& std::operator>><char, std::char_traits<char> >(std::basic_istream<char, std::char_traits<char> >&, std::_Setiosflags)', 'libstdc___so_6_0'),\n(0x20fc150, 0, u'std::basic_istream<char, std::char_traits<char> >& std::operator>><char, std::char_traits<char> >(std::basic_istream<char, std::char_traits<char> >&, std::_Resetiosflags)', 'libstdc___so_6_0'),\n(0x20fc170, 0, u'std::basic_istream<char, std::char_traits<char> >& std::operator>><char, std::char_traits<char> >(std::basic_istream<char, std::char_traits<char> >&, std::_Setbase)', 'libstdc___so_6_0'),\n(0x20fc1c0, 0, u'std::basic_istream<char, std::char_traits<char> >& std::operator>><char, std::char_traits<char> >(std::basic_istream<char, std::char_traits<char> >&, std::_Setprecision)', 'libstdc___so_6_0'),\n@@ -5973,6 +5974,7 @@ libstdc_data = {\n(0x21407b0, 1, u'std::placeholders::_14', 'libstdc___so_6_0'),\n(0x21407b1, 1, u'std::placeholders::_13', 'libstdc___so_6_0'),\n(0x21407b2, 1, u'std::placeholders::_12', 'libstdc___so_6_0'),\n+ (0x21407b3, 1, u'std::placeholders::_11', 'libstdc___so_6_0'),\n(0x21407b4, 1, u'std::placeholders::_10', 'libstdc___so_6_0'),\n(0x21407b5, 1, u'std::placeholders::_9', 'libstdc___so_6_0'),\n(0x21407b6, 1, u'std::placeholders::_8', 'libstdc___so_6_0'),\n@@ -15723,6 +15725,7 @@ libstdc_data = {\n(0x20fc080, u'libstdc___so_6_0.std::basic_istream<char, std::char_traits<char> >& std::operator>><std::char_traits<char> >(std::basic_istream<char, std::char_traits<char> >&, unsigned char*)'),\n(0x20fc090, u'libstdc___so_6_0.std::basic_istream<char, std::char_traits<char> >& std::operator>><std::char_traits<char> >(std::basic_istream<char, std::char_traits<char> >&, signed char*)'),\n(0x20fc0a0, u'libstdc___so_6_0.std::basic_istream<char, std::char_traits<char> >& std::operator>><char, std::char_traits<char> >(std::basic_istream<char, std::char_traits<char> >&, std::_Setfill<char>)'),\n+ (0x20fc130, u'libstdc___so_6_0.std::basic_istream<char, std::char_traits<char> >& std::operator>><char, std::char_traits<char> >(std::basic_istream<char, std::char_traits<char> >&, std::_Setiosflags)'),\n(0x20fc150, u'libstdc___so_6_0.std::basic_istream<char, std::char_traits<char> >& std::operator>><char, std::char_traits<char> >(std::basic_istream<char, std::char_traits<char> >&, std::_Resetiosflags)'),\n(0x20fc170, u'libstdc___so_6_0.std::basic_istream<char, std::char_traits<char> >& std::operator>><char, std::char_traits<char> >(std::basic_istream<char, std::char_traits<char> >&, std::_Setbase)'),\n(0x20fc1c0, u'libstdc___so_6_0.std::basic_istream<char, std::char_traits<char> >& std::operator>><char, std::char_traits<char> >(std::basic_istream<char, std::char_traits<char> >&, std::_Setprecision)'),\n@@ -17974,6 +17977,7 @@ libstdc_data = {\n(0x21407b0, u'libstdc___so_6_0.std::placeholders::_14'),\n(0x21407b1, u'libstdc___so_6_0.std::placeholders::_13'),\n(0x21407b2, u'libstdc___so_6_0.std::placeholders::_12'),\n+ (0x21407b3, u'libstdc___so_6_0.std::placeholders::_11'),\n(0x21407b4, u'libstdc___so_6_0.std::placeholders::_10'),\n(0x21407b5, u'libstdc___so_6_0.std::placeholders::_9'),\n(0x21407b6, u'libstdc___so_6_0.std::placeholders::_8'),\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/linux_i386_libstdc_data.py",
"new_path": "vivisect/tests/linux_i386_libstdc_data.py",
"diff": "@@ -5936,6 +5936,7 @@ libstdc_data = {\n(0x2130578, 1, u'std::__numeric_limits_base::min_exponent10', 'libstdc___so_6_0'),\n(0x213057c, 1, u'std::__numeric_limits_base::min_exponent', 'libstdc___so_6_0'),\n(0x2130580, 1, u'std::__numeric_limits_base::radix', 'libstdc___so_6_0'),\n+ (0x2130584, 1, u'std::__numeric_limits_base::is_exact', 'libstdc___so_6_0'),\n(0x2130585, 1, u'std::__numeric_limits_base::is_integer', 'libstdc___so_6_0'),\n(0x2130586, 1, u'std::__numeric_limits_base::is_signed', 'libstdc___so_6_0'),\n(0x2130588, 1, u'std::__numeric_limits_base::max_digits10', 'libstdc___so_6_0'),\n@@ -17936,6 +17937,7 @@ libstdc_data = {\n(0x2130578, u'libstdc___so_6_0.std::__numeric_limits_base::min_exponent10'),\n(0x213057c, u'libstdc___so_6_0.std::__numeric_limits_base::min_exponent'),\n(0x2130580, u'libstdc___so_6_0.std::__numeric_limits_base::radix'),\n+ (0x2130584, u'libstdc___so_6_0.std::__numeric_limits_base::is_exact'),\n(0x2130585, u'libstdc___so_6_0.std::__numeric_limits_base::is_integer'),\n(0x2130586, u'libstdc___so_6_0.std::__numeric_limits_base::is_signed'),\n(0x2130588, u'libstdc___so_6_0.std::__numeric_limits_base::max_digits10'),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
more unit test updates.
|
718,770 |
31.07.2019 03:21:15
| 14,400 |
94f9d1f2034c92fca8483f7383310e072f984ac3
|
bugfix: pointers
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/generic/pointers.py",
"new_path": "vivisect/analysis/generic/pointers.py",
"diff": "@@ -77,4 +77,4 @@ def analyze(vw):\ntgtname = vw.getName(tgt)\nif tgtname is not None:\nlogger.info(' name(0x%x): %r', tgt, tgtname)\n- vw.makeName('ptr_%s_%.8x' % (tgtname, ptr))\n+ vw.makeName(ptr, 'ptr_%s_%.8x' % (tgtname, ptr))\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
bugfix: pointers
|
718,770 |
31.07.2019 03:35:02
| 14,400 |
cb9594b0d6810c4e78d4abc9cc800b0a428603e8
|
ARM doesn't currently decode very well... unit tests cannot succeed. reverting.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/testelf.py",
"new_path": "vivisect/tests/testelf.py",
"diff": "@@ -45,9 +45,9 @@ class ELFTests(unittest.TestCase):\ne = Elf.Elf(file(fn))\nvw = viv_cli.VivCli()\nvw.loadFromFile(fn)\n- #vw.analyze()\n- vaeep.analyze(vw)\n- vagp.analyze(vw)\n+ vw.analyze()\n+ #vaeep.analyze(vw)\n+ #vagp.analyze(vw)\ncls.tests.append((name, test_data, fn, e, vw))\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
ARM doesn't currently decode very well... unit tests cannot succeed. reverting.
|
718,770 |
31.07.2019 05:11:35
| 14,400 |
f2a7b44adada122e557b710e8037c557422789f3
|
manual mods to unit test? not sure why but my local output differs from travis for cxxfilt demangling on ~failure()
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/linux_amd64_libstdc_data.py",
"new_path": "vivisect/tests/linux_amd64_libstdc_data.py",
"diff": "@@ -27,7 +27,8 @@ libstdc_data = {\n(0x2381040, 8, 9, u'*.vtable for std::underflow_error'),\n(0x2381048, 8, 9, u'*.std::bad_function_call::~bad_function_call()'),\n(0x2381050, 8, 9, u'*.typeinfo for std::ctype<wchar_t>'),\n- (0x2381058, 8, 9, u'*.std::ios_base::failure[abi:cxx11]::~failure()'),\n+ #(0x2381058, 8, 9, u'*.std::ios_base::failure[abi:cxx11]::~failure()'),\n+ (0x2381058, 8, 9, u'*.std::ios_base::failure[abi:cxx11]::~cxx11()'),\n(0x2381060, 8, 9, u'*.__cxxabiv1::__pbase_type_info::__pointer_catch(__cxxabiv1::__pbase_type_info const*, void**, unsigned int) const'),\n(0x2381068, 8, 9, u'*.vtable for std::time_put<wchar_t, std::ostreambuf_iterator<wchar_t, std::char_traits<wchar_t> > >'),\n(0x2381070, 8, 9, u'*.typeinfo for std::future_error'),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
manual mods to unit test? not sure why but my local output differs from travis for cxxfilt demangling on ~failure()
|
718,770 |
31.07.2019 10:41:31
| 14,400 |
e6cc9bc8dea6c1fc55497efb67b3e1c96e0e27ec
|
adjusting for travis? this is awful.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/linux_amd64_libstdc_data.py",
"new_path": "vivisect/tests/linux_amd64_libstdc_data.py",
"diff": "@@ -19980,7 +19980,8 @@ libstdc_data = {\n(0x2382fb8, u'*.std::istream::get(std::basic_streambuf<char, std::char_traits<char> >&, char)_02382fb8'),\n(0x2382fc0, u'*.__cxa_end_catch_02382fc0'),\n(0x2382fc8, u'*.std::codecvt<wchar_t, char, __mbstate_t>::~codecvt()_02382fc8'),\n- (0x2382fd0, u'*.std::ios_base::failure[abi:cxx11]::failure(char const*, std::error_code const&)_02382fd0'),\n+ #(0x2382fd0, u'*.std::ios_base::failure[abi:cxx11]::failure(char const*, std::error_code const&)_02382fd0'),\n+ (0x2382fd0, u'*.std::ios_base::failure[abi:cxx11]::cxx11(char const*, std::error_code const&)_02382fd0'),\n(0x2382fd8, u'*.__cxa_guard_acquire_02382fd8'),\n(0x2382fe0, u'*.std::basic_filebuf<char, std::char_traits<char> >::open(char const*, std::_Ios_Openmode)_02382fe0'),\n(0x2382fe8, u'*.memmove_02382fe8'),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
adjusting for travis? this is awful.
|
718,770 |
31.07.2019 13:34:21
| 14,400 |
2db28199fea72db12772feac0d1ff636b490859b
|
found cxxfilt bug:
updating travis.yml to use bionic instead of trusty
|
[
{
"change_type": "MODIFY",
"old_path": ".travis.yml",
"new_path": ".travis.yml",
"diff": "@@ -5,7 +5,7 @@ env:\n- VIVTESTFILES=/tmp/vivtestfiles\nsudo: required\n-dist: trusty\n+dist: bionic\nlanguage: python\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/linux_amd64_libstdc_data.py",
"new_path": "vivisect/tests/linux_amd64_libstdc_data.py",
"diff": "@@ -27,8 +27,7 @@ libstdc_data = {\n(0x2381040, 8, 9, u'*.vtable for std::underflow_error'),\n(0x2381048, 8, 9, u'*.std::bad_function_call::~bad_function_call()'),\n(0x2381050, 8, 9, u'*.typeinfo for std::ctype<wchar_t>'),\n- #(0x2381058, 8, 9, u'*.std::ios_base::failure[abi:cxx11]::~failure()'),\n- (0x2381058, 8, 9, u'*.std::ios_base::failure[abi:cxx11]::~cxx11()'),\n+ (0x2381058, 8, 9, u'*.std::ios_base::failure[abi:cxx11]::~failure()'),\n(0x2381060, 8, 9, u'*.__cxxabiv1::__pbase_type_info::__pointer_catch(__cxxabiv1::__pbase_type_info const*, void**, unsigned int) const'),\n(0x2381068, 8, 9, u'*.vtable for std::time_put<wchar_t, std::ostreambuf_iterator<wchar_t, std::char_traits<wchar_t> > >'),\n(0x2381070, 8, 9, u'*.typeinfo for std::future_error'),\n@@ -19980,8 +19979,7 @@ libstdc_data = {\n(0x2382fb8, u'*.std::istream::get(std::basic_streambuf<char, std::char_traits<char> >&, char)_02382fb8'),\n(0x2382fc0, u'*.__cxa_end_catch_02382fc0'),\n(0x2382fc8, u'*.std::codecvt<wchar_t, char, __mbstate_t>::~codecvt()_02382fc8'),\n- #(0x2382fd0, u'*.std::ios_base::failure[abi:cxx11]::failure(char const*, std::error_code const&)_02382fd0'),\n- (0x2382fd0, u'*.std::ios_base::failure[abi:cxx11]::cxx11(char const*, std::error_code const&)_02382fd0'),\n+ (0x2382fd0, u'*.std::ios_base::failure[abi:cxx11]::failure(char const*, std::error_code const&)_02382fd0'),\n(0x2382fd8, u'*.__cxa_guard_acquire_02382fd8'),\n(0x2382fe0, u'*.std::basic_filebuf<char, std::char_traits<char> >::open(char const*, std::_Ios_Openmode)_02382fe0'),\n(0x2382fe8, u'*.memmove_02382fe8'),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
found cxxfilt bug: https://gcc.gnu.org/ml/gcc-patches/2015-08/msg00847.html
updating travis.yml to use bionic instead of trusty
|
718,770 |
31.07.2019 16:36:53
| 14,400 |
695c46327ebaf454fe934b33331c0cc31eb4c2d2
|
improvement: getBranches() instead of indexed operands for the branch
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/elfplt.py",
"new_path": "vivisect/analysis/elf/elfplt.py",
"diff": "@@ -65,8 +65,15 @@ def analyzeFunction(vw, funcva):\nemu = vw.getEmulator()\nemu.setRegister(e_i386.REG_EBX, gotplt) # every emulator will have a 4th register, and if it's not used, no harm done.\n# FIXME: should we use op.getBranches(emu)?\n- oper0 = op.opers[0]\n- opval = oper0.getOperAddr(op, emu)\n+ branches = op.getBranches(emu)\n+ if len(branches) != 1:\n+ logger.warn('getBranches() returns anomolous results: 0x%x: %r (result: %r)',\n+ op.va, op, branches)\n+ return\n+\n+ opval, brflags = branches[0]\n+ #oper0 = op.opers[0]\n+ #opval = oper0.getOperAddr(op, emu)\nloctup = vw.getLocation(opval)\nfname = vw.getName(opval)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
improvement: getBranches() instead of indexed operands for the branch
|
718,770 |
02.08.2019 15:14:54
| 14,400 |
83d6dda337c010f9bd567c84939ec9ad3408a3b2
|
convert individual init/fini/preinit_array parsing to use new makeFunctionTable() and cleanup
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -14,8 +14,6 @@ from cStringIO import StringIO\nlogger = logging.getLogger(__name__)\n-# FIXME: TODO: Reorder, so that Dynamics Data is applied first... with optional ELF Section data afterwards (default to apply if not already there)\n-# FIXME: we're causing Functions and Code to happen... *before* any analysis modules are put into place.\ndef parseFile(vw, filename, baseaddr=None):\nfd = file(filename, 'rb')\n@@ -222,62 +220,51 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nif addbase: sva += baseaddr\nvw.addSegment(sva, size, sname, fname)\n- # FIXME: since getFile is based on segments, and some Elfs don't reach this...\n- # should we instead include ProgramHeaders?\n+\n+ # since getFileByVa is based on segments, and ELF Sections seldom cover all the\n+ # loadable memory space.... we'll add PT_LOAD Program Headers, only at the\n+ # end. If we add them first, they're always the matching segments. At the\n+ # end, they make more of a default segment\n+ pcount = 0\n+ if vw.getFileByVa(baseaddr) is None:\n+ for phdr in elf.getPheaders():\n+ if phdr.p_type != Elf.PT_LOAD:\n+ continue\n+\n+ sva = phdr.p_vaddr\n+ if addbase: sva += baseaddr\n+\n+ vw.addSegment(pva, phdr.p_memsz, 'PHDR%d' % pcount, fname)\n# load information from dynamics:\nf_init = elf.dyns.get(Elf.DT_INIT)\n- if f_init != None:\n+ if f_init is not None:\nif addbase:\nf_init += baseaddr\nvw.makeName(f_init, \"init_function\", filelocal=True)\nvw.addEntryPoint(f_init)\nf_fini = elf.dyns.get(Elf.DT_FINI)\n- if f_fini != None:\n+ if f_fini is not None:\nif addbase:\nf_fini += baseaddr\nvw.makeName(f_fini, \"fini_function\", filelocal=True)\nvw.addEntryPoint(f_fini)\nf_inita = elf.dyns.get(Elf.DT_INIT_ARRAY)\n- if f_inita != None:\n+ if f_inita is not None:\nf_initasz = elf.dyns.get(Elf.DT_INIT_ARRAYSZ)\n- if addbase:\n- f_inita += baseaddr\n- for off in range(0, f_initasz, vw.psize):\n- iava = f_inita + off\n- fva = vw.readMemValue(iava, vw.psize)\n- if addbase:\n- fva += baseaddr\n- vw.makeName(fva, \"init_array_%d\" % off, filelocal=True)\n- vw.addEntryPoint(fva)\n+ makeFunctionTable(elf, vw, f_inita, f_initasz, 'init_array', new_functions, new_pointers, baseaddr, addbase)\nf_finia = elf.dyns.get(Elf.DT_FINI_ARRAY)\n- if f_finia != None:\n+ if f_finia is not None:\nf_finiasz = elf.dyns.get(Elf.DT_FINI_ARRAYSZ)\n- if addbase:\n- f_finia += baseaddr\n- for off in range(0, f_finiasz, vw.psize):\n- fava = f_finia + off\n- fva = vw.readMemValue(fava, vw.psize)\n- if addbase:\n- fva += baseaddr\n- vw.makeName(fva, \"fini_array_%d\" % off, filelocal=True)\n- vw.addEntryPoint(fva)\n+ makeFunctionTable(elf, vw, f_finia, f_finiasz, 'fini_array', new_functions, new_pointers, baseaddr, addbase)\nf_preinita = elf.dyns.get(Elf.DT_PREINIT_ARRAY)\n- if f_preinita != None:\n+ if f_preinita is not None:\nf_preinitasz = elf.dyns.get(Elf.DT_PREINIT_ARRAY)\n- if addbase:\n- f_preinita += baseaddr\n- for off in range(0, f_preinitasz, vw.psize):\n- piava = f_preinita + off\n- fva = vw.readMemValue(piava, vw.psize)\n- if addbase:\n- fva += baseaddr\n- vw.makeName(fva, \"preinit_array_%d\" % off, filelocal=True)\n- vw.addEntryPoint(fva)\n+ makeFunctionTable(elf, vw, f_preinita, f_preinitasz, 'preinit_array', new_functions, new_pointers, baseaddr, addbase)\n# dynamic table\nphdr = elf.getDynPHdr() # file offset?\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
convert individual init/fini/preinit_array parsing to use new makeFunctionTable() and cleanup
|
718,770 |
28.08.2019 00:21:03
| 14,400 |
96d9dbb7cca050070d804724aadd3fb539120e7a
|
ARM bug which is likely fixed in the atlas_arm_fixes branch
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -1367,7 +1367,7 @@ class ArmOpcode(envi.Opcode):\nif operval & 3:\nflags |= envi.ARCH_THUMB16\nelse:\n- flags |= envi.ARCH_ARM\n+ flags |= envi.ARCH_ARMV7\n# if we don't know that it's thumb, default to \"ARCH_DEFAULT\"\nelse:\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
ARM bug which is likely fixed in the atlas_arm_fixes branch
|
718,770 |
28.08.2019 17:39:23
| 14,400 |
3d695d259cb000c91f07737676dc7bd6a78857bd
|
cleanups and mods based on feedback from
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/elfplt.py",
"new_path": "vivisect/analysis/elf/elfplt.py",
"diff": "@@ -14,16 +14,29 @@ logger = logging.getLogger(__name__)\ndef analyze(vw):\n\"\"\"\nDo simple linear disassembly of the .plt section if present.\n+ Make functions\n\"\"\"\nfor sva, ssize, sname, sfname in vw.getSegments():\nif sname not in (\".plt\", \".plt.got\"):\ncontinue\n- nextva = sva + ssize\n- while sva < nextva:\n- vw.makeCode(sva)\n+ nextseg = sva + ssize\n+ while sva < nextseg:\n+ if vw.getLocation(sva) is None:\n+ vw.makeFunction(sva)\n+ try:\n+ analyzeFunction(vw, sva)\n+ except Exception as e:\n+ logger.warn('0x%x: %r', sva, e)\n+\nltup = vw.getLocation(sva)\n+\n+ if ltup is not None:\nsva += ltup[vivisect.L_SIZE]\n+ else:\n+ logger.warn('makeFunction(0x%x) failed to make a location (probably failed instruction decode)! incrementing instruction pointer by 1 to continue PLT analysis <fingers crossed>', sva)\n+ sva += 1 # FIXME: add architectural \"PLT_INSTRUCTION_INCREMENT\" or something like it\n+\nMAX_OPS = 10\n@@ -64,7 +77,7 @@ def analyzeFunction(vw, funcva):\n# all architectures should at least have some minimal emulator\nemu = vw.getEmulator()\nemu.setRegister(e_i386.REG_EBX, gotplt) # every emulator will have a 4th register, and if it's not used, no harm done.\n- # FIXME: should we use op.getBranches(emu)?\n+\nbranches = op.getBranches(emu)\nif len(branches) != 1:\nlogger.warn('getBranches() returns anomolous results: 0x%x: %r (result: %r)',\n@@ -86,8 +99,8 @@ def analyzeFunction(vw, funcva):\nlogger.warn(\"0x%x: (0x%x) %r != %r (%r)\" % (funcva, opval, loctup[vivisect.L_LTYPE], vivisect.LOC_IMPORT, fname))\nreturn\n- if fname.endswith('_%.8x' % opval):\n+ if fname is not None and fname.endswith('_%.8x' % opval):\nfname = fname[:-9]\n- #vw.makeName(funcva, \"plt_%s\" % fname, filelocal=True)\n+\nvw.makeFunctionThunk(funcva, \"plt_\" + fname)\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/libc_start_main.py",
"new_path": "vivisect/analysis/elf/libc_start_main.py",
"diff": "@@ -70,7 +70,6 @@ class AnalysisMonitor(viv_imp_monitor.AnalysisMonitor):\nself.startmain = va\ndef prehook(self, emu, op, starteip):\n- viv_imp_monitor.AnalysisMonitor.prehook(self, emu, op, starteip)\nif op.iflags & envi.IF_CALL:\n# it's a call, get the target\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/generic/pointers.py",
"new_path": "vivisect/analysis/generic/pointers.py",
"diff": "@@ -16,7 +16,7 @@ def analyze(vw):\ndone = []\n- # Let's analyze and Relocations we know are pointers\n+ # Let's analyze Relocations we know are pointers\nfor rva, rtype in vw.reloc_by_va.items():\nif rtype != RTYPE_BASEPTR:\ncontinue\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -85,12 +85,14 @@ def makeFunctionTable(elf, vw, tbladdr, size, tblname, funcs, ptrs, baseaddr=0,\nfmtgrps = e_bits.fmt_chars[vw.getEndian()]\npfmt = fmtgrps[psize]\nsecbytes = elf.readAtRva(tbladdr, size)\n- if addbase: tbladdr += baseaddr\n+ if addbase:\n+ tbladdr += baseaddr\nptr_count = 0\nfor off in range(0, size, psize):\naddr, = struct.unpack_from(pfmt, secbytes, off)\n- if addbase: addr += baseaddr\n+ if addbase:\n+ addr += baseaddr\nnstub = tblname + \"_%d\"\npname = nstub % ptr_count\n@@ -217,7 +219,8 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\ncontinue # Skip non-memory mapped sections\nsva = sec.sh_addr\n- if addbase: sva += baseaddr\n+ if addbase:\n+ sva += baseaddr\nvw.addSegment(sva, size, sname, fname)\n@@ -232,9 +235,11 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\ncontinue\nsva = phdr.p_vaddr\n- if addbase: sva += baseaddr\n+ if addbase:\n+ sva += baseaddr\n- vw.addSegment(pva, phdr.p_memsz, 'PHDR%d' % pcount, fname)\n+ vw.addSegment(sva, phdr.p_memsz, 'PHDR%d' % pcount, fname)\n+ pcount += 1\n# load information from dynamics:\nf_init = elf.dyns.get(Elf.DT_INIT)\n@@ -270,22 +275,25 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nphdr = elf.getDynPHdr() # file offset?\nif phdr is not None:\nsva, size = phdr.p_vaddr, phdr.p_memsz\n- if addbase: sva += baseaddr # getDynInfo returns (offset, filesz)\n+ if addbase:\n+ sva += baseaddr # getDynInfo returns (offset, filesz)\nmakeDynamicTable(vw, sva, sva+size)\n# if there's no Dynamics PHDR, don't bother trying to parse it from Sections. It doesn't exist.\n# dynstr table\nsva, size = elf.getDynStrTabInfo()\nif sva is not None:\n- if addbase: sva += baseaddr\n+ if addbase:\n+ sva += baseaddr\nmakeStringTable(vw, sva, sva+size)\n# dynsyms table\nsva, symsz, size = elf.getDynSymTabInfo()\nif sva is not None:\n- if addbase: sva += baseaddr\n+ if addbase:\n+ sva += baseaddr\nfor s in makeSymbolTable(vw, sva, sva+size):\n- pass\n+ logger.info(\"######################## .dynsym %r\",s)\n# Now trigger section specific analysis\n# Test to make sure Dynamics info is king. Sections info should not overwrite Dynamics\n@@ -296,7 +304,8 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\ncontinue # Skip non-memory mapped sections\nsva = sec.sh_addr\n- if addbase: sva += baseaddr\n+ if addbase:\n+ sva += baseaddr\n# if we've already defined a location at this address, skip it. (eg. DYNAMICS)\nif vw.getLocation(sva) == sva:\n@@ -369,7 +378,8 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nif sva == 0:\ncontinue\n- if addbase: sva += baseaddr\n+ if addbase:\n+ sva += baseaddr\nif sva == 0:\ncontinue\n@@ -397,7 +407,8 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\n# So aparently Elf64 binaries on amd64 use HIOS and then\n# s.st_other cause that's what all the kewl kids are doing...\nsva = s.st_other\n- if addbase: sva += baseaddr\n+ if addbase:\n+ sva += baseaddr\nif vw.isValidPointer(sva):\ntry:\nnew_functions.append((\"DynSym: STT_HIOS\", sva))\n@@ -408,7 +419,8 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nelif stype == Elf.STT_MDPROC: # there's only one that isn't HI or LO...\nsva = s.st_other\n- if addbase: sva += baseaddr\n+ if addbase:\n+ sva += baseaddr\nif vw.isValidPointer(sva):\ntry:\nvw.addExport(sva, EXP_DATA, dmglname, fname, makeuniq=True)\n@@ -443,7 +455,8 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\n# mapping symbol\nif arch in ('arm', 'thumb', 'thumb16'):\nsymname = s.getName()\n- if addbase: sva += baseaddr\n+ if addbase:\n+ sva += baseaddr\nif symname == '$a':\n# ARM code\nlogger.info('mapping (NOTYPE) ARM symbol: 0x%x: %r',sva, dmglname)\n@@ -474,7 +487,8 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\n# TODO: make use of _ZTSN (typeinfo) and _ZTVN (vtable) entries if name demangles cleanly\n- if addbase: sva += baseaddr\n+ if addbase:\n+ sva += baseaddr\nif vw.isValidPointer(sva) and len(dmglname):\ntry:\nif s.st_other == Elf.STB_WEAK:\n@@ -527,7 +541,8 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nfor r in relocs:\nrtype = Elf.getRelocType(r.r_info)\nrlva = r.r_offset\n- if addbase: rlva += baseaddr\n+ if addbase:\n+ rlva += baseaddr\ntry:\n# If it has a name, it's an externally\n# resolved \"import\" entry, otherwise, just a regular reloc\n@@ -595,12 +610,16 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\n#quick check to make sure we don't provide this symbol\nif ptr:\nlogger.info('R_ARM_JUMP_SLOT: adding Relocation 0x%x -> 0x%x (%s) ', rlva, ptr, dmglname)\n+ if addbase:\nvw.addRelocation(rlva, vivisect.RTYPE_BASEPTR, ptr)\n+ else:\n+ vw.addRelocation(rlva, vivisect.RTYPE_BASERELOC, ptr)\npname = \"ptr_%s_%.8x\" % (name, rlva)\nif vw.vaByName(pname) is None:\nvw.makeName(rlva, pname)\n- if addbase: ptr += baseaddr\n+ if addbase:\n+ ptr += baseaddr\nvw.makeName(ptr, name)\nvw.setComment(ptr, dmglname)\n@@ -622,7 +641,8 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nif vw.vaByName(pname) is None:\nvw.makeName(rlva, pname)\n- if addbase: ptr += baseaddr\n+ if addbase:\n+ ptr += baseaddr\nvw.makeImport(ptr, \"*\", dmglname)\nvw.setComment(ptr, name)\n@@ -665,12 +685,6 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nexcept vivisect.InvalidLocation as e:\nlogger.warn(\"NOTE\\t%r\", e)\n-def connectSymbols(vw):\n- for lva, lsize, ltype, linfo in vw.getImports():\n- for va, etype, name, filename in vw.getExports():\n- pass\n-\n-\ndef normName(name):\n'''\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/testelf.py",
"new_path": "vivisect/tests/testelf.py",
"diff": "import logging\n+logging.basicConfig()\n+logger = logging.getLogger(__name__)\nimport unittest\nimport Elf\nimport vivisect.cli as viv_cli\nimport vivisect.tests.helpers as helpers\n+import vivisect.analysis.elf as vae\nimport vivisect.analysis.elf.elfplt as vaeep\nimport vivisect.analysis.generic.pointers as vagp\n+import vivisect.analysis.generic.relocations as vagr\nfrom vivisect.tests import linux_amd64_ls_data\nfrom vivisect.tests import linux_amd64_chown_data\n@@ -40,13 +44,16 @@ class ELFTests(unittest.TestCase):\ncls.tests = []\nfor test in data:\nname, test_data, path = test\n+ logger.warn(\"======== %r ========\", name)\nfn = helpers.getTestPath(*path)\ne = Elf.Elf(file(fn))\nvw = viv_cli.VivCli()\nvw.loadFromFile(fn)\n- vw.analyze()\n- #vaeep.analyze(vw)\n- #vagp.analyze(vw)\n+ #vw.analyze()\n+ vae.analyze(vw)\n+ vagr.analyze(vw)\n+ vaeep.analyze(vw)\n+ vagp.analyze(vw)\ncls.tests.append((name, test_data, fn, e, vw))\n@@ -71,7 +78,10 @@ class ELFTests(unittest.TestCase):\nnewimps.sort()\noldimps = data['imports']\noldimps.sort()\n- self.assertListEqual(newimps, oldimps)\n+ for oldimp in oldimps:\n+ self.assertIn(oldimp, newimps)\n+ for newimp in newimps:\n+ self.assertIn(newimp, oldimps)\ndef exports(self, vw, data):\n# simple comparison to ensure same exports. perhaps too simple.\n@@ -79,7 +89,10 @@ class ELFTests(unittest.TestCase):\nnewexps.sort()\noldexps = data['exports']\noldexps.sort()\n- self.assertListEqual(newexps, oldexps)\n+ for oldexp in oldexps:\n+ self.assertIn(oldexp, newexps)\n+ for newexp in newexps:\n+ self.assertIn(newexp, oldexps)\ndef relocs(self, vw, data):\n# simple comparison to ensure same relocs. perhaps too simple.\n@@ -87,7 +100,11 @@ class ELFTests(unittest.TestCase):\nnewrels.sort()\noldrels = data['relocs']\noldrels.sort()\n- self.assertListEqual(newrels, newrels)\n+ for oldrel in oldrels:\n+ self.assertIn(oldrel, newrels)\n+ for newrel in newrels:\n+ self.assertIn(newrel, oldrels)\n+\ndef names(self, vw, data):\n# simple comparison to ensure same workspace names. perhaps too simple.\n@@ -96,6 +113,10 @@ class ELFTests(unittest.TestCase):\noldnames = data['names']\noldnames.sort()\nself.assertListEqual(newnames, newnames)\n+ for oldname in oldnames:\n+ self.assertIn(oldname, newnames)\n+ for newname in newnames:\n+ self.assertIn(newname, oldnames)\ndef pltgot(self, vw, data):\nfor pltva, gotva in data['pltgot']:\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
cleanups and mods based on feedback from @rakuyo.
|
718,770 |
02.09.2019 10:20:11
| 14,400 |
82281b1edcf6f19d8e96a93f9b14decc727cd516
|
savegame before cleanup. attempting to use ELF_DYNAMICS for ELFPLT failed because the PLT entries don't show up as DYNAMICS. other attempts may follow,but for now we'll rely on SECTIONS.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/elfplt.py",
"new_path": "vivisect/analysis/elf/elfplt.py",
"diff": "@@ -10,21 +10,71 @@ import envi.archs.i386 as e_i386\nlogger = logging.getLogger(__name__)\n+MAGIC_PLT_SIZE = 16\ndef analyze(vw):\n\"\"\"\nDo simple linear disassembly of the .plt section if present.\nMake functions\n\"\"\"\n+ print \"=========== ELF PLT ANALYSIS MODULE START =============\"\n+ for sva, ssize, sname, sfname in vw.getSegments():\n+ if sname not in (\".plt\", \".plt.got\"):\n+ continue\n+ '''\n+ for filename in vw.getFiles():\n+ dyns = vw.getFileMeta(filename, 'ELF_DYNAMICS')\n+ addbase = vw.getFileMeta(filename, 'addbase')\n+ imgbase = vw.getFileMeta(filename, 'imagebase')\n+ if dyns is None:\n+ logger.info('skipping file %r: no ELF_DYNAMICS info', filename)\n+ continue\n+\n+ pltva = dyns.get('DT_JMPREL')\n+ pltsz = dyns.get('DT_PLTRELSZ')\n+ if pltva is None or pltsz is None:\n+ logger.info('skipping file %r: no PLT/SZ info (staticly-linked?)', filename)\n+ continue\n+ if addbase:\n+ pltva += imgbase\n+ nextseg = pltva + pltsz\n+ sva = pltva\n+ '''\n+ nextseg = sva + ssize\n+ # make code\n+ while sva < nextseg:\n+ if vw.getLocation(sva) is None:\n+ logger.info('making PLT function: 0x%x', sva)\n+ try:\n+ vw.makeCode(sva)\n+ except Exception as e:\n+ logger.warn('0x%x: exception: %r', sva, e)\n+\n+ ltup = vw.getLocation(sva)\n+\n+ if ltup is not None:\n+ sva += ltup[vivisect.L_SIZE]\n+ logger.debug('incrementing to next va: 0x%x', sva)\n+ else:\n+ logger.warn('makeCode(0x%x) failed to make a location (probably failed instruction decode)! incrementing instruction pointer by 1 to continue PLT analysis <fingers crossed>', sva)\n+ sva += 1 # FIXME: add architectural \"PLT_INSTRUCTION_INCREMENT\" or something like it\n+\n+\n+ # scroll through arbitrary length functions and make functions\n+ for sva in range(sva, nextseg, MAGIC_PLT_SIZE):\n+ vw.makeFunction(sva)\n+ analyzeFunction(vw, sva)\n+\n+ '''\nfor sva, ssize, sname, sfname in vw.getSegments():\nif sname not in (\".plt\", \".plt.got\"):\ncontinue\n# make the first function as the dyn linker helper func, then skip 16 bytes #FIXME: JANKY\nvw.makeFunction(sva)\n+ nextseg = sva + ssize\nsva += 0x10\n- nextseg = sva + ssize\nwhile sva < nextseg:\nif vw.getLocation(sva) is None:\nlogger.info('making PLT function: 0x%x', sva)\n@@ -42,14 +92,15 @@ def analyze(vw):\nelse:\nlogger.warn('makeFunction(0x%x) failed to make a location (probably failed instruction decode)! incrementing instruction pointer by 1 to continue PLT analysis <fingers crossed>', sva)\nsva += 1 # FIXME: add architectural \"PLT_INSTRUCTION_INCREMENT\" or something like it\n-\n-\n+'''\nMAX_OPS = 10\ndef analyzeFunction(vw, funcva):\n- logger.info('analyzeFunction(vw, 0x%x)', funcva)\n+ print \"=========== ELF PLT FUNCTION ANALYSIS MODULE START =============\"\n+ logger.warn('analyzeFunction(vw, 0x%x)', funcva)\n+ return\nseg = vw.getSegment(funcva)\nif seg is None:\n@@ -115,17 +166,7 @@ def analyzeFunction(vw, funcva):\nlogger.info(\"PLT->PTR 0x%x: (0x%x) -> 0x%x -> 0x%x (%r)\" % (funcva, opval, tgtva, ptrva, ptrname))\nif vw.isValidPointer(ptrva):\nif funcname is None:\n- if ptrname.startswith(segfname+'.'):\n- fpart, npart = ptrname.split('.', 1)\n- funcname = '%s.ptr_%r' % (fpart, npart)\n- logger.info('.0 %r / %r / %r', fpart, npart, funcname)\n- else:\n- if fpart == '*':\n- fpart, npart = ptrname.split('.', 1)\n- logger.info('.1 %r / %r / %r', fpart, npart, funcname)\n- funcname = npart\n- funcname = 'ptr_%r' % ptrname\n- logger.info('.2 %r', funcname)\n+ funcname = _addNamePrefix(vw, ptrname, ptrva, 'ptr', '_')\nelif loctup[vivisect.L_LTYPE] != vivisect.LOC_IMPORT:\nlogger.warn(\"0x%x: (0x%x) %r != %r (%r)\" % (funcva, opval, loctup[vivisect.L_LTYPE], vivisect.LOC_IMPORT, funcname))\n@@ -136,3 +177,36 @@ def analyzeFunction(vw, funcva):\nlogger.info('makeFunctionThunk(0x%x, \"plt_%s\")', funcva, funcname)\nvw.makeFunctionThunk(funcva, \"plt_\" + funcname)\n+\n+\n+def _getNameParts(vw, name, va):\n+ fpart = None\n+ npart = name\n+ vapart = None\n+ fname = vw.getFileByVa(va)\n+ if name.startswith(fname + '.'):\n+ fpart, npart = name.split('.', 1)\n+ elif name.startswith('*.'):\n+ skip, npart = name.split('.', 1)\n+\n+ if npart.endswith('_%.8x' % va):\n+ npart, vapart = npart.rsplit('_', 1)\n+\n+ return fpart, npart, vapart\n+\n+\n+def _addNamePrefix(vw, name, va, prefix, joinstr=''):\n+ fpart, npart, vapart = _getNameParts(vw, name, va)\n+ if fpart is None and vapart is None:\n+ name = joinstr.join([prefix, npart])\n+\n+ elif vapart is None:\n+ name = fpart + '.' + joinstr.join([prefix, npart])\n+\n+ elif fpart is None:\n+ name = joinstr.join([prefix, npart])\n+\n+ else:\n+ name = fpart + '.' + joinstr.join([prefix, npart]) + '_' % vapart\n+ logger.debug('addNamePrefix: %r %r %r -> %r', fpart, npart, vapart, name)\n+ return name\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/generic/pointers.py",
"new_path": "vivisect/analysis/generic/pointers.py",
"diff": "@@ -76,5 +76,39 @@ def analyze(vw):\ntgtname = vw.getName(tgt)\nif tgtname is not None:\n- logger.info(' name(0x%x): %r', tgt, tgtname)\n- vw.makeName(ptr, 'ptr_%s_%.8x' % (tgtname, ptr))\n+ name = _addNamePrefix(vw, tgtname, tgt, 'ptr', '_') + '_%.8x' % ptr\n+ logger.info(' name(0x%x): %r (%r)', tgt, tgtname, name)\n+ vw.makeName(ptr, name)\n+\n+\n+def _getNameParts(vw, name, va):\n+ fpart = None\n+ npart = name\n+ vapart = None\n+ fname = vw.getFileByVa(va)\n+ if name.startswith(fname + '.'):\n+ fpart, npart = name.split('.', 1)\n+ elif name.startswith('*.'):\n+ skip, npart = name.split('.', 1)\n+\n+ if npart.endswith('_%.8x' % va):\n+ npart, vapart = npart.rsplit('_', 1)\n+\n+ return fpart, npart, vapart\n+\n+\n+def _addNamePrefix(vw, name, va, prefix, joinstr=''):\n+ fpart, npart, vapart = _getNameParts(vw, name, va)\n+ if fpart is None and vapart is None:\n+ name = joinstr.join([prefix, npart])\n+\n+ elif vapart is None:\n+ name = fpart + '.' + joinstr.join([prefix, npart])\n+\n+ elif fpart is None:\n+ name = joinstr.join([prefix, npart])\n+\n+ else:\n+ name = fpart + '.' + joinstr.join([prefix, npart]) + '_' % vapart\n+ logger.debug('addNamePrefix: %r %r %r -> %r', fpart, npart, vapart, name)\n+ return name\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -364,7 +364,8 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nelfmeta[Elf.dt_names.get(d.d_tag)] = d.d_value\n- vw.setMeta('ELF_DYNAMICS', elfmeta) # create a VaSet instead? setMeta allows more free-form info, but isn't currently accessible from the gui\n+ vw.setFileMeta(fname, 'ELF_DYNAMICS', elfmeta) # create a VaSet instead? setMeta allows more free-form info, but isn't currently accessible from the gui\n+ vw.setFileMeta(fname, 'addbase', addbase)\n# applyRelocs is specifically prior to \"process Dynamic Symbols\" because Dynamics-only symbols\n# (ie. not using Section Headers) may not get all the symbols. Some ELF's simply list too\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/qnx_arm_ksh_data.py",
"new_path": "vivisect/tests/qnx_arm_ksh_data.py",
"diff": "@@ -572,6 +572,7 @@ ksh_data = {\n],\n'names' : [\n+ (0x100114, 'str_/usr/lib/ldqnx.s_00100114'),\n(0x101f05, 'str_libc.so.3_00101f05'),\n(0x101f0f, 'str_getwchar_00101f0f'),\n(0x101f18, 'str____Unwind_Forced_00101f18'),\n@@ -871,7 +872,7 @@ ksh_data = {\n(0x102cc8, 'str___deregister_fra_00102cc8'),\n(0x102ce0, 'str__Jv_RegisterClas_00102ce0'),\n(0x102cf4, 'str___register_frame_00102cf4'),\n- (0x103534, 'init_function'),\n+ (0x103534, 'ksh.init_function'),\n(0x103550, u'ksh.getwchar'),\n(0x10355c, u'ksh.chroot'),\n(0x103568, u'ksh.setrlimit64'),\n@@ -1118,8 +1119,15 @@ ksh_data = {\n(0x1040fc, u'ksh.fopen64'),\n(0x104108, u'ksh.ftruncate64'),\n(0x104114, 'ksh.__entry'),\n- (0x104224, 'fini_array_0'),\n- (0x1042a0, 'init_array_0'),\n+ (0x1041e4, u'ksh.ptr__init_libc_001041e4'),\n+ (0x1041e8, u'ksh.ptr__preinit_array_001041e8'),\n+ (0x1041ec, u'ksh.ptr_atexit_001041ec'),\n+ (0x1041f0, u'ksh.ptr__fini_array_001041f0'),\n+ (0x1041f8, u'ksh.ptr__init_array_001041f8'),\n+ (0x104200, u'ksh.ptr_exit_00104200'),\n+ (0x104220, u'ksh.ptr_errno_00104220'),\n+ (0x104224, 'ksh.fini_array_0'),\n+ (0x1042a0, 'ksh.init_array_0'),\n(0x12243c, u'ksh.waitfor'),\n(0x129830, u'ksh.main'),\n(0x13ef10, u'ksh.__aeabi_uidiv'),\n@@ -1168,7 +1176,7 @@ ksh_data = {\n(0x1409dc, u'ksh.__gnu_unwind_frame'),\n(0x140a20, u'ksh.__divdi3'),\n(0x140e94, u'ksh.__udivdi3'),\n- (0x141d7c, 'fini_function'),\n+ (0x141d7c, 'ksh.fini_function'),\n(0x14228c, 'str_+alias_0014228c'),\n(0x142298, 'str_+command_00142298'),\n(0x1422a4, 'str_echo_001422a4'),\n@@ -1182,6 +1190,7 @@ ksh_data = {\n(0x142300, 'str_+unalias_00142300'),\n(0x14230c, 'str_whence_0014230c'),\n(0x14231c, 'str_bind_0014231c'),\n+ (0x1423c4, 'str_unalias_001423c4'),\n(0x1425b0, 'str_*=break_001425b0'),\n(0x1425b8, 'str_=builtin_001425b8'),\n(0x1425c4, 'str_*=continue_001425c4'),\n@@ -1201,11 +1210,86 @@ ksh_data = {\n(0x14263c, 'str_ulimit_0014263c'),\n(0x142644, 'str_+umask_00142644'),\n(0x14264c, 'str_*=unset_0014264c'),\n+ (0x1429ec, 'str_time(cpu-seconds_001429ec'),\n+ (0x142a00, 'str_file(blocks)_00142a00'),\n+ (0x142a10, 'str_coredump(blocks)_00142a10'),\n+ (0x142a24, 'str_data(kbytes)_00142a24'),\n+ (0x142a34, 'str_stack(kbytes)_00142a34'),\n+ (0x142a44, 'str_lockedmem(kbytes_00142a44'),\n+ (0x142a58, 'str_memory(kbytes)_00142a58'),\n+ (0x142a68, 'str_nofiles(descript_00142a68'),\n+ (0x142a80, 'str_processes_00142a80'),\n+ (0x142a8c, 'str_vmemory(kbytes)_00142a8c'),\n+ (0x142c0c, 'str_abort_00142c0c'),\n+ (0x142c14, 'str_beginning-of-his_00142c14'),\n+ (0x142c2c, 'str_complete-command_00142c2c'),\n+ (0x142c40, 'str_complete-file_00142c40'),\n+ (0x142c50, 'str_complete_00142c50'),\n+ (0x142c5c, 'str_delete-char-back_00142c5c'),\n+ (0x142c74, 'str_delete-word-back_00142c74'),\n+ (0x142c8c, 'str_delete-char-forw_00142c8c'),\n+ (0x142ca0, 'str_delete-word-forw_00142ca0'),\n+ (0x142cb4, 'str_kill-line_00142cb4'),\n+ (0x142cc0, 'str_redraw_00142cc0'),\n+ (0x142cc8, 'str_end-of-history_00142cc8'),\n+ (0x142cdc, 'str_list_00142cdc'),\n+ (0x142ce4, 'str_eot-or-delete_00142ce4'),\n+ (0x142cf4, 'str_error_00142cf4'),\n+ (0x142cfc, 'str_goto-history_00142cfc'),\n+ (0x142d0c, 'str_macro-string_00142d0c'),\n+ (0x142d1c, 'str_auto-insert_00142d1c'),\n+ (0x142d28, 'str_kill-to-eol_00142d28'),\n+ (0x142d34, 'str_kill-region_00142d34'),\n+ (0x142d40, 'str_list-command_00142d40'),\n+ (0x142d50, 'str_list-file_00142d50'),\n+ (0x142d5c, 'str_quote_00142d5c'),\n+ (0x142d64, 'str_prefix-1_00142d64'),\n+ (0x142d70, 'str_prefix-2_00142d70'),\n+ (0x142d7c, 'str_yank-pop_00142d7c'),\n+ (0x142d88, 'str_backward-char_00142d88'),\n+ (0x142d98, 'str_beginning-of-lin_00142d98'),\n+ (0x142dac, 'str_backward-word_00142dac'),\n+ (0x142dbc, 'str_end-of-line_00142dbc'),\n+ (0x142dc8, 'str_forward-char_00142dc8'),\n+ (0x142dd8, 'str_forward-word_00142dd8'),\n+ (0x142de8, 'str_newline_00142de8'),\n+ (0x142df0, 'str_down-history_00142df0'),\n+ (0x142e00, 'str_newline-and-next_00142e00'),\n+ (0x142e14, 'str_no-op_00142e14'),\n+ (0x142e1c, 'str_up-history_00142e1c'),\n+ (0x142e28, 'str_prev-hist-word_00142e28'),\n+ (0x142e38, 'str_search-character_00142e38'),\n+ (0x142e54, 'str_search-character_00142e54'),\n+ (0x142e70, 'str_search-history_00142e70'),\n+ (0x142e80, 'str_set-mark-command_00142e80'),\n+ (0x142e94, 'str_stuff_00142e94'),\n+ (0x142e9c, 'str_stuff-reset_00142e9c'),\n+ (0x142ea8, 'str_transpose-chars_00142ea8'),\n+ (0x142eb8, 'str_version_00142eb8'),\n+ (0x142ec0, 'str_exchange-point-a_00142ec0'),\n+ (0x142ed8, 'str_yank_00142ed8'),\n+ (0x142ee0, 'str_complete-list_00142ee0'),\n+ (0x142ef0, 'str_expand-file_00142ef0'),\n+ (0x142efc, 'str_capitalize-word_00142efc'),\n+ (0x142f0c, 'str_downcase-word_00142f0c'),\n+ (0x142f1c, 'str_upcase-word_00142f1c'),\n+ (0x142f28, 'str_set-arg_00142f28'),\n+ (0x142f30, 'str_comment_00142f30'),\n+ (0x142f38, 'str_prefix-3_00142f38'),\n+ (0x1436c4, 'str_REPLY_001436c4'),\n+ (0x1436d0, 'str_read_001436d0'),\n+ (0x143c98, 'str_no such job_00143c98'),\n+ (0x143ca4, 'str_ambiguous_00143ca4'),\n+ (0x143cb0, 'str_argument must be_00143cb0'),\n+ (0x14415c, 'str_KSH_VERSION_0014415c'),\n(0x144168, 'str_typeset_00144168'),\n(0x144174, 'str_SHELL_00144174'),\n(0x14417c, 'str_PATH_0014417c'),\n(0x144184, 'str_HOME_00144184'),\n+ (0x144194, 'str_PPID_00144194'),\n+ (0x14419c, 'str_OPTIND=1_0014419c'),\n(0x1441a8, 'str_eval_001441a8'),\n+ (0x1441b0, 'str_typeset -i RANDO_001441b0'),\n(0x14420c, 'str_alias_0014420c'),\n(0x144214, 'str_hash=alias -t_00144214'),\n(0x144224, 'str_type=whence -v_00144224'),\n@@ -1227,9 +1311,152 @@ ksh_data = {\n(0x144344, 'str_grep_00144344'),\n(0x144350, 'str_mail_00144350'),\n(0x144358, 'str_make_00144358'),\n+ (0x144384, 'str_wrap_00144384'),\n(0x14438c, 'str_function reopen_0014438c'),\n(0x1443a0, 'str_reopen_dev=\"$1\";_001443a0'),\n+ (0x1444e4, 'str_onnode=on -n_001444e4'),\n+ (0x1444f4, 'str_ontty=on -t_001444f4'),\n+ (0x14472c, 'str_pdksh_0014472c'),\n+ (0x1447a4, 'str_allexport_001447a4'),\n+ (0x1447b0, 'str_braceexpand_001447b0'),\n+ (0x1447bc, 'str_bgnice_001447bc'),\n+ (0x1447c4, 'str_emacs_001447c4'),\n+ (0x1447cc, 'str_emacs-usemeta_001447cc'),\n+ (0x1447dc, 'str_errexit_001447dc'),\n+ (0x1447e4, 'str_gmacs_001447e4'),\n+ (0x1447ec, 'str_ignoreeof_001447ec'),\n+ (0x1447f8, 'str_interactive_001447f8'),\n+ (0x144804, 'str_keyword_00144804'),\n+ (0x14480c, 'str_login_0014480c'),\n+ (0x144814, 'str_markdirs_00144814'),\n+ (0x144820, 'str_monitor_00144820'),\n+ (0x144828, 'str_noclobber_00144828'),\n+ (0x144834, 'str_noexec_00144834'),\n+ (0x14483c, 'str_noglob_0014483c'),\n+ (0x144844, 'str_nohup_00144844'),\n+ (0x14484c, 'str_nolog_0014484c'),\n+ (0x144854, 'str_notify_00144854'),\n+ (0x14485c, 'str_nounset_0014485c'),\n+ (0x144864, 'str_physical_00144864'),\n+ (0x144870, 'str_posix_00144870'),\n+ (0x144878, 'str_privileged_00144878'),\n+ (0x144884, 'str_restricted_00144884'),\n+ (0x144890, 'str_stdin_00144890'),\n+ (0x144898, 'str_trackall_00144898'),\n+ (0x1448a4, 'str_verbose_001448a4'),\n+ (0x1448ac, 'str_xtrace_001448ac'),\n+ (0x1448b4, 'str_wrap_001448b4'),\n+ (0x144c90, 'str_select_00144c90'),\n+ (0x144ccc, 'str_then_00144ccc'),\n+ (0x144cd4, 'str_else_00144cd4'),\n+ (0x144cdc, 'str_elif_00144cdc'),\n+ (0x144ce8, 'str_case_00144ce8'),\n+ (0x144cf0, 'str_esac_00144cf0'),\n+ (0x144cf8, 'str_while_00144cf8'),\n+ (0x144d00, 'str_until_00144d00'),\n+ (0x144d0c, 'str_done_00144d0c'),\n+ (0x144d18, 'str_function_00144d18'),\n+ (0x144d24, 'str_time_00144d24'),\n+ (0x144d50, 'str_newline_00144d50'),\n+ (0x144ef8, 'str_EXIT_00144ef8'),\n+ (0x144f00, 'str_Signal 0_00144f00'),\n+ (0x144f10, 'str_Hangup_00144f10'),\n+ (0x144f1c, 'str_Interrupt_00144f1c'),\n+ (0x144f28, 'str_QUIT_00144f28'),\n+ (0x144f30, 'str_Quit_00144f30'),\n+ (0x144f3c, 'str_Illegal instruct_00144f3c'),\n+ (0x144f50, 'str_TRAP_00144f50'),\n+ (0x144f58, 'str_Trace trap_00144f58'),\n+ (0x144f64, 'str_ABRT_00144f64'),\n+ (0x144f6c, 'str_Abort_00144f6c'),\n+ (0x144f78, 'str_EMT trap_00144f78'),\n+ (0x144f88, 'str_Floating point e_00144f88'),\n+ (0x144fa4, 'str_KILL_00144fa4'),\n+ (0x144fac, 'str_Killed_00144fac'),\n+ (0x144fb8, 'str_Bus error_00144fb8'),\n+ (0x144fc4, 'str_SEGV_00144fc4'),\n+ (0x144fcc, 'str_Memory fault_00144fcc'),\n+ (0x144fe0, 'str_Bad system call_00144fe0'),\n+ (0x144ff0, 'str_PIPE_00144ff0'),\n+ (0x144ff8, 'str_Broken pipe_00144ff8'),\n+ (0x145004, 'str_ALRM_00145004'),\n+ (0x14500c, 'str_Alarm clock_0014500c'),\n+ (0x145018, 'str_TERM_00145018'),\n+ (0x145020, 'str_Terminated_00145020'),\n+ (0x14502c, 'str_USR1_0014502c'),\n+ (0x145034, 'str_User defined sig_00145034'),\n+ (0x14504c, 'str_USR2_0014504c'),\n+ (0x145054, 'str_User defined sig_00145054'),\n+ (0x14506c, 'str_CHLD_0014506c'),\n+ (0x145074, 'str_Child exited_00145074'),\n+ (0x145088, 'str_Power-fail/Resta_00145088'),\n+ (0x14509c, 'str_WINCH_0014509c'),\n+ (0x1450a4, 'str_Window size chan_001450a4'),\n+ (0x1450bc, 'str_Urgent I/O condi_001450bc'),\n+ (0x1450d8, 'str_I/O possible_001450d8'),\n+ (0x1450e8, 'str_STOP_001450e8'),\n+ (0x1450f0, 'str_Stopped (signal)_001450f0'),\n+ (0x145104, 'str_TSTP_00145104'),\n+ (0x14510c, 'str_Stopped_0014510c'),\n+ (0x145114, 'str_CONT_00145114'),\n+ (0x14511c, 'str_Continued_0014511c'),\n+ (0x145128, 'str_TTIN_00145128'),\n+ (0x145130, 'str_Stopped (tty inp_00145130'),\n+ (0x145144, 'str_TTOU_00145144'),\n+ (0x14514c, 'str_Stopped (tty out_0014514c'),\n+ (0x145164, 'str_VTALRM_00145164'),\n+ (0x14516c, 'str_Virtual timer ex_0014516c'),\n+ (0x145184, 'str_PROF_00145184'),\n+ (0x14518c, 'str_Profiling timer _0014518c'),\n+ (0x1451a4, 'str_XCPU_001451a4'),\n+ (0x1451ac, 'str_CPU time limit e_001451ac'),\n+ (0x1451c4, 'str_XFSZ_001451c4'),\n+ (0x1451cc, 'str_File size limit _001451cc'),\n+ (0x1451e8, 'str_Signal 32_001451e8'),\n+ (0x1451f4, 'str_Signal 33_001451f4'),\n+ (0x145200, 'str_Signal 34_00145200'),\n+ (0x14520c, 'str_Signal 35_0014520c'),\n+ (0x145218, 'str_Signal 36_00145218'),\n+ (0x145224, 'str_Signal 37_00145224'),\n+ (0x145230, 'str_Signal 38_00145230'),\n+ (0x14523c, 'str_Signal 39_0014523c'),\n+ (0x145248, 'str_Signal 40_00145248'),\n+ (0x145254, 'str_Signal 41_00145254'),\n+ (0x145260, 'str_Signal 42_00145260'),\n+ (0x14526c, 'str_Signal 43_0014526c'),\n+ (0x145278, 'str_Signal 44_00145278'),\n+ (0x145284, 'str_Signal 45_00145284'),\n+ (0x145290, 'str_Signal 46_00145290'),\n+ (0x14529c, 'str_Signal 47_0014529c'),\n+ (0x1452a8, 'str_Signal 48_001452a8'),\n+ (0x1452b4, 'str_Signal 49_001452b4'),\n+ (0x1452c0, 'str_Signal 50_001452c0'),\n+ (0x1452cc, 'str_Signal 51_001452cc'),\n+ (0x1452d8, 'str_Signal 52_001452d8'),\n+ (0x1452e4, 'str_Signal 53_001452e4'),\n+ (0x1452f0, 'str_Signal 54_001452f0'),\n+ (0x1452fc, 'str_Signal 55_001452fc'),\n+ (0x145308, 'str_Signal 56_00145308'),\n+ (0x145318, 'str_Error handler_00145318'),\n+ (0x145694, 'str_PATH_00145694'),\n+ (0x1456b8, 'str_VISUAL_001456b8'),\n+ (0x1456c4, 'str_COLUMNS_001456c4'),\n+ (0x1456d0, 'str_OPTIND_001456d0'),\n+ (0x1456d8, 'str_POSIXLY_CORRECT_001456d8'),\n+ (0x1456e8, 'str_TMPDIR_001456e8'),\n+ (0x1456f0, 'str_HISTFILE_001456f0'),\n+ (0x1456fc, 'str_HISTSIZE_001456fc'),\n+ (0x145708, 'str_EDITOR_00145708'),\n+ (0x145710, 'str_MAIL_00145710'),\n+ (0x145718, 'str_MAILCHECK_00145718'),\n+ (0x145724, 'str_MAILPATH_00145724'),\n+ (0x145730, 'str_RANDOM_00145730'),\n+ (0x145738, 'str_SECONDS_00145738'),\n+ (0x145740, 'str_TMOUT_00145740'),\n+ (0x145748, 'str_LINENO_00145748'),\n(0x1457ec, 'str_/bin/sh_001457ec'),\n+ (0x146934, 'ksh.ptr_init_array_0_00146934'),\n+ (0x146938, 'ksh.ptr_fini_array_0_00146938'),\n(0x146a1c, 'ptr_getwchar_00146a1c'),\n(0x146a20, 'ptr_chroot_00146a20'),\n(0x146a24, 'ptr_setrlimit64_00146a24'),\n@@ -1485,6 +1712,7 @@ ksh_data = {\n(0x146e0c, u'*.__deregister_frame_info_00146e0c'),\n(0x146e10, u'*._Jv_RegisterClasses_00146e10'),\n(0x146e14, u'*.__register_frame_info_00146e14'),\n+ (0x1475b0, 'str_PD KSH v5.2.14 9_001475b0'),\n(0x1475e0, u'ksh.errno'),\n(0x1475e4, u'ksh._Tolotab'),\n(0x1475e8, u'ksh._Ctype'),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
savegame before cleanup. attempting to use ELF_DYNAMICS for ELFPLT failed because the PLT entries don't show up as DYNAMICS. other attempts may follow,but for now we'll rely on SECTIONS.
|
718,770 |
02.09.2019 15:40:49
| 14,400 |
a2a40ffbb102e4888b334bef1bb2834e31d7dae2
|
bugfix, cleanup, and cli's do_plt and do_plt_function
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/elfplt.py",
"new_path": "vivisect/analysis/elf/elfplt.py",
"diff": "@@ -17,31 +17,14 @@ def analyze(vw):\nDo simple linear disassembly of the .plt section if present.\nMake functions\n\"\"\"\n- print \"=========== ELF PLT ANALYSIS MODULE START =============\"\nfor sva, ssize, sname, sfname in vw.getSegments():\nif sname not in (\".plt\", \".plt.got\"):\ncontinue\n- '''\n- for filename in vw.getFiles():\n- dyns = vw.getFileMeta(filename, 'ELF_DYNAMICS')\n- addbase = vw.getFileMeta(filename, 'addbase')\n- imgbase = vw.getFileMeta(filename, 'imagebase')\n- if dyns is None:\n- logger.info('skipping file %r: no ELF_DYNAMICS info', filename)\n- continue\n+ analyzePLT(vw, sva, ssize)\n- pltva = dyns.get('DT_JMPREL')\n- pltsz = dyns.get('DT_PLTRELSZ')\n- if pltva is None or pltsz is None:\n- logger.info('skipping file %r: no PLT/SZ info (staticly-linked?)', filename)\n- continue\n- if addbase:\n- pltva += imgbase\n- nextseg = pltva + pltsz\n- sva = pltva\n- '''\n+def analyzePLT(vw, sva, ssize):\n+ # make code for every opcode in PLT\nnextseg = sva + ssize\n- # make code\nwhile sva < nextseg:\nif vw.getLocation(sva) is None:\nlogger.info('making PLT function: 0x%x', sva)\n@@ -65,53 +48,23 @@ def analyze(vw):\nvw.makeFunction(sva)\nanalyzeFunction(vw, sva)\n- '''\n- for sva, ssize, sname, sfname in vw.getSegments():\n- if sname not in (\".plt\", \".plt.got\"):\n- continue\n-\n- # make the first function as the dyn linker helper func, then skip 16 bytes #FIXME: JANKY\n- vw.makeFunction(sva)\n- nextseg = sva + ssize\n- sva += 0x10\n-\n- while sva < nextseg:\n- if vw.getLocation(sva) is None:\n- logger.info('making PLT function: 0x%x', sva)\n- vw.makeFunction(sva)\n- try:\n- analyzeFunction(vw, sva)\n- except Exception as e:\n- logger.warn('0x%x: exception: %r', sva, e)\n-\n- ltup = vw.getLocation(sva)\n-\n- if ltup is not None:\n- sva += ltup[vivisect.L_SIZE]\n- logger.debug('incrementing to next va: 0x%x', sva)\n- else:\n- logger.warn('makeFunction(0x%x) failed to make a location (probably failed instruction decode)! incrementing instruction pointer by 1 to continue PLT analysis <fingers crossed>', sva)\n- sva += 1 # FIXME: add architectural \"PLT_INSTRUCTION_INCREMENT\" or something like it\n-'''\n-\nMAX_OPS = 10\ndef analyzeFunction(vw, funcva):\n- print \"=========== ELF PLT FUNCTION ANALYSIS MODULE START =============\"\nlogger.warn('analyzeFunction(vw, 0x%x)', funcva)\nreturn\nseg = vw.getSegment(funcva)\nif seg is None:\nlogger.info('not analyzing 0x%x: no segment found', funcva)\n- return\n-\n+ #return\n+ else:\nsegva, segsize, segname, segfname = seg\nif segname not in (\".plt\", \".plt.got\"):\n- logger.info('not analyzing 0x%x: not part of \".plt\" or \".plt.got\"', funcva)\n- return\n+ logger.warn('0x%x: not part of \".plt\" or \".plt.got\"', funcva)\n+ #return\nlogger.info('analyzing PLT function: 0x%x', funcva)\ncount = 0\n@@ -207,6 +160,6 @@ def _addNamePrefix(vw, name, va, prefix, joinstr=''):\nname = joinstr.join([prefix, npart])\nelse:\n- name = fpart + '.' + joinstr.join([prefix, npart]) + '_' % vapart\n+ name = fpart + '.' + joinstr.join([prefix, npart]) + '_%s' % vapart\nlogger.debug('addNamePrefix: %r %r %r -> %r', fpart, npart, vapart, name)\nreturn name\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/generic/pointers.py",
"new_path": "vivisect/analysis/generic/pointers.py",
"diff": "@@ -109,6 +109,6 @@ def _addNamePrefix(vw, name, va, prefix, joinstr=''):\nname = joinstr.join([prefix, npart])\nelse:\n- name = fpart + '.' + joinstr.join([prefix, npart]) + '_' % vapart\n+ name = fpart + '.' + joinstr.join([prefix, npart]) + '_%s' % vapart\nlogger.debug('addNamePrefix: %r %r %r -> %r', fpart, npart, vapart, name)\nreturn name\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/cli.py",
"new_path": "vivisect/cli.py",
"diff": "@@ -755,3 +755,36 @@ class VivCli(e_cli.EnviCli, vivisect.VivWorkspace):\nimport vivisect.vdbext as viv_vdbext\nviv_vdbext.runVdb(self._viv_gui)\n+\n+ def do_plt(self, line):\n+ '''\n+ Parse an entire PLT Section\n+\n+ Usage: plt <pltva> <pltsize>\n+ '''\n+ if not line:\n+ return self.do_help(\"plt\")\n+\n+ argv = e_cli.splitargs(line)\n+ if len(argv) != 2:\n+ return self.do_help(\"plt\")\n+\n+ sva = self.parseExpression(argv[0])\n+ ssize = self.parseExpression(argv[1])\n+\n+ import vivisect.analysis.elf.elfplt as vaee\n+ vaee.analyzePLT(self, sva, ssize)\n+\n+ def do_plt_function(self, line):\n+ '''\n+ Make a PLT function at a virtual address\n+\n+ Usage: plt_function <va>\n+ '''\n+ if not line:\n+ return self.do_help(\"plt_function\")\n+\n+ fva = self.parseExpression(line)\n+\n+ import vivisect.analysis.elf.elfplt as vaee\n+ vaee.analyzeFunction(self, fva)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
bugfix, cleanup, and cli's do_plt and do_plt_function
|
718,770 |
03.09.2019 14:28:43
| 14,400 |
e175cfda1e54586823e6bf0ad78145d175929b83
|
add entrypoints analysis module
|
[
{
"change_type": "ADD",
"old_path": null,
"new_path": "vivisect/analysis/generic/entrypoints.py",
"diff": "+\n+def analyze(vw):\n+ '''\n+ Analysis module which processes entries in VaSet \"EntryPoints\" as Functions\n+ This is a vital analysis module, only made into a module to allow for\n+ control over when in the process it gets executed.\n+ '''\n+ vw.processEntryPoints()\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
add entrypoints analysis module
|
718,770 |
04.09.2019 15:05:05
| 14,400 |
8d67aeb299ec2054beafe5d8a4c2f5575c98984d
|
bugfix in elfplt, modification of PLT entries to include "plt@" as a prefix.
modify unit tests to ignore changes in names starting with "str_" and "plt_str_"
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/elfplt.py",
"new_path": "vivisect/analysis/elf/elfplt.py",
"diff": "@@ -22,12 +22,13 @@ def analyze(vw):\ncontinue\nanalyzePLT(vw, sva, ssize)\n-def analyzePLT(vw, sva, ssize):\n+def analyzePLT(vw, ssva, ssize):\n# make code for every opcode in PLT\n+ sva = ssva\nnextseg = sva + ssize\nwhile sva < nextseg:\nif vw.getLocation(sva) is None:\n- logger.info('making PLT function: 0x%x', sva)\n+ logger.info('making code: 0x%x', sva)\ntry:\nvw.makeCode(sva)\nexcept Exception as e:\n@@ -44,7 +45,8 @@ def analyzePLT(vw, sva, ssize):\n# scroll through arbitrary length functions and make functions\n- for sva in range(sva, nextseg, MAGIC_PLT_SIZE):\n+ for sva in range(ssva, nextseg, MAGIC_PLT_SIZE):\n+ logger.info('making PLT function: 0x%x', sva)\nvw.makeFunction(sva)\nanalyzeFunction(vw, sva)\n@@ -52,8 +54,7 @@ MAX_OPS = 10\ndef analyzeFunction(vw, funcva):\n- logger.warn('analyzeFunction(vw, 0x%x)', funcva)\n- return\n+ logger.info('analyzeFunction(vw, 0x%x)', funcva)\nseg = vw.getSegment(funcva)\nif seg is None:\n@@ -126,11 +127,18 @@ def analyzeFunction(vw, funcva):\nlogger.warn(\"0x%x: (0x%x) %r != %r (%r)\" % (funcva, opval, loctup[vivisect.L_LTYPE], vivisect.LOC_IMPORT, funcname))\nreturn\n- if funcname is not None and funcname.endswith('_%.8x' % opval):\n+ # if we can't resolve a name, don't make it a thunk\n+ if funcname is None:\n+ return\n+\n+ # trim up the name\n+ if funcname.startswith('*.'):\n+ funcname = funcname[2:]\n+ if funcname.endswith('_%.8x' % opval):\nfuncname = funcname[:-9]\n- logger.info('makeFunctionThunk(0x%x, \"plt_%s\")', funcva, funcname)\n- vw.makeFunctionThunk(funcva, \"plt_\" + funcname)\n+ logger.info('makeFunctionThunk(0x%x, \"plt@%s\")', funcva, funcname)\n+ vw.makeFunctionThunk(funcva, \"plt@\" + funcname)\ndef _getNameParts(vw, name, va):\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/testelf.py",
"new_path": "vivisect/tests/testelf.py",
"diff": "@@ -62,51 +62,51 @@ class ELFTests(unittest.TestCase):\ndef test_files(self):\nfor name, test_data, fn, e, vw in self.tests:\nlogger.debug(\"testing %r (%r)...\", name, fn)\n- self.do_file(vw, test_data)\n+ self.do_file(vw, test_data, name)\n- def do_file(self, vw, data):\n- self.imports(vw, data)\n- self.exports(vw, data)\n- self.relocs(vw, data)\n- self.names(vw, data)\n- self.pltgot(vw, data)\n- self.debuginfosyms(vw, data)\n+ def do_file(self, vw, data, fname):\n+ self.imports(vw, data, fname)\n+ self.exports(vw, data, fname)\n+ self.relocs(vw, data, fname)\n+ self.names(vw, data, fname)\n+ self.pltgot(vw, data, fname)\n+ self.debuginfosyms(vw, data, fname)\n- def imports(self, vw, data):\n+ def imports(self, vw, data, fname):\n# simple comparison to ensure same imports. perhaps too simple.\nnewimps = vw.getImports()\nnewimps.sort()\noldimps = data['imports']\noldimps.sort()\nfor oldimp in oldimps:\n- self.assertIn(oldimp, newimps)\n+ self.assertIn(oldimp, newimps, msg='imports: missing: %r (%r)' % (oldimp, fname))\nfor newimp in newimps:\n- self.assertIn(newimp, oldimps)\n+ self.assertIn(newimp, oldimps, msg='imports: new: %r (%r)' % (newimp, fname))\n- def exports(self, vw, data):\n+ def exports(self, vw, data, fname):\n# simple comparison to ensure same exports. perhaps too simple.\nnewexps = vw.getExports()\nnewexps.sort()\noldexps = data['exports']\noldexps.sort()\nfor oldexp in oldexps:\n- self.assertIn(oldexp, newexps)\n+ self.assertIn(oldexp, newexps, msg='exports: missing: %r (%r)' % (oldexp, fname))\nfor newexp in newexps:\n- self.assertIn(newexp, oldexps)\n+ self.assertIn(newexp, oldexps, msg='exports: new: %r (%r)' % (newexp, fname))\n- def relocs(self, vw, data):\n+ def relocs(self, vw, data, fname):\n# simple comparison to ensure same relocs. perhaps too simple.\nnewrels = vw.getRelocations()\nnewrels.sort()\noldrels = data['relocs']\noldrels.sort()\nfor oldrel in oldrels:\n- self.assertIn(oldrel, newrels)\n+ self.assertIn(oldrel, newrels, msg='relocs: missing: %r (%r)' % (oldrel, fname))\nfor newrel in newrels:\n- self.assertIn(newrel, oldrels)\n+ self.assertIn(newrel, oldrels, msg='relocs: new: %r (%r)' % (newrel, fname))\n- def names(self, vw, data):\n+ def names(self, vw, data, fname):\n# simple comparison to ensure same workspace names. perhaps too simple.\nnewnames = vw.getRelocations()\nnewnames.sort()\n@@ -114,19 +114,23 @@ class ELFTests(unittest.TestCase):\noldnames.sort()\nself.assertListEqual(newnames, newnames)\nfor oldname in oldnames:\n- self.assertIn(oldname, newnames)\n+ if oldname.startswith('str_') or oldname.startswith('ptr_str_'):\n+ continue\n+ self.assertIn(oldname, newnames, msg='names: missing: %r (%r)' % (oldname, fname))\nfor newname in newnames:\n- self.assertIn(newname, oldnames)\n+ if newname.startswith('str_') or newname.startswith('ptr_str_'):\n+ continue\n+ self.assertIn(newname, oldnames, msg='names: new: %r (%r)' % (newname, fname))\n- def pltgot(self, vw, data):\n+ def pltgot(self, vw, data, fname):\nfor pltva, gotva in data['pltgot']:\nmatch = False\nfor xfr, xto, xtype, xinfo in vw.getXrefsFrom(pltva):\nif xfr == pltva and xto == gotva:\nmatch = True\n- self.assertEqual((hex(pltva), match), (hex(pltva), True))\n+ self.assertEqual((hex(pltva), match), (hex(pltva), True), msg='pltgot: %r' % fname)\n- def debuginfosyms(self, vw, data):\n+ def debuginfosyms(self, vw, data, fname):\n# we don't currently parse debugging symbols.\n# while they are seldom in hard targets, this is a weakness we should correct.\npass\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
bugfix in elfplt, modification of PLT entries to include "plt@" as a prefix.
modify unit tests to ignore changes in names starting with "str_" and "plt_str_"
|
718,770 |
04.09.2019 15:33:55
| 14,400 |
1a82adfb417d3acc91d51320178c30d9ac1491a7
|
more intermediate tweaks.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/linux_amd64_ls_data.py",
"new_path": "vivisect/tests/linux_amd64_ls_data.py",
"diff": "@@ -616,19 +616,14 @@ ls_data = {\n(0x412d00, 'ptr_str_dereference-comm_00412d00'),\n(0x412d20, 'ptr_str_hide_00412d20'),\n(0x412d40, 'ptr_str_ignore_00412d40'),\n- (0x412d60, 'ptr_str_indicator-style_00412d60'),\n(0x412d80, 'ptr_str_dereference_00412d80'),\n(0x412da0, 'ptr_str_literal_00412da0'),\n(0x412dc0, 'ptr_str_quote-name_00412dc0'),\n- (0x412de0, 'ptr_str_quoting-style_00412de0'),\n(0x412e00, 'ptr_str_recursive_00412e00'),\n- (0x412e20, 'ptr_str_format_00412e20'),\n(0x412e40, 'ptr_str_show-control-cha_00412e40'),\n- (0x412e60, 'ptr_str_sort_00412e60'),\n(0x412e80, 'ptr_str_tabsize_00412e80'),\n(0x412ea0, 'ptr_str_time_00412ea0'),\n(0x412ec0, 'ptr_str_time-style_00412ec0'),\n- (0x412ee0, 'ptr_str_color_00412ee0'),\n(0x412f00, 'ptr_str_block-size_00412f00'),\n(0x412f20, 'ptr_str_context_00412f20'),\n(0x412f40, 'ptr_str_author_00412f40'),\n@@ -839,8 +834,6 @@ ls_data = {\n(0x6194b8, 'ptr_str_34;42_006194b8'),\n(0x6194c8, 'ptr_str_30;42_006194c8'),\n(0x6194d8, 'ptr_str_30;41_006194d8'),\n- (0x619518, 'ptr_str_%b %e %H:%M_00619518'),\n- (0x619530, 'ptr_str_8.13_00619530'),\n(0x619580, u'ls.program_invocation_short_name'),\n(0x619590, u'ls.stdout'),\n(0x6195a0, u'ls.optind'),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
more intermediate tweaks.
|
718,770 |
04.09.2019 17:20:13
| 14,400 |
c99816ef7471b6bbf504646fbc8469e0943dbeee
|
making elfplt processing more robust to instruction-decoder bugs.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/elfplt.py",
"new_path": "vivisect/analysis/elf/elfplt.py",
"diff": "@@ -70,10 +70,14 @@ def analyzeFunction(vw, funcva):\nlogger.info('analyzing PLT function: 0x%x', funcva)\ncount = 0\nopva = funcva\n+ try:\nop = vw.parseOpcode(opva)\nwhile count < MAX_OPS and op.iflags & envi.IF_BRANCH == 0:\nopva += len(op)\nop = vw.parseOpcode(opva)\n+ except Exception as e:\n+ logger.warn('failure analyzing PLT func 0x%x: %r', funcva, e)\n+ return\nif op.iflags & envi.IF_BRANCH == 0:\nlogger.warn(\"PLT: 0x%x - Could not find a branch!\", funcva)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
making elfplt processing more robust to instruction-decoder bugs.
|
718,770 |
04.09.2019 18:20:25
| 14,400 |
957a5f01a182b5a12089bb4451f117475d0fcceb
|
bugfix: testelf
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/testelf.py",
"new_path": "vivisect/tests/testelf.py",
"diff": "@@ -114,11 +114,11 @@ class ELFTests(unittest.TestCase):\noldnames.sort()\nself.assertListEqual(newnames, newnames)\nfor oldname in oldnames:\n- if oldname.startswith('str_') or oldname.startswith('ptr_str_') or oldname.startswith('ptr_sub_'):\n+ if oldname[1].startswith('str_') or oldname[1].startswith('ptr_str_') or oldname[1].startswith('ptr_sub_'):\ncontinue\nself.assertIn(oldname, newnames, msg='names: missing: %r (%r)' % (oldname, fname))\nfor newname in newnames:\n- if newname.startswith('str_') or newname.startswith('ptr_str_') or newname.startswith('ptr_sub_'):\n+ if newname[1].startswith('str_') or newname[1].startswith('ptr_str_') or newname[1].startswith('ptr_sub_'):\ncontinue\nself.assertIn(newname, oldnames, msg='names: new: %r (%r)' % (newname, fname))\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
bugfix: testelf
|
718,770 |
04.09.2019 19:13:09
| 14,400 |
d11dad9b166e9c58f48f236a21aa10119eb796f0
|
mighty big li'l bugfix in testelf.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/testelf.py",
"new_path": "vivisect/tests/testelf.py",
"diff": "@@ -108,7 +108,7 @@ class ELFTests(unittest.TestCase):\ndef names(self, vw, data, fname):\n# simple comparison to ensure same workspace names. perhaps too simple.\n- newnames = vw.getRelocations()\n+ newnames = vw.getNames()\nnewnames.sort()\noldnames = data['names']\noldnames.sort()\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
mighty big li'l bugfix in testelf.
|
718,770 |
04.09.2019 19:20:34
| 14,400 |
db0184629383a171d05aef4623bbc7e427eb2df0
|
unittest tweak
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/testelf.py",
"new_path": "vivisect/tests/testelf.py",
"diff": "@@ -21,7 +21,8 @@ from vivisect.tests import linux_arm_sh_data\nfrom vivisect.tests import qnx_arm_ksh_data\nfrom vivisect.tests import openbsd_amd64_ls_data\n-data = ((\"linux_amd64_ls\", linux_amd64_ls_data.ls_data, ('linux', 'amd64', 'ls'), ),\n+data = (\n+ (\"linux_amd64_ls\", linux_amd64_ls_data.ls_data, ('linux', 'amd64', 'ls'), ),\n(\"linux_amd64_chown\", linux_amd64_chown_data.chown_data, ('linux', 'amd64', 'chown'),),\n(\"linux_amd64_libc\", linux_amd64_libc_2_27_data.libc_data, ('linux', 'amd64', 'libc-2.27.so'),),\n(\"linux_amd64_libstdc\", linux_amd64_libstdc_data.libstdc_data, ('linux', 'amd64', 'libstdc++.so.6.0.25'),),\n@@ -114,11 +115,13 @@ class ELFTests(unittest.TestCase):\noldnames.sort()\nself.assertListEqual(newnames, newnames)\nfor oldname in oldnames:\n- if oldname[1].startswith('str_') or oldname[1].startswith('ptr_str_') or oldname[1].startswith('ptr_sub_'):\n+ if oldname[1].startswith('str_') or oldname[1].startswith('ptr_str_') \\\n+ or oldname[1].startswith('ptr_sub_') or oldname[1].startswith('sub_'):\ncontinue\nself.assertIn(oldname, newnames, msg='names: missing: %r (%r)' % (oldname, fname))\nfor newname in newnames:\n- if newname[1].startswith('str_') or newname[1].startswith('ptr_str_') or newname[1].startswith('ptr_sub_'):\n+ if newname[1].startswith('str_') or newname[1].startswith('ptr_str_') \\\n+ or newname[1].startswith('ptr_sub_') or newname[1].startswith('sub_'):\ncontinue\nself.assertIn(newname, oldnames, msg='names: new: %r (%r)' % (newname, fname))\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
unittest tweak
|
718,770 |
16.09.2019 23:37:20
| 14,400 |
b8315b4c6944b72b0968550ee6e853c9168fcf2a
|
name "plt_name" with no address.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -1336,7 +1336,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nret = []\nreturn ret\n- def makeFunctionThunk(self, fva, thname):\n+ def makeFunctionThunk(self, fva, thname, addVa=True):\n\"\"\"\nInform the workspace that a given function is considered a \"thunk\" to another.\nThis allows the workspace to process argument inheritance and several other things.\n@@ -1348,7 +1348,11 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nn = self.getName(fva)\nbase = thname.split(\".\")[-1]\n- self.makeName(fva, \"%s_%.8x\" % (base,fva))\n+ if addVa:\n+ name = \"%s_%.8x\" % (base,fva)\n+ else:\n+ name = base\n+ self.makeName(fva, name)\napi = self.getImpApi(thname)\nif api:\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/elfplt.py",
"new_path": "vivisect/analysis/elf/elfplt.py",
"diff": "@@ -141,8 +141,8 @@ def analyzeFunction(vw, funcva):\nif funcname.endswith('_%.8x' % opval):\nfuncname = funcname[:-9]\n- logger.info('makeFunctionThunk(0x%x, \"plt@%s\")', funcva, funcname)\n- vw.makeFunctionThunk(funcva, \"plt@\" + funcname)\n+ logger.info('makeFunctionThunk(0x%x, \"plt_%s\")', funcva, funcname)\n+ vw.makeFunctionThunk(funcva, \"plt_\" + funcname, addVa=False)\ndef _getNameParts(vw, name, va):\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
name "plt_name" with no address.
|
718,770 |
16.09.2019 23:43:03
| 14,400 |
9b858c745f4e1b08a65bf03f547bed6f1e288bfe
|
bugfix: libc_start_main with stopEmu()
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/libc_start_main.py",
"new_path": "vivisect/analysis/elf/libc_start_main.py",
"diff": "@@ -82,4 +82,4 @@ class AnalysisMonitor(viv_imp_monitor.AnalysisMonitor):\nif tgt == self.startmain:\nself.success = True\nself.emu = emu\n- emu.stop()\n+ emu.stopEmu()\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
bugfix: libc_start_main with stopEmu()
|
718,770 |
18.09.2019 09:46:45
| 14,400 |
fbe0c53c69c24246c8eaeca9eb8b93051974f575
|
bugfix: libc_start_main
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/libc_start_main.py",
"new_path": "vivisect/analysis/elf/libc_start_main.py",
"diff": "@@ -51,8 +51,14 @@ def analyze(vw):\nlcsm = '__libc_start_main_%.8x' % va\nif name in (lcsm, \"*.\"+lcsm):\nfor xfr, xto, xtype, xtinfo in vw.getXrefsTo(va):\n- logger.info(\"0x%x -> 0x%x\", xfr, xto)\n+ if xtype != REF_CODE:\n+ continue\n+\n+ logger.info(\"0x%x -> 0x%x (%r)\", xfr, xto, xtype)\nfuncva = vw.getFunction(xfr)\n+ if funcva is None:\n+ continue\n+\nanalyzeFunction(vw, funcva)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
bugfix: libc_start_main
|
718,770 |
18.09.2019 09:48:39
| 14,400 |
9b8ac1e1755c5f971391a30427d3b4f58da470ad
|
not sure why this wasn't complaining for me.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/libc_start_main.py",
"new_path": "vivisect/analysis/elf/libc_start_main.py",
"diff": "@@ -51,7 +51,7 @@ def analyze(vw):\nlcsm = '__libc_start_main_%.8x' % va\nif name in (lcsm, \"*.\"+lcsm):\nfor xfr, xto, xtype, xtinfo in vw.getXrefsTo(va):\n- if xtype != REF_CODE:\n+ if xtype != vivisect.REF_CODE:\ncontinue\nlogger.info(\"0x%x -> 0x%x (%r)\", xfr, xto, xtype)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
not sure why this wasn't complaining for me.
|
718,770 |
18.09.2019 13:52:24
| 14,400 |
20d02034dc58d34f9c3b245a78bba044619793e8
|
convert print -> logger.warn
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/impemu/emulator.py",
"new_path": "vivisect/impemu/emulator.py",
"diff": "@@ -328,7 +328,7 @@ class WorkspaceEmulator:\ntry:\nself.emumon.prehook(self, op, starteip)\nexcept Exception, e:\n- print(\"funcva: 0x%x opva: 0x%x: %r %r (in emumon prehook)\" % (funcva, starteip, op, e))\n+ logger.warn(\"funcva: 0x%x opva: 0x%x: %r %r (in emumon prehook)\", funcva, starteip, op, e)\nif self.emustop:\n@@ -344,7 +344,7 @@ class WorkspaceEmulator:\ntry:\nself.emumon.posthook(self, op, endeip)\nexcept Exception, e:\n- print(\"funcva: 0x%x opva: 0x%x: %r %r (in emumon posthook)\" % (funcva, starteip, op, e))\n+ logger.warn(\"funcva: 0x%x opva: 0x%x: %r %r (in emumon posthook)\", funcva, starteip, op, e)\nif self.emustop:\nreturn\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
convert print -> logger.warn
|
718,765 |
19.09.2019 10:19:55
| 14,400 |
ec21fbc406e0e3528eeed6ea2cc8f7cea8ea6f9b
|
Deal with String tables next to jump tables (where the string pointer tables were getting recognized as other portions of the jump table)
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -959,6 +959,8 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nptrbase = startva\nrdest = self.castPointer(ptrbase)\nwhile self.isValidPointer(rdest):\n+ if self.analyzePointer(rdest) in (LOC_STRING, LOC_UNI):\n+ break\nyield rdest\nptrbase += self.psize\nif len(self.getXrefsTo(ptrbase)):\n@@ -1087,8 +1089,6 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nif not tabdone.get(rdest):\ntabdone[rdest] = True\nself.addXref(va, rdest, REF_CODE, envi.BR_COND)\n- # Honestly we should be more specific, because some cases can fall through\n- # or to others and effectively overlap\nif self.getName(rdest) is None:\nself.makeName(rdest, \"case%d_%.8x\" % (i, rdest))\nelse:\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/generic/strconst.py",
"new_path": "vivisect/analysis/generic/strconst.py",
"diff": "@@ -30,13 +30,14 @@ def analyze(vw):\nif not vw.getSegment(ref):\ncontinue\n- sz = vw.detectString(ref)\n- if sz > 0:\n- vw.addLocation(ref, sz, LOC_STRING)\n- else:\n+ # Look for Unicode before ASCII to catch UTF-16 LE.\nsz = vw.detectUnicode(ref)\nif sz > 0:\nvw.addLocation(ref, sz, LOC_UNI)\n+ else:\n+ sz = vw.detectString(ref)\n+ if sz > 0:\n+ vw.addLocation(ref, sz, LOC_STRING)\nva += len(op)\nreturn\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/base.py",
"new_path": "vivisect/base.py",
"diff": "@@ -761,6 +761,9 @@ class VivCodeFlowContext(e_codeflow.CodeFlowContext):\nreturn False\nif self._mem.getLocation(tableva) == None:\n+ # Deal with string tables\n+ if self._mem.analyzePointer(destva) in (LOC_STRING, LOC_UNI):\n+ return False\nself._mem.makePointer(tableva, tova=destva, follow=False)\nreturn True\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/testvivisect.py",
"new_path": "vivisect/tests/testvivisect.py",
"diff": "@@ -7,31 +7,82 @@ import vivisect.tests.helpers as helpers\nclass VivisectTest(unittest.TestCase):\n+ @classmethod\n+ def setUpClass(cls):\n+ cls.chgrp_vw = helpers.getTestWorkspace('linux', 'i386', 'chgrp.llvm')\n+ cls.vdir_vw = helpers.getTestWorkspace('linux', 'i386', 'vdir.llvm')\ndef test_consecutive_jump_table(self):\n- vw = helpers.getTestWorkspace('linux', 'i386', 'chgrp.llvm')\n-\nprimaryJumpOpVa = 0x804c9b6\nsecondJumpOpVa = 0x804ca2b\n- pfva = vw.getFunction(primaryJumpOpVa)\n- sfva = vw.getFunction(secondJumpOpVa)\n+ pfva = self.chgrp_vw.getFunction(primaryJumpOpVa)\n+ sfva = self.chgrp_vw.getFunction(secondJumpOpVa)\nself.assertEqual(pfva, sfva)\nself.assertTrue(pfva is not None)\n# 2 actual codeblocks and 1 xref to the jumptable itself\n- prefs = vw.getXrefsFrom(primaryJumpOpVa)\n+ prefs = self.chgrp_vw.getXrefsFrom(primaryJumpOpVa)\nself.assertEqual(len(prefs), 3)\n- cmnt = vw.getComment(0x804c9bd)\n+ cmnt = self.chgrp_vw.getComment(0x804c9bd)\nself.assertEqual(cmnt, 'Other Case(s): 2, 6, 8, 11, 15, 20, 21, 34, 38, 40, 47')\n# 13 actual codeblocks and 1 xref to the jumptable itself\n- srefs = vw.getXrefsFrom(secondJumpOpVa)\n+ srefs = self.chgrp_vw.getXrefsFrom(secondJumpOpVa)\nself.assertEqual(len(srefs), 14)\n- cmnt = vw.getComment(0x804ca4a)\n+ cmnt = self.chgrp_vw.getComment(0x804ca4a)\nself.assertEqual(cmnt, 'Other Case(s): 41')\n+ def test_jumptable_adjacent_strings(self):\n+ jmpop = 0x804abc7\n+ cases = list(map(lambda k: k[1], self.chgrp_vw.getXrefsFrom(jmpop)))\n+ self.assertEqual(len(cases), 11)\n+\n+ casevas = [\n+ 0x804ac76,\n+ 0x804ac88,\n+ 0x804ac98,\n+ 0x804ac86,\n+ 0x804ac8a,\n+ 0x804b671,\n+ 0x804ac56,\n+ 0x804acd6,\n+ 0x804abce,\n+ 0x804abf4,\n+ 0x805162c\n+ ]\n+ self.assertEqual(casevas, cases)\n+\n+ strlocs = [\n+ (0x8051930, 8, 2, 'literal\\x00'),\n+ (0x8051938, 6, 2, 'shell\\x00'),\n+ (0x805193e, 13, 2, 'shell-always\\x00'),\n+ (0x805194b, 13, 2, 'shell-escape\\x00'),\n+ (0x8051958, 20, 2, 'shell-escape-always\\x00'),\n+ (0x805196c, 8, 2, 'c-maybe\\x00'),\n+ (0x8051974, 8, 2, 'clocale\\x00'),\n+ ]\n+ for lva, lsize, ltype, lstr in strlocs:\n+ loctup = self.chgrp_vw.getLocation(lva)\n+ self.assertEqual(loctup[0], lva)\n+ self.assertEqual(lsize, loctup[1])\n+ self.assertEqual(ltype, loctup[2])\n+ self.assertEqual(lstr, self.chgrp_vw.readMemory(lva, lsize))\n+\n+ def test_non_codeblock(self):\n+ '''\n+ So these VAs used to be recognized as codeblocks, which is not correct.\n+ <va> should be actually be a VA in the middle of a string\n+ <strtbl> should be a table of *string* pointers, not code block pointers\n+ '''\n+ va = 0x0805b6f2\n+ loctup = self.vdir_vw.getLocation(va)\n+ self.assertEqual((134592163, 86, 2, None), loctup)\n+\n+ strtbl = 0x805e75c\n+ loctup = self.vdir_vw.getLocation(strtbl)\n+ self.assertEqual(loctup, (strtbl, 4, 4, None))\n+\ndef test_consecutive_jump_table_diff_func(self):\n- vw = helpers.getTestWorkspace('linux', 'i386', 'vdir.llvm')\njumptabl = [\n0x8059718,\n0x8059b68,\n@@ -58,11 +109,11 @@ class VivisectTest(unittest.TestCase):\n]\nfor i, tablva in enumerate(jumptabl):\n- refva = vw.getXrefsTo(tablva)\n+ refva = self.vdir_vw.getXrefsTo(tablva)\nself.assertEqual(len(refva), 1)\nrefva = refva[0]\n- func = vw.getFunction(refva[0])\n- refs = vw.getXrefsFrom(refva[0])\n+ func = self.vdir_vw.getFunction(refva[0])\n+ refs = self.vdir_vw.getXrefsFrom(refva[0])\ntest = ans[i]\nself.assertEqual(refva[0], test[0])\nself.assertEqual(func, test[1])\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Deal with String tables next to jump tables (where the string pointer tables were getting recognized as other portions of the jump table)
|
718,770 |
20.09.2019 17:48:58
| 14,400 |
8057f54fb9aa9b9aa7823976040e142d6c078a52
|
work on VCVT emu
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/emu.py",
"new_path": "envi/archs/arm/emu.py",
"diff": "@@ -820,7 +820,7 @@ class ArmEmulator(ArmRegisterContext, envi.Emulator):\nif len(op.opers) == 3:\nfor reg in range(regcnt):\n#frac_bits = 64 - op.opers[2].val\n-\n+ # pA8_870\nif op.simdflags & IFS_F32_S32:\npass\nelif op.simdflags & IFS_F32_U32:\n@@ -830,10 +830,45 @@ class ArmEmulator(ArmRegisterContext, envi.Emulator):\nelif op.simdflags & IFS_U32_F32:\npass\n+ # pA8_872\n+ elif op.simdflags & IFS_U16_F32:\n+ pass\n+ elif op.simdflags & IFS_S16_F32:\n+ pass\n+ elif op.simdflags & IFS_U32_F32:\n+ pass\n+ elif op.simdflags & IFS_S32_F32:\n+ pass\n+ elif op.simdflags & IFS_U16_F64:\n+ pass\n+ elif op.simdflags & IFS_S16_F64:\n+ pass\n+ elif op.simdflags & IFS_U32_F64:\n+ pass\n+ elif op.simdflags & IFS_S32_F64:\n+ pass\n+\n+ elif op.simdflags & IFS_F32_U16:\n+ pass\n+ elif op.simdflags & IFS_F32_S16:\n+ pass\n+ elif op.simdflags & IFS_F32_U32:\n+ pass\n+ elif op.simdflags & IFS_F32_S32:\n+ pass\n+ elif op.simdflags & IFS_F64_U16:\n+ pass\n+ elif op.simdflags & IFS_F64_S16:\n+ pass\n+ elif op.simdflags & IFS_F64_U32:\n+ pass\n+ elif op.simdflags & IFS_F64_S32:\n+ pass\n+\nelif len(op.opers) == 2:\nfor reg in range(regcnt):\n#frac_bits = 64 - op.opers[1].val\n-\n+ # pA8_866\nif op.simdflags & IFS_F32_S32:\npass\nelif op.simdflags & IFS_F32_U32:\n@@ -842,14 +877,37 @@ class ArmEmulator(ArmRegisterContext, envi.Emulator):\npass\nelif op.simdflags & IFS_U32_F32:\npass\n+\n+ # pA8-868\nelif op.simdflags & IFS_F64_S32:\npass\nelif op.simdflags & IFS_F64_U32:\npass\n+ elif op.simdflags & IFS_F32_S32:\n+ pass\n+ elif op.simdflags & IFS_F32_U32:\n+ pass\n+\nelif op.simdflags & IFS_S32_F64:\npass\nelif op.simdflags & IFS_U32_F64:\npass\n+ elif op.simdflags & IFS_S32_F32:\n+ pass\n+ elif op.simdflags & IFS_U32_F32:\n+ pass\n+\n+ # pA8-874\n+ elif op.simdflags & IFS_F64_F32:\n+ pass\n+ elif op.simdflags & IFS_F32_F64:\n+ pass\n+\n+ # pA8-876\n+ elif op.simdflags & IFS_F16_F32:\n+ pass\n+ elif op.simdflags & IFS_F32_F16:\n+ pass\nelse:\nraise Exception(\"i_vcvt with strange number of opers: %r\" % op.opers)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
work on VCVT emu
|
718,765 |
26.09.2019 12:04:07
| 14,400 |
44d5c92c12e1681bc71ae6a200dc25b15c982a9d
|
rework fix a bit, add no return api for abort
|
[
{
"change_type": "MODIFY",
"old_path": "envi/codeflow.py",
"new_path": "envi/codeflow.py",
"diff": "@@ -178,24 +178,18 @@ class CodeFlowContext(object):\ntry:\n# Handle a table branch by adding more branches...\nptrfmt = ('<P', '>P')[self._mem.getEndian()]\n+ # most if not all of the work to construct jump tables is done in makeOpcode\nif bflags & envi.BR_TABLE:\nif self._cf_exptable:\nptrbase = bva\n- bdest = self._mem.readMemoryFormat(ptrbase, ptrfmt)[0]\n- tabdone = {}\n- while self._mem.isValidPointer(bdest):\n-\n- if self._cb_branchtable(bva, ptrbase, bdest) == False:\n+ tabdone = set()\n+ for bdest in self._mem.iterJumpTable(ptrbase):\n+ if not self._cb_branchtable(bva, ptrbase, bdest):\nbreak\n-\n- if not tabdone.get(bdest):\n- tabdone[bdest] = True\n+ if bdest not in tabdone:\n+ tabdone.add(bdest)\nbranches.append((bdest, envi.BR_COND))\n-\nptrbase += self._mem.psize\n- if not self._mem.isValidPointer(ptrbase):\n- break\n- bdest = self._mem.readMemoryFormat(ptrbase, ptrfmt)[0]\ncontinue\nif bflags & envi.BR_DEREF:\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -961,6 +961,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nwhile self.isValidPointer(rdest):\nif self.analyzePointer(rdest) in (LOC_STRING, LOC_UNI):\nbreak\n+\nyield rdest\nptrbase += self.psize\nif len(self.getXrefsTo(ptrbase)):\n@@ -1078,7 +1079,8 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nrefva, refsize, reftype, refinfo = self.getLocation(xrfrom)\nif reftype != vivisect.LOC_OP:\ncontinue\n-\n+ if refva == op.va:\n+ continue\nrefop = self.parseOpcode(refva)\nfor refbase, refbflags in refop.getBranches():\nif refbflags & envi.BR_TABLE:\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/base.py",
"new_path": "vivisect/base.py",
"diff": "@@ -761,9 +761,6 @@ class VivCodeFlowContext(e_codeflow.CodeFlowContext):\nreturn False\nif self._mem.getLocation(tableva) == None:\n- # Deal with string tables\n- if self._mem.analyzePointer(destva) in (LOC_STRING, LOC_UNI):\n- return False\nself._mem.makePointer(tableva, tova=destva, follow=False)\nreturn True\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -106,6 +106,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nvw.setMeta('DefaultCall', archcalls.get(arch,'unknown'))\nvw.addNoReturnApi(\"*.exit\")\n+ vw.addNoReturnApi(\"*.abort\")\n# Base addr is earliest section address rounded to pagesize\n# NOTE: This is only for prelink'd so's and exe's. Make something for old style so.\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/testvivisect.py",
"new_path": "vivisect/tests/testvivisect.py",
"diff": "@@ -68,14 +68,41 @@ class VivisectTest(unittest.TestCase):\nself.assertEqual(ltype, loctup[2])\nself.assertEqual(lstr, self.chgrp_vw.readMemory(lva, lsize))\n+ def test_libfunc_meta_equality(self):\n+ '''\n+ both vdir and chgrp have a bunch of library ufunctions in common, and while the addresses\n+ may be off, other information like # of blocks, # of xrefs from each block, etc.\n+ '''\n+ vdir_fva = 0x8055bb0\n+ chgp_fva = 0x804ab30\n+\n+ vmeta = self.vdir_vw.getFunctionMetaDict(vdir_fva)\n+ cmeta = self.chgrp_vw.getFunctionMetaDict(chgp_fva)\n+\n+ self.assertEqual(vmeta['InstructionCount'], cmeta['InstructionCount'])\n+ self.assertEqual(vmeta['InstructionCount'], 868)\n+\n+ self.assertEqual(vmeta['BlockCount'], cmeta['BlockCount'])\n+ self.assertEqual(vmeta['BlockCount'], 261)\n+\n+ self.assertEqual(vmeta['Size'], cmeta['Size'])\n+ self.assertEqual(vmeta['Size'], 3154) # or 877?\n+\n+ self.assertEqual(vmeta['MnemDist'], cmeta['MnemDist'])\n+\n+ self.assertEqual(vmeta['Recursive'], cmeta['Recursive'])\n+ self.assertTrue(vmeta['Recursive'])\n+\n+\ndef test_non_codeblock(self):\n'''\nSo these VAs used to be recognized as codeblocks, which is not correct.\n<va> should be actually be a VA in the middle of a string\n<strtbl> should be a table of *string* pointers, not code block pointers\n'''\n- va = 0x0805b6f2\n- loctup = self.vdir_vw.getLocation(va)\n+ opva = 0x805633c\n+ badva = 0x0805b6f2\n+ loctup = self.vdir_vw.getLocation(badva)\nself.assertEqual((134592163, 86, 2, None), loctup)\nstrtbl = 0x805e75c\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
rework fix a bit, add no return api for abort
|
718,765 |
26.09.2019 12:26:54
| 14,400 |
83df1008aedf27daea1626ae1fcaa5a19f0ef562
|
forgot a bit
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -964,7 +964,7 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nyield rdest\nptrbase += self.psize\n- if len(self.getXrefsTo(ptrbase)):\n+ if len(self.getXrefsTo(ptrbase)) or self.analyzePointer(ptrbase) in (LOC_STRING, LOC_UNI):\nbreak\nrdest = self.castPointer(ptrbase)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
forgot a bit
|
718,770 |
28.09.2019 18:11:30
| 14,400 |
cd131951309b4c1d58fe993bb41338fd2b32ce22
|
add getFormat() to envi.bits for consistency and ease-of-use.
|
[
{
"change_type": "MODIFY",
"old_path": "envi/bits.py",
"new_path": "envi/bits.py",
"diff": "@@ -150,9 +150,16 @@ master_fmts = (fmt_chars, fmt_schars)\nfmt_sizes = (None,1,2,4,4,8,8,8,8)\n+def getFormat(size, big_endian=False, signed=False):\n+ '''\n+ Returns the proper struct format for numbers up to 8 bytes in length\n+ Endianness and Signedness aware.\n-fmt_schars = (le_fmt_schars, be_fmt_schars)\n-\n+ Only useful for *full individual* numbers... ie. 1, 2, 4, 8. Numbers\n+ of 24-bits (3), 40-bit (5), 48-bits (6) or 56-bits (7) are not accounted\n+ for here and will return None.\n+ '''\n+ return master_fmts[signed][big_endian][size]\ndef parsebytes(bytes, offset, size, sign=False, bigend=False):\n\"\"\"\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
add getFormat() to envi.bits for consistency and ease-of-use.
|
718,765 |
30.09.2019 11:38:14
| 14,400 |
a7ae2cfab51a55dc8da18dd3a060974f72510a31
|
fixups as per atlas
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -955,21 +955,28 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nreturn self.imem_archs[(arch & envi.ARCH_MASK) >> 16].archParseOpcode(b, off, va)\n- def iterJumpTable(self, startva):\n+ def iterJumpTable(self, startva, step=None, maxiters=None):\n+ if not step:\n+ step = self.psize\n+ iters = 0\nptrbase = startva\nrdest = self.castPointer(ptrbase)\n- while self.isValidPointer(rdest) and self.analyzePointer(rdest) not in (LOC_STRING, LOC_UNI):\n+ while self.isValidPointer(rdest) and self.analyzePointer(rdest) in (None, LOC_OP):\nif self.analyzePointer(ptrbase) in (LOC_STRING, LOC_UNI):\nbreak\nyield rdest\n- ptrbase += self.psize\n+ ptrbase += step\nif len(self.getXrefsTo(ptrbase)):\nbreak\nrdest = self.castPointer(ptrbase)\n+ iters += 1\n+ if maxiters is not None and iters >= maxiters:\n+ break\n+\ndef moveCodeBlock(self, cbva, newfva):\ncb = self.getCodeBlock(cbva)\n@@ -1081,6 +1088,8 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nrefva, refsize, reftype, refinfo = self.getLocation(xrfrom)\nif reftype != vivisect.LOC_OP:\ncontinue\n+ # If we've already seen this jump table from somewhere else, there's no need to split\n+ # the codeblock, so just move on\nif refva == op.va:\ncontinue\nrefop = self.parseOpcode(refva)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
fixups as per atlas
|
718,765 |
30.09.2019 16:48:20
| 14,400 |
79bbefe9f9b15a31a379e46dd0cd48ea17dcf1fe
|
comment and condition change
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -961,8 +961,9 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\niters = 0\nptrbase = startva\nrdest = self.castPointer(ptrbase)\n+ STOP_LOCS = (LOC_STRING, LOC_UNI, LOC_STRUCT, LOC_CLSID, LOC_VFTABLE, LOC_IMPORT, LOC_PAD, LOC_NUMBER)\nwhile self.isValidPointer(rdest) and self.analyzePointer(rdest) in (None, LOC_OP):\n- if self.analyzePointer(ptrbase) in (LOC_STRING, LOC_UNI):\n+ if self.analyzePointer(ptrbase) in STOP_LOCS:\nbreak\nyield rdest\n@@ -1088,8 +1089,9 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nrefva, refsize, reftype, refinfo = self.getLocation(xrfrom)\nif reftype != vivisect.LOC_OP:\ncontinue\n- # If we've already seen this jump table from somewhere else, there's no need to split\n- # the codeblock, so just move on\n+ # If we've already constructed this opcode location and made the xref to the new codeblock,\n+ # that should mean we've already made the jump table, so there should be no need to split this\n+ # jump table.\nif refva == op.va:\ncontinue\nrefop = self.parseOpcode(refva)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
comment and condition change
|
718,765 |
01.10.2019 15:35:19
| 14,400 |
f2c889114c61752a43a583630c2fa5dcfb1280cf
|
more cleanup per atlas
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -50,9 +50,13 @@ from vivisect.defconfig import *\nimport vivisect.analysis.generic.emucode as v_emucode\n+STOP_LOCS = (LOC_STRING, LOC_UNI, LOC_STRUCT, LOC_CLSID, LOC_VFTABLE, LOC_IMPORT, LOC_PAD, LOC_NUMBER)\n+\n+\ndef guid(size=16):\nreturn hexlify(os.urandom(size))\n+\nclass VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\ndef __init__(self):\n@@ -961,7 +965,6 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\niters = 0\nptrbase = startva\nrdest = self.castPointer(ptrbase)\n- STOP_LOCS = (LOC_STRING, LOC_UNI, LOC_STRUCT, LOC_CLSID, LOC_VFTABLE, LOC_IMPORT, LOC_PAD, LOC_NUMBER)\nwhile self.isValidPointer(rdest) and self.analyzePointer(rdest) in (None, LOC_OP):\nif self.analyzePointer(ptrbase) in STOP_LOCS:\nbreak\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
more cleanup per atlas
|
718,765 |
14.10.2019 22:49:31
| 14,400 |
e85b712eb674b0138d0918754a5b00443c2c032c
|
fix issue with idempotence of detectString *only* (our unicode detection is a another beast entirely). Also fix issue in UI where we had the same string showing up multiple times
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -834,6 +834,8 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\nloc = self.getLocation(va+count)\nif loc is not None:\nif loc[L_LTYPE] == LOC_STRING:\n+ if loc[L_VA] == va:\n+ return loc[L_SIZE]\nreturn loc[L_VA] - (va + count) + loc[L_SIZE]\nreturn -1\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/generic/strconst.py",
"new_path": "vivisect/analysis/generic/strconst.py",
"diff": "from vivisect.const import *\n+STRTYPES = (LOC_UNI, LOC_STRING)\n+\n+\ndef analyze(vw):\n'''\nFind string constants used in function calls and add them to the\n@@ -21,6 +24,11 @@ def analyze(vw):\ncontinue\nref = o.getOperValue(op, None)\n+ # we've already processed this one\n+ loc = vw.getLocation(ref)\n+ if loc is not None and loc[L_LTYPE] in STRTYPES:\n+ continue\n+\n# Candidates will be listed with the Xrefs thanks to\n# logic in makeOpcode().\nif not (vw.getXrefsTo(ref) and vw.getXrefsFrom(va)):\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
fix issue with idempotence of detectString *only* (our unicode detection is a another beast entirely). Also fix issue in UI where we had the same string showing up multiple times
|
718,770 |
22.10.2019 17:17:38
| 14,400 |
5d86a07b60a428776c91004940c10e64f5389cbb
|
bugfixes with automated 64-bit ELF structure parsing
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -60,8 +60,9 @@ def makeSymbolTable(vw, va, maxva):\ndef makeDynamicTable(vw, va, maxva):\nret = []\n+ sname = 'elf.Elf%dDynamic' % (vw.getPointerSize() * 8)\nwhile va < maxva:\n- s = vw.makeStructure(va, \"elf.Elf32Dynamic\")\n+ s = vw.makeStructure(va, sname)\nret.append(s)\ndtag = s.d_tag\ndtype = Elf.dt_types.get(dtag, \"Unknown Dynamic Type\")\n@@ -71,9 +72,14 @@ def makeDynamicTable(vw, va, maxva):\nbreak\nreturn ret\n-def makeRelocTable(vw, va, maxva, addbase, baseaddr):\n+def makeRelocTable(vw, va, maxva, addbase, baseaddr, addend=False):\n+ if addend:\n+ sname = 'elf.Elf%dReloca' % (vw.getPointerSize() * 8)\n+ else:\n+ sname = 'elf.Elf%dReloc' % (vw.getPointerSize() * 8)\n+\nwhile va < maxva:\n- s = vw.makeStructure(va, \"elf.Elf32Reloc\")\n+ s = vw.makeStructure(va, sname)\ntname = Elf.r_types_386.get(Elf.getRelocType(s.r_info), \"Unknown Type\")\nvw.setComment(va, tname)\nva += len(s)\n@@ -350,6 +356,9 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nelif sec.sh_type == Elf.SHT_REL:\nmakeRelocTable(vw, sva, sva+size, addbase, baseaddr)\n+ elif sec.sh_type == Elf.SHT_RELA:\n+ makeRelocTable(vw, sva, sva+size, addbase, baseaddr, addend=True)\n+\nif sec.sh_flags & Elf.SHF_STRINGS:\nmakeStringTable(vw, sva, sva+size)\n@@ -521,7 +530,8 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nnew_functions.append((\"ELF Entry\", eentry))\nif vw.isValidPointer(baseaddr):\n- vw.makeStructure(baseaddr, \"elf.Elf32\")\n+ sname = 'elf.Elf%d' % (vw.getPointerSize() * 8)\n+ vw.makeStructure(baseaddr, sname)\n# mark all the entry points for analysis later\nfor cmnt, fva in new_functions:\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/linux_amd64_libstdc_data.py",
"new_path": "vivisect/tests/linux_amd64_libstdc_data.py",
"diff": "@@ -7452,7 +7452,6 @@ libstdc_data = {\n],\n'names' : [\n- (0x2084b72, u'libstdc___so_6_0.ptr_std::istreambuf_iterator<wchar_t, std::char_traits<wchar_t> > std::num_get<wchar_t, std::istreambuf_iterator<wchar_t, std::char_traits<wchar_t> > >::_M_extract_int<unsigned int>(std::istreambuf_iterator<wchar_t, std::char_traits<wchar_t> >, std::istreambuf_iterator<wchar_t, std::char_traits<wchar_t> >, std::ios_base&, std::_Ios_Iostate&, unsigned int&) const_02084b72'),\n(0x2088480, 'libstdc___so_6_0.init_function'),\n(0x20884b0, u'plt___cxa_allocate_dependent_exception'),\n(0x20884c0, u'plt_std::__cxx11::basic_string<wchar_t, std::char_traits<wchar_t>, std::allocator<wchar_t> >::find_last_not_of(wchar_t const*, unsigned long, unsigned long) const'),\n@@ -8279,7 +8278,6 @@ libstdc_data = {\n(0x208b810, u'plt_operator delete[](void*)'),\n(0x208b820, u'plt_std::overflow_error::~overflow_error()'),\n(0x208b830, u'plt_std::regex_error::~regex_error()'),\n- (0x208b838, u'operator new[](unsigned long)_0208b838'),\n(0x208b840, u'plt___cxa_finalize'),\n(0x208b850, u'plt_std::bad_array_new_length::~bad_array_new_length()'),\n(0x208b860, u'plt_std::bad_cast::~bad_cast()'),\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/tests/linux_amd64_ls_data.py",
"new_path": "vivisect/tests/linux_amd64_ls_data.py",
"diff": "@@ -128,118 +128,6 @@ ls_data = {\n],\n'names' : [\n- (0x401550, u'ptr___gmon_start___00401550'),\n- (0x401568, u'ls.ptr_program_invocation_short_name_00401568'),\n- (0x401580, u'ls.ptr_stdout_00401580'),\n- (0x401598, u'ls.ptr_optind_00401598'),\n- (0x4015b0, u'ls.ptr_optarg_004015b0'),\n- (0x4015c8, u'ls.ptr___progname_full_004015c8'),\n- (0x4015e0, u'ls.ptr_stderr_004015e0'),\n- (0x4015f8, u'ptr___ctype_toupper_loc_004015f8'),\n- (0x401610, u'ptr_getenv_00401610'),\n- (0x401628, u'ptr_sigprocmask_00401628'),\n- (0x401640, u'ptr_raise_00401640'),\n- (0x401658, u'ptr_free_00401658'),\n- (0x401670, u'ptr_localtime_00401670'),\n- (0x401688, u'ptr___mempcpy_chk_00401688'),\n- (0x4016a0, u'ptr_abort_004016a0'),\n- (0x4016b8, u'ptr___errno_location_004016b8'),\n- (0x4016d0, u'ptr_strncpy_004016d0'),\n- (0x4016e8, u'ptr_strncmp_004016e8'),\n- (0x401700, u'ptr__exit_00401700'),\n- (0x401718, u'ptr_strcpy_00401718'),\n- (0x401730, u'ptr___fpending_00401730'),\n- (0x401748, u'ptr_isatty_00401748'),\n- (0x401760, u'ptr_sigaction_00401760'),\n- (0x401778, u'ptr_iswcntrl_00401778'),\n- (0x401790, u'ptr_wcswidth_00401790'),\n- (0x4017a8, u'ptr_localeconv_004017a8'),\n- (0x4017c0, u'ptr_mbstowcs_004017c0'),\n- (0x4017d8, u'ptr_readlink_004017d8'),\n- (0x4017f0, u'ptr_textdomain_004017f0'),\n- (0x401808, u'ptr_fclose_00401808'),\n- (0x401820, u'ptr_opendir_00401820'),\n- (0x401838, u'ptr_getpwuid_00401838'),\n- (0x401850, u'ptr_bindtextdomain_00401850'),\n- (0x401868, u'ptr_stpcpy_00401868'),\n- (0x401880, u'ptr_dcgettext_00401880'),\n- (0x401898, u'ptr___ctype_get_mb_cur_max_00401898'),\n- (0x4018b0, u'ptr_strlen_004018b0'),\n- (0x4018c8, u'ptr___lxstat_004018c8'),\n- (0x4018e0, u'ptr___stack_chk_fail_004018e0'),\n- (0x4018f8, u'ptr_getopt_long_004018f8'),\n- (0x401910, u'ptr_mbrtowc_00401910'),\n- (0x401928, u'ptr_strchr_00401928'),\n- (0x401940, u'ptr_getgrgid_00401940'),\n- (0x401958, u'ptr__obstack_begin_00401958'),\n- (0x401970, u'ptr___overflow_00401970'),\n- (0x401988, u'ptr_strrchr_00401988'),\n- (0x4019a0, u'ptr_fgetfilecon_004019a0'),\n- (0x4019b8, u'ptr_lseek_004019b8'),\n- (0x4019d0, u'ptr_gettimeofday_004019d0'),\n- (0x4019e8, u'ptr___assert_fail_004019e8'),\n- (0x401a00, u'ptr___strtoul_internal_00401a00'),\n- (0x401a18, u'ptr_fnmatch_00401a18'),\n- (0x401a30, u'ptr_memset_00401a30'),\n- (0x401a48, u'ptr_acl_get_tag_type_00401a48'),\n- (0x401a60, u'ptr_ioctl_00401a60'),\n- (0x401a78, u'ptr_closedir_00401a78'),\n- (0x401a90, u'ptr___libc_start_main_00401a90'),\n- (0x401aa8, u'ptr_memcmp_00401aa8'),\n- (0x401ac0, u'ptr__setjmp_00401ac0'),\n- (0x401ad8, u'ptr_fputs_unlocked_00401ad8'),\n- (0x401af0, u'ptr_calloc_00401af0'),\n- (0x401b08, u'ptr_lgetfilecon_00401b08'),\n- (0x401b20, u'ptr_strcmp_00401b20'),\n- (0x401b38, u'ptr_signal_00401b38'),\n- (0x401b50, u'ptr_dirfd_00401b50'),\n- (0x401b68, u'ptr_getpwnam_00401b68'),\n- (0x401b80, u'ptr___memcpy_chk_00401b80'),\n- (0x401b98, u'ptr_sigemptyset_00401b98'),\n- (0x401bb0, u'ptr_memcpy_00401bb0'),\n- (0x401bc8, u'ptr_getgrnam_00401bc8'),\n- (0x401be0, u'ptr_getfilecon_00401be0'),\n- (0x401bf8, u'ptr_fileno_00401bf8'),\n- (0x401c10, u'ptr_tcgetpgrp_00401c10'),\n- (0x401c28, u'ptr___xstat_00401c28'),\n- (0x401c40, u'ptr_readdir_00401c40'),\n- (0x401c58, u'ptr_wcwidth_00401c58'),\n- (0x401c70, u'ptr_malloc_00401c70'),\n- (0x401c88, u'ptr_fflush_00401c88'),\n- (0x401ca0, u'ptr_nl_langinfo_00401ca0'),\n- (0x401cb8, u'ptr___fxstat_00401cb8'),\n- (0x401cd0, u'ptr_clock_gettime_00401cd0'),\n- (0x401ce8, u'ptr_strcoll_00401ce8'),\n- (0x401d00, u'ptr_mktime_00401d00'),\n- (0x401d18, u'ptr___freading_00401d18'),\n- (0x401d30, u'ptr_fwrite_unlocked_00401d30'),\n- (0x401d48, u'ptr_acl_get_entry_00401d48'),\n- (0x401d60, u'ptr_realloc_00401d60'),\n- (0x401d78, u'ptr_setlocale_00401d78'),\n- (0x401d90, u'ptr__obstack_newchunk_00401d90'),\n- (0x401da8, u'ptr___printf_chk_00401da8'),\n- (0x401dc0, u'ptr_strftime_00401dc0'),\n- (0x401dd8, u'ptr_mempcpy_00401dd8'),\n- (0x401df0, u'ptr_memmove_00401df0'),\n- (0x401e08, u'ptr_error_00401e08'),\n- (0x401e20, u'ptr_acl_extended_file_nofollow_00401e20'),\n- (0x401e38, u'ptr_fseeko_00401e38'),\n- (0x401e50, u'ptr_strtoul_00401e50'),\n- (0x401e68, u'ptr___cxa_atexit_00401e68'),\n- (0x401e80, u'ptr_wcstombs_00401e80'),\n- (0x401e98, u'ptr_freecon_00401e98'),\n- (0x401eb0, u'ptr_sigismember_00401eb0'),\n- (0x401ec8, u'ptr_exit_00401ec8'),\n- (0x401ee0, u'ptr_fwrite_00401ee0'),\n- (0x401ef8, u'ptr___fprintf_chk_00401ef8'),\n- (0x401f10, u'ptr_fflush_unlocked_00401f10'),\n- (0x401f28, u'ptr_mbsinit_00401f28'),\n- (0x401f40, u'ptr_iswprint_00401f40'),\n- (0x401f58, u'ptr_sigaddset_00401f58'),\n- (0x401f70, u'ptr_strstr_00401f70'),\n- (0x401f88, u'ptr___ctype_tolower_loc_00401f88'),\n- (0x401fa0, u'ptr___ctype_b_loc_00401fa0'),\n- (0x401fb8, u'ptr___sprintf_chk_00401fb8'),\n(0x401fd0, u'ls._init'),\n(0x402000, u'plt___ctype_toupper_loc'),\n(0x402010, u'plt_getenv'),\n@@ -348,8 +236,6 @@ ls_data = {\n(0x402680, u'plt___sprintf_chk'),\n(0x4045a4, 'ls.__entry'),\n(0x4117f8, u'ls._fini'),\n- (0x618f10, u'ptr_ptr___ctype_toupper_loc_00618f10'),\n- (0x618f20, u'ptr_ptr___gmon_start___00618f20'),\n(0x618fd8, u'*.__gmon_start___00618fd8'),\n(0x619000, u'*.__ctype_toupper_loc_00619000'),\n(0x619008, u'*.getenv_00619008'),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
bugfixes with automated 64-bit ELF structure parsing
|
718,770 |
22.10.2019 23:08:04
| 14,400 |
022cf4f109b3342803ebbd90b230958b9ed25d94
|
uncommenting safety checks for PLT analysis module.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/elfplt.py",
"new_path": "vivisect/analysis/elf/elfplt.py",
"diff": "@@ -59,13 +59,13 @@ def analyzeFunction(vw, funcva):\nseg = vw.getSegment(funcva)\nif seg is None:\nlogger.info('not analyzing 0x%x: no segment found', funcva)\n- #return\n+ return\nelse:\nsegva, segsize, segname, segfname = seg\nif segname not in (\".plt\", \".plt.got\"):\nlogger.warn('0x%x: not part of \".plt\" or \".plt.got\"', funcva)\n- #return\n+ return\nlogger.info('analyzing PLT function: 0x%x', funcva)\ncount = 0\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
uncommenting safety checks for PLT analysis module.
|
718,770 |
22.10.2019 23:10:49
| 14,400 |
71af322efa5aff7140b4fb265b0f61a5dc5d5db9
|
less crazy comments for DYNAMICs and DYNSYMs
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -370,7 +370,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nname = name.split('.')[0].lower()\nvw.addLibraryDependancy(name)\nelse:\n- logger.debug(\"DYNAMIC DYNAMIC DYNAMIC\\t%r\",d)\n+ logger.debug(\"DYNAMIC:\\t%r\",d)\nelfmeta[Elf.dt_names.get(d.d_tag)] = d.d_value\n@@ -440,7 +440,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nvw.vprint('WARNING: %s' % e)\nelse:\n- logger.debug(\"DYNSYM DYNSYM\\t%r\\t%r\\t%r\\t%r\", s, s.getInfoType(), 'other', hex(s.st_other))\n+ logger.debug(\"DYNSYM:\\t%r\\t%r\\t%r\\t%r\", s, s.getInfoType(), 'other', hex(s.st_other))\nvw.addVaSet(\"FileSymbols\", ((\"Name\", VASET_STRING),(\"va\", VASET_ADDRESS)))\nvw.addVaSet(\"WeakSymbols\", ((\"Name\", VASET_STRING),(\"va\", VASET_ADDRESS)))\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
less crazy comments for DYNAMICs and DYNSYMs
|
718,770 |
22.10.2019 23:31:54
| 14,400 |
4c1329d26acacb7839f8c4508c94d8d9b75a5aab
|
removing comment which is misleading.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -598,8 +598,6 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nvw.addRelocation(rlva, vivisect.RTYPE_BASEPTR, ptr)\n# next get the target and find a name, since the reloc itself doesn't have one\n- # FIXME: this doesn't actually do anything, since naming of PLT functions doesn't happen until later\n- # should this happen during pointer analysis?\ntgt = vw.readMemoryPtr(rlva)\ntgtname = vw.getName(tgt)\nif tgtname is not None:\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
removing comment which is misleading.
|
718,770 |
25.10.2019 20:45:40
| 14,400 |
d1a3cbfcd49384bcc6bee723dc8278bc3cbe9364
|
reduce duplicate name-manipulation code.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -2624,6 +2624,56 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\n\"\"\"\nreturn self.colormaps.get(mapname)\n+ def _getNameParts(self, name, va):\n+ '''\n+ Return the given name in three parts:\n+ fpart: filename, if applicable (for file-local names)\n+ npart: base name\n+ vapart: address, if tacked on the end\n+\n+ If any of these are not applicable, they will return None for that field.\n+ '''\n+ fpart = None\n+ npart = name\n+ vapart = None\n+ fname = self.getFileByVa(va)\n+ vastr = '_%.8x' % va\n+\n+ if name.startswith(fname + '.'):\n+ fpart, npart = name.split('.', 1)\n+ elif name.startswith('*.'):\n+ skip, npart = name.split('.', 1)\n+\n+ if npart.endswith(vastr) and not npart == 'sub' + vastr:\n+ npart, vapart = npart.rsplit('_', 1)\n+\n+ return fpart, npart, vapart\n+\n+\n+ def _addNamePrefix(self, name, va, prefix, joinstr=''):\n+ '''\n+ Add a prefix to the given name paying attention to the filename prefix, and\n+ any VA suffix which may exist.\n+\n+ This is used by multiple analysis modules.\n+ Uses _getNameParts.\n+ '''\n+ fpart, npart, vapart = self._getNameParts(name, va)\n+ if fpart is None and vapart is None:\n+ name = joinstr.join([prefix, npart])\n+\n+ elif vapart is None:\n+ name = fpart + '.' + joinstr.join([prefix, npart])\n+\n+ elif fpart is None:\n+ name = joinstr.join([prefix, npart])\n+\n+ else:\n+ name = fpart + '.' + joinstr.join([prefix, npart]) + '_%s' % vapart\n+ logger.debug('addNamePrefix: %r %r %r -> %r', fpart, npart, vapart, name)\n+ return name\n+\n+\n##########################################################\n#\n# The envi.symstore.resolver.SymbolResolver API...\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/elf/elfplt.py",
"new_path": "vivisect/analysis/elf/elfplt.py",
"diff": "@@ -125,7 +125,7 @@ def analyzeFunction(vw, funcva):\nlogger.info(\"PLT->PTR 0x%x: (0x%x) -> 0x%x -> 0x%x (%r)\" % (funcva, opval, tgtva, ptrva, ptrname))\nif vw.isValidPointer(ptrva):\nif funcname is None:\n- funcname = _addNamePrefix(vw, ptrname, ptrva, 'ptr', '_')\n+ funcname = vw._addNamePrefix(ptrname, ptrva, 'ptr', '_')\nelif loctup[vivisect.L_LTYPE] != vivisect.LOC_IMPORT:\nlogger.warn(\"0x%x: (0x%x) %r != %r (%r)\" % (funcva, opval, loctup[vivisect.L_LTYPE], vivisect.LOC_IMPORT, funcname))\n@@ -143,36 +143,3 @@ def analyzeFunction(vw, funcva):\nlogger.info('makeFunctionThunk(0x%x, \"plt_%s\")', funcva, funcname)\nvw.makeFunctionThunk(funcva, \"plt_\" + funcname, addVa=False)\n-\n-\n-def _getNameParts(vw, name, va):\n- fpart = None\n- npart = name\n- vapart = None\n- fname = vw.getFileByVa(va)\n- if name.startswith(fname + '.'):\n- fpart, npart = name.split('.', 1)\n- elif name.startswith('*.'):\n- skip, npart = name.split('.', 1)\n-\n- if npart.endswith('_%.8x' % va):\n- npart, vapart = npart.rsplit('_', 1)\n-\n- return fpart, npart, vapart\n-\n-\n-def _addNamePrefix(vw, name, va, prefix, joinstr=''):\n- fpart, npart, vapart = _getNameParts(vw, name, va)\n- if fpart is None and vapart is None:\n- name = joinstr.join([prefix, npart])\n-\n- elif vapart is None:\n- name = fpart + '.' + joinstr.join([prefix, npart])\n-\n- elif fpart is None:\n- name = joinstr.join([prefix, npart])\n-\n- else:\n- name = fpart + '.' + joinstr.join([prefix, npart]) + '_%s' % vapart\n- logger.debug('addNamePrefix: %r %r %r -> %r', fpart, npart, vapart, name)\n- return name\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/generic/pointers.py",
"new_path": "vivisect/analysis/generic/pointers.py",
"diff": "@@ -76,41 +76,6 @@ def analyze(vw):\ntgtname = vw.getName(tgt)\nif tgtname is not None:\n- name = _addNamePrefix(vw, tgtname, tgt, 'ptr', '_') + '_%.8x' % ptr\n+ name = vw._addNamePrefix(tgtname, tgt, 'ptr', '_') + '_%.8x' % ptr\nlogger.info(' name(0x%x): %r (%r)', tgt, tgtname, name)\nvw.makeName(ptr, name)\n-\n-\n-def _getNameParts(vw, name, va):\n- fpart = None\n- npart = name\n- vapart = None\n- fname = vw.getFileByVa(va)\n- vastr = '_%.8x' % va\n-\n- if name.startswith(fname + '.'):\n- fpart, npart = name.split('.', 1)\n- elif name.startswith('*.'):\n- skip, npart = name.split('.', 1)\n-\n- if npart.endswith(vastr) and not npart == 'sub' + vastr:\n- npart, vapart = npart.rsplit('_', 1)\n-\n- return fpart, npart, vapart\n-\n-\n-def _addNamePrefix(vw, name, va, prefix, joinstr=''):\n- fpart, npart, vapart = _getNameParts(vw, name, va)\n- if fpart is None and vapart is None:\n- name = joinstr.join([prefix, npart])\n-\n- elif vapart is None:\n- name = fpart + '.' + joinstr.join([prefix, npart])\n-\n- elif fpart is None:\n- name = joinstr.join([prefix, npart])\n-\n- else:\n- name = fpart + '.' + joinstr.join([prefix, npart]) + '_%s' % vapart\n- logger.debug('addNamePrefix: %r %r %r -> %r', fpart, npart, vapart, name)\n- return name\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
reduce duplicate name-manipulation code.
|
718,770 |
26.10.2019 10:23:49
| 14,400 |
bce6db06c387650b709c4d72d13600944bf3a00d
|
deprecated dynamics.
|
[
{
"change_type": "MODIFY",
"old_path": "Elf/__init__.py",
"new_path": "Elf/__init__.py",
"diff": "@@ -279,7 +279,7 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nself.relocvas = []\nself.symbols_by_name = {}\nself.symbols_by_addr = {}\n- self.dynamics = []\n+ self.dynamics = [] # deprecated - 2019-10-21\nself.dynamic_symbols = []\nself.dynstrtabmeta = (None, None)\nself.dynstrtab = []\n@@ -479,7 +479,8 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nself.dyns[dyn.d_tag] = dyn.d_value\nlogger.debug(\"dynamic: %r: 0x%x\", dt_names.get(dyn.d_tag), dyn.d_value)\n- # FIXME: storing info in both dyns{} and dynamics[]. Is this a problem?\n+ # DEPRECATED: storing info in both dyns{} and dynamics[].\n+ # 2019-10-21: dynamics will go away sometime in the future\nself.dynamics.append(dyn)\nif dyn.d_tag == DT_NULL: # Represents the end\nbreak\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
deprecated dynamics.
|
718,770 |
01.12.2019 01:18:34
| 18,000 |
bd41b36951f0a772d9a653df6dd0616bcfa63493
|
movsxd was using the source operand for the end-size, not the dest operand.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/symboliks/archs/amd64.py",
"new_path": "vivisect/symboliks/archs/amd64.py",
"diff": "@@ -105,7 +105,7 @@ class Amd64SymbolikTranslator(vsym_i386.IntelSymbolikTranslator):\ndef i_movsxd(self, op):\ndsize = op.opers[0].tsize\nssize = op.opers[1].tsize\n- v2 = o_sextend(self.getOperObj(op, 1), Const(ssize, self._psize))\n+ v2 = o_sextend(self.getOperObj(op, 1), Const(dsize, self._psize))\nself.setOperObj(op, 0, v2)\ndef _div(self, op, isInvalid=None):\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
movsxd was using the source operand for the end-size, not the dest operand.
|
718,770 |
04.12.2019 09:44:21
| 18,000 |
05fca5f6430a317c8eddc005bc8a185c5914feaa
|
bugfix: getDynSymbol() called when unnecessary (and sometimes don't exist)
minor cleanup
|
[
{
"change_type": "MODIFY",
"old_path": "Elf/__init__.py",
"new_path": "Elf/__init__.py",
"diff": "@@ -1022,7 +1022,6 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nsymidx indexed symbol.\n'''\nsymtabrva, symsz, symtabsz = self.getDynSymTabInfo()\n- strtabva = self.dyns.get(DT_STRTAB)\nsymrva = symtabrva + (symidx * symsz)\n# DON'T trust symtabsz. it's often smaller than the '.dynsym' section\n@@ -1051,6 +1050,7 @@ class Elf(vs_elf.Elf32, vs_elf.Elf64):\nin self.dynsymtabct. Perhaps this is horrible and should be stricken\nfrom the code.\n'''\n+ #FIXME: make this use both SECTION and PT_DYNAMICS versions...\nsymtabva = self.dyns.get(DT_SYMTAB)\nif symtabva is None:\nreturn None, None, None\n"
},
{
"change_type": "MODIFY",
"old_path": "Elf/elf_lookup.py",
"new_path": "Elf/elf_lookup.py",
"diff": "@@ -504,6 +504,8 @@ SHT_HIPROC = 0x7fffffff\nSHT_LOUSER = 0x80000000\nSHT_HIUSER = 0x8fffffff\n+sht_lookup ={y: x for x, y in globals().items() if x.startswith(\"SHT_\")}\n+\nsh_type = {\nSHT_NULL:\"Section header table entry unused\",\nSHT_PROGBITS:\"Program data\",\n@@ -573,6 +575,8 @@ STB_HIOS = 12\nSTB_LOPROC = 13\nSTB_HIPROC = 15\n+stb_lookup ={y: x for x, y in globals().items() if x.startswith(\"STB_\")}\n+\nst_info_bind = {\nSTB_LOCAL:\"Local symbol\",\nSTB_GLOBAL:\"Global symbol\",\n@@ -599,6 +603,8 @@ STT_HIPROC = 15\nSTT_GNU_IFUNC = 10\n+stt_lookup ={y: x for x, y in globals().items() if x.startswith(\"STT_\")}\n+\nst_info_type = {\nSTT_NOTYPE:\"Symbol type is unspecified\",\nSTT_OBJECT:\"Symbol is a data object\",\n@@ -615,6 +621,20 @@ st_info_type = {\nSTT_HIPROC:\"End of processor-specific\",\n}\n+STV_DEFAULT = 0\n+STV_INTERNAL = 1\n+STV_HIDDEN = 2\n+STV_PROTECTED = 3\n+\n+stv_lookup ={y: x for x, y in globals().items() if x.startswith(\"STV_\")}\n+\n+st_other_visibility = {\n+ STV_DEFAULT:\"Symbol visibility specified by binding type\",\n+ STV_INTERNAL:\"Symbol visibility is reserved\",\n+ STV_HIDDEN:\"Symbol is not visible to other objects\",\n+ STV_PROTECTED:\"Symbol is visibl by other objects, but cannot be preempted\"\n+}\n+\nDT_NULL = 0\nDT_NEEDED = 1\nDT_PLTRELSZ = 2\n@@ -687,6 +707,7 @@ DT_HIOS = 0x6ffff000\nDT_LOPROC = 0x70000000\nDT_HIPROC = 0x7fffffff\n#DT_PROCNUM = DT_MIPS_NUM\n+\ndt_names = { v:k for k,v in globals().items() if k.startswith('DT_')}\ndt_types = {\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/elf.py",
"new_path": "vivisect/parsers/elf.py",
"diff": "@@ -545,6 +545,7 @@ def loadElfIntoWorkspace(vw, elf, filename=None, baseaddr=None):\nreturn fname\n+\ndef applyRelocs(elf, vw, addbase=False, baseaddr=0):\n# process relocations / strings (relocs use Dynamic Symbols)\narch = arch_names.get(elf.e_machine)\n@@ -556,8 +557,8 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nif addbase:\nrlva += baseaddr\ntry:\n- # If it has a name, it's an externally\n- # resolved \"import\" entry, otherwise, just a regular reloc\n+ # If it has a name, it's an externally resolved \"import\" entry,\n+ # otherwise, just a regular reloc\nname = r.getName()\ndmglname = demangle(name)\nlogger.debug('relocs: 0x%x: %r (%r)', rlva, dmglname, name)\n@@ -582,10 +583,6 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nlogger.info(r.tree())\nelse:\n- symidx = Elf.getRelocSymTabIndex(r.r_info)\n- sym = elf.getDynSymbol(symidx)\n- ptr = sym.st_value\n-\nif rtype == Elf.R_386_RELATIVE: # R_X86_64_RELATIVE is the same number\nptr = vw.readMemoryPtr(rlva)\nlogger.info('R_386_RELATIVE: adding Relocation 0x%x -> 0x%x (name: %s) ', rlva, ptr, dmglname)\n@@ -613,7 +610,10 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nif arch in ('arm', 'thumb', 'thumb16'):\nif rtype == Elf.R_ARM_JUMP_SLOT:\n- symidx = Elf.getRelocSymTabIndex(r.r_info)\n+ symidx = r.getRelocSymTabIndex()\n+ if symidx == 0:\n+ continue\n+\nsym = elf.getDynSymbol(symidx)\nptr = sym.st_value\n@@ -639,7 +639,10 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nvw.setComment(rlva, name)\nelif rtype == Elf.R_ARM_GLOB_DAT:\n- symidx = Elf.getRelocSymTabIndex(r.r_info)\n+ symidx = r.getRelocSymTabIndex()\n+ if symidx == 0:\n+ continue\n+\nsym = elf.getDynSymbol(symidx)\nptr = sym.st_value\n@@ -662,7 +665,10 @@ def applyRelocs(elf, vw, addbase=False, baseaddr=0):\nvw.setComment(rlva, name)\nelif rtype == Elf.R_ARM_ABS32:\n- symidx = Elf.getRelocSymTabIndex(r.r_info)\n+ symidx = r.getRelocSymTabIndex()\n+ if symidx == 0:\n+ continue\n+\nsym = elf.getDynSymbol(symidx)\nptr = sym.st_value\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
bugfix: getDynSymbol() called when unnecessary (and sometimes don't exist)
minor cleanup
|
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