author
int64 658
755k
| date
stringlengths 19
19
| timezone
int64 -46,800
43.2k
| hash
stringlengths 40
40
| message
stringlengths 5
490
| mods
list | language
stringclasses 20
values | license
stringclasses 3
values | repo
stringlengths 5
68
| original_message
stringlengths 12
491
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491,609 |
03.06.2020 12:35:54
| -7,200 |
0befbc9586139e451890ceec08a2d737259c0628
|
Update serialization of the OSCORE option.
|
[
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/oscore.c",
"new_path": "openweb/opencoap/oscore.c",
"diff": "@@ -43,7 +43,10 @@ uint8_t oscore_construct_aad(uint8_t *buffer,\nuint8_t optionsSerializedLen);\nvoid oscore_encode_compressed_COSE(OpenQueueEntry_t *msg,\n- uint8_t *requestSeq, uint8_t requestSeqLen,\n+ uint8_t *requestSeq,\n+ uint8_t requestSeqLen,\n+ uint8_t *kidContext,\n+ uint8_t kidContextLen,\nuint8_t *requestKid,\nuint8_t requestKidLen);\n@@ -249,7 +252,7 @@ owerror_t oscore_protect_message(\n}\n// encode compressed COSE\n- oscore_encode_compressed_COSE(msg, requestSeq, requestSeqLen, requestKid, requestKidLen);\n+ oscore_encode_compressed_COSE(msg, requestSeq, requestSeqLen, context->idContext, context->idContextLen, requestKid, requestKidLen);\nif (payloadPresent) {\n@@ -547,31 +550,48 @@ uint8_t oscore_construct_aad(uint8_t *buffer,\n}\nvoid oscore_encode_compressed_COSE(OpenQueueEntry_t *msg,\n- uint8_t *partialIV, uint8_t partialIVLen,\n+ uint8_t *partialIV,\n+ uint8_t partialIVLen,\n+ uint8_t *kidContext,\n+ uint8_t kidContextLen,\nuint8_t *kid,\nuint8_t kidLen) {\n// ciphertext is already encoded and of length msg->length\n- uint8_t kidFlag;\n+ uint8_t k;\n+ uint8_t h;\nif (kidLen != 0) {\n- kidFlag = 1;\n+ k = 1;\n} else {\n- kidFlag = 0;\n+ k = 0;\n}\n- if (kidFlag) {\n- packetfunctions_reserveHeader(&msg, kidLen + 1);\n- msg->payload[0] = kidLen;\n- memcpy(&msg->payload[1], kid, kidLen);\n+ if (kidContextLen != 0) {\n+ h = 1;\n+ } else {\n+ h = 0;\n+ }\n+\n+ if (k) {\n+ packetfunctions_reserveHeader(&msg, kidLen);\n+ memcpy(&msg->payload[0], kid, kidLen);\n+ }\n+\n+ if (h) {\n+ packetfunctions_reserveHeader(&msg, kidContextLen);\n+ memcpy(&msg->payload[0], kidContext, kidContextLen);\n+ packetfunctions_reserveHeader(&msg, 1);\n+ msg->payload[0] = kidContextLen;\n}\nif (partialIVLen) {\npacketfunctions_reserveHeader(&msg, partialIVLen);\nmemcpy(&msg->payload[0], partialIV, partialIVLen);\n}\n+\n// flag byte\npacketfunctions_reserveHeader(&msg, 1);\n- msg->payload[0] = ((kidFlag << 3) | partialIVLen);\n+ msg->payload[0] = ((h << 4) | (k << 3) | (partialIVLen & 0x07));\n}\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-880. Update serialization of the OSCORE option.
|
491,609 |
03.06.2020 15:34:47
| -7,200 |
277b71d1964113b2e96230a603816b46046d51ee
|
Update OSCORE option parsing.
|
[
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/coap.c",
"new_path": "openweb/opencoap/coap.c",
"diff": "@@ -118,6 +118,8 @@ void coap_receive(OpenQueueEntry_t *msg) {\ncoap_option_iht *proxyScheme;\ncoap_option_iht *statelessProxy;\nuint16_t rcvdSequenceNumber;\n+ uint8_t *rcvdKidContext;\n+ uint8_t rcvdKidContextLen;\nuint8_t *rcvdKid;\nuint8_t rcvdKidLen;\noscore_security_context_t *blindContext;\n@@ -218,6 +220,8 @@ void coap_receive(OpenQueueEntry_t *msg) {\nindex = oscore_parse_compressed_COSE(&msg->payload[0],\nmsg->length,\n&rcvdSequenceNumber,\n+ &rcvdKidContext,\n+ &rcvdKidContextLen,\n&rcvdKid,\n&rcvdKidLen);\nif (index == 0) {\n@@ -228,6 +232,8 @@ void coap_receive(OpenQueueEntry_t *msg) {\nindex = oscore_parse_compressed_COSE(objectSecurity->pValue,\nobjectSecurity->length,\n&rcvdSequenceNumber,\n+ &rcvdKidContext,\n+ &rcvdKidContextLen,\n&rcvdKid,\n&rcvdKidLen);\n"
},
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/oscore.c",
"new_path": "openweb/opencoap/oscore.c",
"diff": "@@ -401,18 +401,22 @@ uint16_t oscore_get_sequence_number(oscore_security_context_t *context) {\nuint8_t oscore_parse_compressed_COSE(uint8_t *buffer,\nuint8_t bufferLen,\nuint16_t *sequenceNumber,\n+ uint8_t **kidContext,\n+ uint8_t *kidContextLen,\nuint8_t **kid,\nuint8_t *kidLen\n) {\nuint8_t index;\n- uint8_t pivsz;\n+ uint8_t n;\nuint8_t k;\n+ uint8_t h;\nuint8_t reserved;\nindex = 0;\n- pivsz = (buffer[index] >> 0) & 0x07;\n+ n = (buffer[index] >> 0) & 0x07;\nk = (buffer[index] >> 3) & 0x01;\n- reserved = (buffer[index] >> 4) & 0x0f;\n+ h = (buffer[index] >> 4) & 0x01;\n+ reserved = (buffer[index] >> 5) & 0x07;\nif (reserved) {\nreturn 0;\n@@ -420,25 +424,27 @@ uint8_t oscore_parse_compressed_COSE(uint8_t *buffer,\nindex++;\n- if (pivsz > 2) {\n+ if (n > 2) {\nreturn 0;\n- } else if (pivsz == 1) {\n+ } else if (n == 1) {\n*sequenceNumber = buffer[index];\nindex++;\n- } else if (pivsz == 2) {\n+ } else if (n == 2) {\n*sequenceNumber = packetfunctions_ntohs(&buffer[index]);\nindex += 2;\n}\n- if (k) {\n- *kidLen = buffer[index];\n+ if (h) {\n+ *kidContextLen = buffer[index];\nindex++;\n- *kid = &buffer[index];\n- index += *kidLen;\n+ *kidContext = &buffer[index];\n+ index += *kidContextLen;\n}\n- if (index > bufferLen) {\n- return 0;\n+ if (k) {\n+ *kidLen = bufferLen - index;\n+ *kid = (*kidLen == 0) ? NULL : &buffer[index];\n+ index += *kidLen;\n}\nreturn index;\n"
},
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/oscore.h",
"new_path": "openweb/opencoap/oscore.h",
"diff": "@@ -72,6 +72,8 @@ uint16_t oscore_get_sequence_number(oscore_security_context_t *context);\nuint8_t oscore_parse_compressed_COSE(uint8_t *buffer,\nuint8_t bufferLen,\nuint16_t *sequenceNumber,\n+ uint8_t **kidContext,\n+ uint8_t *kidContextLen,\nuint8_t **kid,\nuint8_t *kidLen);\n/**\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-880. Update OSCORE option parsing.
|
491,609 |
03.06.2020 18:14:12
| -7,200 |
fff9adf87699c37b26ec67a612ea1e352807b54a
|
Update plaintext and nonce constructs.
|
[
{
"change_type": "MODIFY",
"old_path": "openapps/cjoin/cjoin.c",
"new_path": "openapps/cjoin/cjoin.c",
"diff": "@@ -282,8 +282,10 @@ owerror_t cjoin_sendJoinRequest(open_addr_t *joinProxy) {\noptions[1].pValue = (uint8_t *) cjoin_path0;\n// object security option\n- // length and value are set by the CoAP library\n+ // length and value are overwritten by the CoAP library\noptions[2].type = COAP_OPTION_NUM_OSCORE;\n+ options[2].length = OSCORE_OPT_MAX_LEN;\n+ options[2].pValue = cjoin_vars.oscoreOptValue;\n// ProxyScheme set to \"coap\"\noptions[3].type = COAP_OPTION_NUM_PROXYSCHEME;\n"
},
{
"change_type": "MODIFY",
"old_path": "openapps/cjoin/cjoin.h",
"new_path": "openapps/cjoin/cjoin.h",
"diff": "@@ -21,6 +21,7 @@ typedef struct {\nbool isJoined;\noscore_security_context_t context;\nuint8_t medType;\n+ uint8_t oscoreOptValue[OSCORE_OPT_MAX_LEN];\n} cjoin_vars_t;\n//=========================== variables =======================================\n"
},
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/coap.c",
"new_path": "openweb/opencoap/coap.c",
"diff": "@@ -210,39 +210,20 @@ void coap_receive(OpenQueueEntry_t *msg) {\nobjectSecurity = NULL;\n}\nif (objectSecurity) {\n- if ((objectSecurity->length == 0 && msg->length == 0) ||\n- (objectSecurity->length != 0 && msg->length != 0)) {\n+ if (objectSecurity->length == 0 && msg->length == 0) {\n// malformated object security message\nreturn;\n}\n- if (objectSecurity->length == 0) {\n- index = oscore_parse_compressed_COSE(&msg->payload[0],\n- msg->length,\n- &rcvdSequenceNumber,\n- &rcvdKidContext,\n- &rcvdKidContextLen,\n- &rcvdKid,\n- &rcvdKidLen);\n- if (index == 0) {\n- return;\n- }\n- packetfunctions_tossHeader(&msg, index);\n- } else {\n- index = oscore_parse_compressed_COSE(objectSecurity->pValue,\n+ if (oscore_parse_compressed_COSE(objectSecurity->pValue,\nobjectSecurity->length,\n&rcvdSequenceNumber,\n&rcvdKidContext,\n&rcvdKidContextLen,\n&rcvdKid,\n- &rcvdKidLen);\n-\n- if (index == 0) {\n+ &rcvdKidLen) == E_FAIL) {\nreturn;\n}\n- objectSecurity->length -= index;\n- objectSecurity->pValue += index;\n- }\n}\n//=== step 2. find the resource to handle the packet\n@@ -273,7 +254,7 @@ void coap_receive(OpenQueueEntry_t *msg) {\ncoap_incomingOptionsLen = MAX_COAP_OPTIONS;\ndecStatus = oscore_unprotect_message(blindContext,\ncoap_header.Ver,\n- coap_header.Code,\n+ &coap_header.Code,\ncoap_incomingOptions,\n&coap_incomingOptionsLen,\nmsg,\n@@ -393,7 +374,7 @@ void coap_receive(OpenQueueEntry_t *msg) {\ncoap_incomingOptionsLen = MAX_COAP_OPTIONS;\ndecStatus = oscore_unprotect_message(temp_desc->securityContext,\ncoap_header.Ver,\n- coap_header.Code,\n+ &coap_header.Code,\ncoap_incomingOptions,\n&coap_incomingOptionsLen,\nmsg,\n"
},
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/coap.h",
"new_path": "openweb/opencoap/coap.h",
"diff": "@@ -47,6 +47,8 @@ static const uint8_t ipAddr_ringmaster[] = {0xbb, 0xbb, 0x00, 0x00, 0x00, 0x00,\n#define OSCOAP_MAX_MASTER_SALT_LEN 0\n+#define OSCORE_OPT_MAX_LEN 1 + 2 + 1 + OSCOAP_MAX_ID_LEN + OSCOAP_MAX_ID_LEN\n+\n#define AES_CCM_16_64_128 10 // algorithm value as defined in COSE spec\n#define AES_CCM_16_64_128_KEY_LEN 16\n"
},
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/oscore.c",
"new_path": "openweb/opencoap/oscore.c",
"diff": "@@ -42,7 +42,16 @@ uint8_t oscore_construct_aad(uint8_t *buffer,\nuint8_t *optionsSerialized,\nuint8_t optionsSerializedLen);\n-void oscore_encode_compressed_COSE(OpenQueueEntry_t *msg,\n+void oscore_construct_nonce(uint8_t *buffer,\n+ uint8_t *partialIV,\n+ uint8_t partialIVLen,\n+ uint8_t *idPiv,\n+ uint8_t idPivLen,\n+ uint8_t *commonIV,\n+ uint8_t commonIVLen);\n+\n+uint8_t oscore_encode_compressed_COSE(uint8_t *buf,\n+ uint8_t bufMaxLen,\nuint8_t *requestSeq,\nuint8_t requestSeqLen,\nuint8_t *kidContext,\n@@ -139,7 +148,7 @@ void oscore_init_security_context(oscore_security_context_t *ctx,\nowerror_t oscore_protect_message(\noscore_security_context_t *context,\nuint8_t version,\n- uint8_t code,\n+ coap_code_t code,\ncoap_option_iht *incomingOptions,\nuint8_t incomingOptionsLen,\nOpenQueueEntry_t *msg,\n@@ -155,9 +164,10 @@ owerror_t oscore_protect_message(\nuint8_t requestSeqLen;\nuint8_t *requestKid;\nuint8_t requestKidLen;\n+ uint8_t *idContext;\n+ uint8_t idContextLen;\nowerror_t encStatus;\ncoap_option_iht *objectSecurity;\n- bool payloadPresent;\nuint8_t option_count;\nuint8_t option_index;\n@@ -187,18 +197,19 @@ owerror_t oscore_protect_message(\n}\nif (msg->length > 0) { // contains payload, add payload marker\n- payloadPresent = TRUE;\nif (packetfunctions_reserveHeader(&msg, 1) == E_FAIL){\nreturn E_FAIL;\n}\nmsg->payload[0] = COAP_PAYLOAD_MARKER;\n- } else {\n- payloadPresent = FALSE;\n}\n// encode the options to the openqueue payload buffer\ncoap_options_encode(msg, incomingOptions, incomingOptionsLen, COAP_OPTION_CLASS_E);\n+ // encode CoAP code\n+ packetfunctions_reserveHeaderSize(msg, 1);\n+ msg->payload[0] = code;\n+\npayload = &msg->payload[0];\npayloadLen = msg->length;\n// shift payload to leave space for authentication tag\n@@ -225,19 +236,30 @@ owerror_t oscore_protect_message(\nreturn E_FAIL;\n}\n- // construct nonce\n+\n+\nif (is_request(code)) {\n- xor_arrays(context->commonIV, partialIV, nonce, AES_CCM_16_64_128_IV_LEN);\n+ idContext = context->idContext;\n+ idContextLen = context->idContextLen;\n} else {\n- flip_first_bit(context->commonIV, nonce, AES_CCM_16_64_128_IV_LEN);\n- xor_arrays(nonce, partialIV, nonce, AES_CCM_16_64_128_IV_LEN);\n// do not encode sequence number and ID in the response\nrequestSeq = NULL;\nrequestSeqLen = 0;\nrequestKid = NULL;\nrequestKidLen = 0;\n+ idContext = NULL;\n+ idContextLen = 0;\n}\n+ // construct nonce\n+ oscore_construct_nonce(nonce,\n+ requestSeq,\n+ requestSeqLen,\n+ requestKid,\n+ requestKidLen,\n+ context->commonIV,\n+ AES_CCM_16_64_128_IV_LEN);\n+\nencStatus = aes128_ccms_enc(aad,\naadLen,\npayload,\n@@ -252,21 +274,14 @@ owerror_t oscore_protect_message(\n}\n// encode compressed COSE\n- oscore_encode_compressed_COSE(msg, requestSeq, requestSeqLen, context->idContext, context->idContextLen, requestKid, requestKidLen);\n-\n-\n- if (payloadPresent) {\n- // set the object security option to 0 length\n- // as the value will be carried in message payload\n- objectSecurity->length = 0;\n- objectSecurity->pValue = NULL;\n- } else {\n- objectSecurity->length = msg->length;\n- // FIXME use the upper bytes in the msg->packet buffer\n- memcpy(&msg->packet[0], &msg->payload[0], msg->length);\n- objectSecurity->pValue = &msg->packet[0];\n- packetfunctions_tossHeader(&msg, msg->length); // reset packet to zero as objectSecurity option will cary payload\n- }\n+ objectSecurity->length = oscore_encode_compressed_COSE(objectSecurity->pValue,\n+ objectSecurity->length,\n+ requestSeq,\n+ requestSeqLen,\n+ idContext,\n+ idContextLen,\n+ requestKid,\n+ requestKidLen);\nreturn E_SUCCESS;\n}\n@@ -274,7 +289,7 @@ owerror_t oscore_protect_message(\nowerror_t oscore_unprotect_message(\noscore_security_context_t *context,\nuint8_t version,\n- uint8_t code,\n+ coap_code_t *code,\ncoap_option_iht *incomingOptions,\nuint8_t *incomingOptionsLen,\nOpenQueueEntry_t *msg,\n@@ -292,7 +307,6 @@ owerror_t oscore_unprotect_message(\nowerror_t decStatus;\nuint8_t *ciphertext;\nuint8_t ciphertextLen;\n- bool payloadInObjSec;\nuint8_t index;\nuint8_t option_count;\nuint8_t option_index;\n@@ -309,17 +323,10 @@ owerror_t oscore_unprotect_message(\nreturn E_FAIL;\n}\n- if (objectSecurity->length != 0) {\n- ciphertext = objectSecurity->pValue;\n- ciphertextLen = objectSecurity->length;\n- payloadInObjSec = TRUE;\n- } else {\nciphertext = &msg->payload[0];\nciphertextLen = msg->length;\n- payloadInObjSec = FALSE;\n- }\n- if (is_request(code)) {\n+ if (is_request(*code)) {\nif (replay_window_check(context, sequenceNumber) == FALSE) {\nLOG_ERROR(COMPONENT_OSCORE, ERR_REPLAY_FAILED, (errorparameter_t) 0, (errorparameter_t) 0);\nreturn E_FAIL;\n@@ -352,13 +359,13 @@ owerror_t oscore_unprotect_message(\nreturn E_FAIL;\n}\n- // construct nonce\n- if (is_request(code)) {\n- xor_arrays(context->commonIV, partialIV, nonce, AES_CCM_16_64_128_IV_LEN);\n- } else {\n- flip_first_bit(context->commonIV, nonce, AES_CCM_16_64_128_IV_LEN);\n- xor_arrays(nonce, partialIV, nonce, AES_CCM_16_64_128_IV_LEN);\n- }\n+ oscore_construct_nonce(nonce,\n+ requestSeq,\n+ requestSeqLen,\n+ requestKid,\n+ requestKidLen,\n+ context->commonIV,\n+ AES_CCM_16_64_128_IV_LEN);\ndecStatus = aes128_ccms_dec(aad,\naadLen,\n@@ -374,17 +381,18 @@ owerror_t oscore_unprotect_message(\nreturn E_FAIL;\n}\n- if (is_request(code)) {\n+ if (is_request(*code)) {\nreplay_window_update(context, sequenceNumber);\n}\n- if (payloadInObjSec) {\n- coap_options_parse(objectSecurity->pValue, objectSecurity->length, incomingOptions, incomingOptionsLen);\n- } else {\npacketfunctions_tossFooter(&msg, AES_CCM_16_64_128_TAG_LEN);\n+\n+ // parse code from plaintext\n+ *code = msg->payload[0];\n+ packetfunctions_tossHeader(&msg, 1);\n+ // parse inner coap options\nindex = coap_options_parse(&msg->payload[0], msg->length, incomingOptions, incomingOptionsLen);\npacketfunctions_tossHeader(&msg, index);\n- }\nreturn E_SUCCESS;\n}\n@@ -398,14 +406,14 @@ uint16_t oscore_get_sequence_number(oscore_security_context_t *context) {\nreturn context->sequenceNumber;\n}\n-uint8_t oscore_parse_compressed_COSE(uint8_t *buffer,\n+owerror_t oscore_parse_compressed_COSE(uint8_t *buffer,\nuint8_t bufferLen,\nuint16_t *sequenceNumber,\nuint8_t **kidContext,\nuint8_t *kidContextLen,\nuint8_t **kid,\n- uint8_t *kidLen\n-) {\n+ uint8_t *kidLen)\n+{\nuint8_t index;\nuint8_t n;\nuint8_t k;\n@@ -419,7 +427,7 @@ uint8_t oscore_parse_compressed_COSE(uint8_t *buffer,\nreserved = (buffer[index] >> 5) & 0x07;\nif (reserved) {\n- return 0;\n+ return E_FAIL;\n}\nindex++;\n@@ -447,7 +455,7 @@ uint8_t oscore_parse_compressed_COSE(uint8_t *buffer,\nindex += *kidLen;\n}\n- return index;\n+ return E_SUCCESS;\n}\n@@ -464,8 +472,8 @@ owerror_t hkdf_derive_parameter(uint8_t *buffer,\nuint8_t idContextLen,\nuint8_t algorithm,\noscore_derivation_t type,\n- uint8_t length\n-) {\n+ uint8_t length)\n+{\nconst uint8_t iv[] = \"IV\";\nconst uint8_t key[] = \"Key\";\n@@ -555,7 +563,48 @@ uint8_t oscore_construct_aad(uint8_t *buffer,\nreturn ret;\n}\n-void oscore_encode_compressed_COSE(OpenQueueEntry_t *msg,\n+// <- nonce length minus 6 B -> <-- 5 bytes -->\n+// +---+-------------------+--------+---------+-----+\n+// | S | padding | ID_PIV | padding | PIV |----+\n+// +---+-------------------+--------+---------+-----+ |\n+// |\n+// <---------------- nonce length ----------------> |\n+// +------------------------------------------------+ |\n+// | Common IV |->(XOR)\n+// +------------------------------------------------+ |\n+// |\n+// <---------------- nonce length ----------------> |\n+// +------------------------------------------------+ |\n+// | Nonce |<---+\n+// +------------------------------------------------+\n+void oscore_construct_nonce(uint8_t *buffer, // needs to hold AES_CCM_16_64_128_IV_LEN bytes\n+ uint8_t *partialIV,\n+ uint8_t partialIVLen,\n+ uint8_t *idPiv,\n+ uint8_t idPivLen,\n+ uint8_t *commonIV,\n+ uint8_t commonIVLen) {\n+ uint8_t temp[AES_CCM_16_64_128_IV_LEN];\n+\n+ if (commonIVLen != AES_CCM_16_64_128_IV_LEN) {\n+ return;\n+ }\n+\n+ memset(temp, 0x00, AES_CCM_16_64_128_IV_LEN);\n+ /* Step 1 */\n+ memcpy(&temp[commonIVLen - partialIVLen], partialIV, partialIVLen);\n+ /* Step 2 */\n+ memcpy(&temp[commonIVLen - 5 - idPivLen], idPiv, idPivLen);\n+ /* Step 3 */\n+ temp[0] = idPivLen;\n+ /* Now XOR with Common IV */\n+ xor_arrays(commonIV, temp, buffer, commonIVLen);\n+\n+ return;\n+}\n+\n+uint8_t oscore_encode_compressed_COSE(uint8_t *buf,\n+ uint8_t bufMaxLen,\nuint8_t *partialIV,\nuint8_t partialIVLen,\nuint8_t *kidContext,\n@@ -563,9 +612,12 @@ void oscore_encode_compressed_COSE(OpenQueueEntry_t *msg,\nuint8_t *kid,\nuint8_t kidLen) {\n// ciphertext is already encoded and of length msg->length\n+ uint8_t *tmp;\nuint8_t k;\nuint8_t h;\n+ tmp = buf;\n+\nif (kidLen != 0) {\nk = 1;\n} else {\n@@ -578,26 +630,33 @@ void oscore_encode_compressed_COSE(OpenQueueEntry_t *msg,\nh = 0;\n}\n- if (k) {\n- packetfunctions_reserveHeader(&msg, kidLen);\n- memcpy(&msg->payload[0], kid, kidLen);\n+ // flag byte\n+ *tmp = ((h << 4) | (k << 3) | (partialIVLen & 0x07));\n+ tmp++;\n+\n+ if (partialIVLen) {\n+ memcpy(tmp, partialIV, partialIVLen);\n+ tmp += partialIVLen;\n}\nif (h) {\n- packetfunctions_reserveHeader(&msg, kidContextLen);\n- memcpy(&msg->payload[0], kidContext, kidContextLen);\n- packetfunctions_reserveHeader(&msg, 1);\n- msg->payload[0] = kidContextLen;\n+ *tmp = kidContextLen;\n+ tmp++;\n+ memcpy(tmp, kidContext, kidContextLen);\n+ tmp += kidContextLen;\n}\n- if (partialIVLen) {\n- packetfunctions_reserveHeader(&msg, partialIVLen);\n- memcpy(&msg->payload[0], partialIV, partialIVLen);\n+ if (k) {\n+ memcpy(tmp, kid, kidLen);\n+ tmp += kidLen;\n}\n- // flag byte\n- packetfunctions_reserveHeader(&msg, 1);\n- msg->payload[0] = ((h << 4) | (k << 3) | (partialIVLen & 0x07));\n+ if (tmp - buf > bufMaxLen) {\n+ // corruption\n+ LOG_ERROR(COMPONENT_OSCORE, ERR_BUFFER_OVERFLOW, (errorparameter_t) 0, (errorparameter_t) 1);\n+ return 0;\n+ }\n+ return tmp - buf;\n}\n"
},
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/oscore.h",
"new_path": "openweb/opencoap/oscore.h",
"diff": "@@ -53,7 +53,7 @@ void oscore_init_security_context(oscore_security_context_t *ctx,\nowerror_t oscore_protect_message(oscore_security_context_t *context,\nuint8_t version,\n- uint8_t code,\n+ coap_code_t code,\ncoap_option_iht *options,\nuint8_t optionsLen,\nOpenQueueEntry_t *msg,\n@@ -61,7 +61,7 @@ owerror_t oscore_protect_message(oscore_security_context_t *context,\nowerror_t oscore_unprotect_message(oscore_security_context_t *context,\nuint8_t version,\n- uint8_t code,\n+ coap_code_t *code,\ncoap_option_iht *options,\nuint8_t *optionsLen,\nOpenQueueEntry_t *msg,\n@@ -69,7 +69,7 @@ owerror_t oscore_unprotect_message(oscore_security_context_t *context,\nuint16_t oscore_get_sequence_number(oscore_security_context_t *context);\n-uint8_t oscore_parse_compressed_COSE(uint8_t *buffer,\n+owerror_t oscore_parse_compressed_COSE(uint8_t *buffer,\nuint8_t bufferLen,\nuint16_t *sequenceNumber,\nuint8_t **kidContext,\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-880. Update plaintext and nonce constructs.
|
491,609 |
03.06.2020 18:43:11
| -7,200 |
0058e49c359f5797967bdebf2ec7d85eee8b7108
|
Include ID Context in context lookup.
|
[
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/coap.c",
"new_path": "openweb/opencoap/coap.c",
"diff": "@@ -242,7 +242,9 @@ void coap_receive(OpenQueueEntry_t *msg) {\ndo {\nif (temp_desc->securityContext != NULL &&\ntemp_desc->securityContext->recipientIDLen == rcvdKidLen &&\n- memcmp(rcvdKid, temp_desc->securityContext->recipientID, rcvdKidLen) == 0) {\n+ memcmp(rcvdKid, temp_desc->securityContext->recipientID, rcvdKidLen) == 0 &&\n+ temp_desc->securityContext->idContextLen == rcvdKidContextLen &&\n+ memcmp(rcvdKidContext, temp_desc->securityContext->idContext, rcvdKidContextLen) == 0) {\nblindContext = temp_desc->securityContext;\nbreak;\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-880. Include ID Context in context lookup.
|
491,609 |
03.06.2020 19:26:39
| -7,200 |
46762b4eedc3c33aff7bb51503d53b0ce66ac62f
|
When initializing the context, copy idContext param.
|
[
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/oscore.c",
"new_path": "openweb/opencoap/oscore.c",
"diff": "@@ -90,6 +90,9 @@ void oscore_init_security_context(oscore_security_context_t *ctx,\n// common context\nctx->aeadAlgorithm = AES_CCM_16_64_128;\n+ memcpy(ctx->idContext, idContext, idContextLen);\n+ ctx->idContextLen = idContextLen;\n+\n// invoke HKDF to get common IV\nhkdf_derive_parameter(ctx->commonIV,\nmasterSecret,\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-880. When initializing the context, copy idContext param.
|
491,609 |
03.06.2020 19:26:52
| -7,200 |
7b4043306e54053cf39dabf82a0bdb2835bf24fe
|
Remove redundant macro.
|
[
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/coap.h",
"new_path": "openweb/opencoap/coap.h",
"diff": "@@ -45,8 +45,6 @@ static const uint8_t ipAddr_ringmaster[] = {0xbb, 0xbb, 0x00, 0x00, 0x00, 0x00,\n#define OSCOAP_MASTER_SECRET_LEN 16\n-#define OSCOAP_MAX_MASTER_SALT_LEN 0\n-\n#define OSCORE_OPT_MAX_LEN 1 + 2 + 1 + OSCOAP_MAX_ID_LEN + OSCOAP_MAX_ID_LEN\n#define AES_CCM_16_64_128 10 // algorithm value as defined in COSE spec\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-880. Remove redundant macro.
|
491,609 |
03.06.2020 19:30:19
| -7,200 |
3c12947a9e94b2e1b298a2a6ceaf4d8a9ed01a81
|
Encode kid and kidContext based on pointer value, not length that can be zero.
This allows zero-length byte string to be encoded.
|
[
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/oscore.c",
"new_path": "openweb/opencoap/oscore.c",
"diff": "@@ -621,13 +621,13 @@ uint8_t oscore_encode_compressed_COSE(uint8_t *buf,\ntmp = buf;\n- if (kidLen != 0) {\n+ if (kid != NULL) {\nk = 1;\n} else {\nk = 0;\n}\n- if (kidContextLen != 0) {\n+ if (kidContext != NULL) {\nh = 1;\n} else {\nh = 0;\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-880. Encode kid and kidContext based on pointer value, not length that can be zero.
This allows zero-length byte string to be encoded.
|
491,609 |
04.06.2020 10:18:25
| -7,200 |
91795b40db838d50749a5080c46552ddad972dd2
|
OSCORE changes the value of CoAP code to POST/2.04.
|
[
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/coap.c",
"new_path": "openweb/opencoap/coap.c",
"diff": "@@ -427,7 +427,7 @@ void coap_receive(OpenQueueEntry_t *msg) {\nencStatus = oscore_protect_message(\ntemp_desc->securityContext,\nCOAP_VERSION,\n- coap_header.Code,\n+ &coap_header.Code,\ncoap_outgoingOptions,\ncoap_outgoingOptionsLen,\nmsg,\n@@ -735,7 +735,7 @@ owerror_t coap_send(\nret = oscore_protect_message(\ndescSender->securityContext,\nCOAP_VERSION,\n- code,\n+ &code,\noptions,\noptionsLen,\nmsg,\n"
},
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/oscore.c",
"new_path": "openweb/opencoap/oscore.c",
"diff": "@@ -151,7 +151,7 @@ void oscore_init_security_context(oscore_security_context_t *ctx,\nowerror_t oscore_protect_message(\noscore_security_context_t *context,\nuint8_t version,\n- coap_code_t code,\n+ coap_code_t *code,\ncoap_option_iht *incomingOptions,\nuint8_t incomingOptionsLen,\nOpenQueueEntry_t *msg,\n@@ -191,7 +191,7 @@ owerror_t oscore_protect_message(\nrequestSeq = &partialIV[AES_CCM_16_64_128_IV_LEN - 2];\nrequestSeqLen = oscore_convert_sequence_number(sequenceNumber, &requestSeq);\n- if (is_request(code)) {\n+ if (is_request(*code)) {\nrequestKid = context->senderID;\nrequestKidLen = context->senderIDLen;\n} else {\n@@ -211,7 +211,7 @@ owerror_t oscore_protect_message(\n// encode CoAP code\npacketfunctions_reserveHeaderSize(msg, 1);\n- msg->payload[0] = code;\n+ msg->payload[0] = *code;\npayload = &msg->payload[0];\npayloadLen = msg->length;\n@@ -241,10 +241,13 @@ owerror_t oscore_protect_message(\n- if (is_request(code)) {\n+ if (is_request(*code)) {\n+ // return \"encrypted\" code\n+ *code = COAP_CODE_REQ_POST;\nidContext = context->idContext;\nidContextLen = context->idContextLen;\n} else {\n+ *code = COAP_CODE_RESP_CHANGED;\n// do not encode sequence number and ID in the response\nrequestSeq = NULL;\nrequestSeqLen = 0;\n"
},
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/oscore.h",
"new_path": "openweb/opencoap/oscore.h",
"diff": "@@ -53,7 +53,7 @@ void oscore_init_security_context(oscore_security_context_t *ctx,\nowerror_t oscore_protect_message(oscore_security_context_t *context,\nuint8_t version,\n- coap_code_t code,\n+ coap_code_t *code,\ncoap_option_iht *options,\nuint8_t optionsLen,\nOpenQueueEntry_t *msg,\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-880. OSCORE changes the value of CoAP code to POST/2.04.
|
491,609 |
05.06.2020 15:29:37
| -7,200 |
2c73cadbbd7db69f83c83248d8afe446c3d4a0f7
|
OSCORE responses may contain empty OSCOR option value.
|
[
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/oscore.c",
"new_path": "openweb/opencoap/oscore.c",
"diff": "@@ -420,17 +420,27 @@ owerror_t oscore_parse_compressed_COSE(uint8_t *buffer,\nuint8_t **kid,\nuint8_t *kidLen)\n{\n+ uint8_t tmp[0];\n+ uint8_t *ptr;\nuint8_t index;\nuint8_t n;\nuint8_t k;\nuint8_t h;\nuint8_t reserved;\n+ if (bufferLen == 0) {\n+ tmp[0] = 0x00;\n+ ptr = tmp;\n+ bufferLen = 1;\n+ } else {\n+ ptr = buffer;\n+ }\n+\nindex = 0;\n- n = (buffer[index] >> 0) & 0x07;\n- k = (buffer[index] >> 3) & 0x01;\n- h = (buffer[index] >> 4) & 0x01;\n- reserved = (buffer[index] >> 5) & 0x07;\n+ n = (ptr[index] >> 0) & 0x07;\n+ k = (ptr[index] >> 3) & 0x01;\n+ h = (ptr[index] >> 4) & 0x01;\n+ reserved = (ptr[index] >> 5) & 0x07;\nif (reserved) {\nreturn E_FAIL;\n@@ -441,23 +451,23 @@ owerror_t oscore_parse_compressed_COSE(uint8_t *buffer,\nif (n > 2) {\nreturn 0;\n} else if (n == 1) {\n- *sequenceNumber = buffer[index];\n+ *sequenceNumber = ptr[index];\nindex++;\n} else if (n == 2) {\n- *sequenceNumber = packetfunctions_ntohs(&buffer[index]);\n+ *sequenceNumber = packetfunctions_ntohs(&ptr[index]);\nindex += 2;\n}\nif (h) {\n- *kidContextLen = buffer[index];\n+ *kidContextLen = ptr[index];\nindex++;\n- *kidContext = &buffer[index];\n+ *kidContext = &ptr[index];\nindex += *kidContextLen;\n}\nif (k) {\n*kidLen = bufferLen - index;\n- *kid = (*kidLen == 0) ? NULL : &buffer[index];\n+ *kid = (*kidLen == 0) ? NULL : &ptr[index];\nindex += *kidLen;\n}\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-880. OSCORE responses may contain empty OSCOR option value.
|
491,609 |
05.06.2020 16:35:57
| -7,200 |
bb2626db9a545c80fd6e76277d795bbd3aba8b41
|
Update security context derivation according to minimal-security-15 draft.
|
[
{
"change_type": "MODIFY",
"old_path": "openapps/cjoin/cjoin.c",
"new_path": "openapps/cjoin/cjoin.c",
"diff": "@@ -94,26 +94,20 @@ void cjoin_init(void) {\n}\nvoid cjoin_init_security_context(void) {\n- uint8_t senderID[9];\n- uint8_t recipientID[9];\n+ uint8_t idContext[8];\n+ uint8_t recipientID[] = {0x4a, 0x52, 0x43};\nuint8_t *joinKey;\n- eui64_get(senderID);\n- senderID[8] = 0x00; // EUI-64 || 0x00 [minimal-security-03]\n-\n- eui64_get(recipientID);\n- recipientID[8] = 0x01; // EUI-64 || 0x01 [minimal-security-03]\n-\n+ eui64_get(idContext);\nidmanager_getJoinKey(&joinKey);\n- // TODO Pass id_context to the routine\noscore_init_security_context(&cjoin_vars.context,\n- senderID,\n- sizeof(senderID),\n- recipientID,\n- sizeof(recipientID),\nNULL,\n0,\n+ recipientID,\n+ sizeof(recipientID),\n+ idContext,\n+ sizeof(idContext),\njoinKey,\n16,\nNULL,\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-880. Update security context derivation according to minimal-security-15 draft.
|
491,609 |
05.06.2020 16:36:30
| -7,200 |
3cff5151824defabde3bc612db7db8a848b876b8
|
Sort CoAP options in cjoin.
|
[
{
"change_type": "MODIFY",
"old_path": "openapps/cjoin/cjoin.c",
"new_path": "openapps/cjoin/cjoin.c",
"diff": "@@ -270,16 +270,16 @@ owerror_t cjoin_sendJoinRequest(open_addr_t *joinProxy) {\noptions[0].length = sizeof(jrcHostName) - 1;\noptions[0].pValue = (uint8_t *) jrcHostName;\n- // location-path option\n- options[1].type = COAP_OPTION_NUM_URIPATH;\n- options[1].length = sizeof(cjoin_path0) - 1;\n- options[1].pValue = (uint8_t *) cjoin_path0;\n-\n// object security option\n// length and value are overwritten by the CoAP library\n- options[2].type = COAP_OPTION_NUM_OSCORE;\n- options[2].length = OSCORE_OPT_MAX_LEN;\n- options[2].pValue = cjoin_vars.oscoreOptValue;\n+ options[1].type = COAP_OPTION_NUM_OSCORE;\n+ options[1].length = OSCORE_OPT_MAX_LEN;\n+ options[1].pValue = cjoin_vars.oscoreOptValue;\n+\n+ // location-path option\n+ options[2].type = COAP_OPTION_NUM_URIPATH;\n+ options[2].length = sizeof(cjoin_path0) - 1;\n+ options[2].pValue = (uint8_t *) cjoin_path0;\n// ProxyScheme set to \"coap\"\noptions[3].type = COAP_OPTION_NUM_PROXYSCHEME;\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-880. Sort CoAP options in cjoin.
|
491,609 |
01.07.2020 13:44:47
| -7,200 |
614f78117566d62e6926568dabc2cdcf0f5215c7
|
Align oscore with new packetfunctions API.
|
[
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/oscore.c",
"new_path": "openweb/opencoap/oscore.c",
"diff": "@@ -210,7 +210,7 @@ owerror_t oscore_protect_message(\ncoap_options_encode(msg, incomingOptions, incomingOptionsLen, COAP_OPTION_CLASS_E);\n// encode CoAP code\n- packetfunctions_reserveHeaderSize(msg, 1);\n+ packetfunctions_reserveHeader(&msg, 1);\nmsg->payload[0] = *code;\npayload = &msg->payload[0];\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-880. Align oscore with new packetfunctions API.
|
491,609 |
01.07.2020 14:28:10
| -7,200 |
8300cee13f35812d275b0603520709d16c8ae7c4
|
Set CoAP token length to 1 to facilitate Wireshark debug.
|
[
{
"change_type": "MODIFY",
"old_path": "openapps/cjoin/cjoin.c",
"new_path": "openapps/cjoin/cjoin.c",
"diff": "@@ -312,7 +312,7 @@ owerror_t cjoin_sendJoinRequest(open_addr_t *joinProxy) {\npkt,\nCOAP_TYPE_NON,\nCOAP_CODE_REQ_POST,\n- 0, // token len\n+ 1, // token len\noptions,\n4, // options len\n&cjoin_vars.desc\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-880. Set CoAP token length to 1 to facilitate Wireshark debug.
|
491,595 |
05.08.2020 17:24:14
| -7,200 |
b3f09f8605bc655e7e4035a20e28b5392ac370ff
|
create bsp_radio_ble for nrf52840 to transmit and receive ibeacon
|
[
{
"change_type": "MODIFY",
"old_path": "bsp/boards/nrf52840/radio.c",
"new_path": "bsp/boards/nrf52840/radio.c",
"diff": "#include \"board_info.h\"\n#include \"debugpins.h\"\n#include \"sctimer.h\"\n+#include \"radio_ble.h\"\n//=========================== defines =========================================\n#define WAIT_FOR_RADIO_DISABLE (0) ///< whether the driver shall wait until the radio is disabled upon calling radio_rfOff()\n#define WAIT_FOR_RADIO_ENABLE (1) ///< whether the driver shall wait until the radio is enabled upon calling radio_txEnable() or radio_rxEnable()\n+#define RADIO_CRCINIT_24BIT 0x555555\n+#define RADIO_CRCPOLY_24BIT 0x0000065B /// ref: https://devzone.nordicsemi.com/f/nordic-q-a/44111/crc-register-values-for-a-24-bit-crc\n+\n+#define MAX_PAYLOAD_LENGTH (252)\n+#define INTERFRAM_SPACING (150) // in us\n+\n+#define BLE_ACCESS_ADDR 0x8E89BED6 // the actual address is 0xD6, 0xBE, 0x89, 0x8E\n//=========================== variables =======================================\n@@ -73,6 +81,7 @@ static radio_vars_t radio_vars;\nstatic uint32_t swap_bits(uint32_t inp);\nstatic uint32_t bytewise_bitswap(uint32_t inp);\n+static uint8_t ble_channel_to_frequency(channel);\n//=========================== public ==========================================\n@@ -134,6 +143,34 @@ void radio_init(void) {\nNVIC_EnableIRQ(RADIO_IRQn);\n}\n+void radio_ble_init(void){\n+\n+ NRF_RADIO->PCNF0 = (((1UL) << RADIO_PCNF0_S0LEN_Pos) & RADIO_PCNF0_S0LEN_Msk) |\n+ (((0UL) << RADIO_PCNF0_S1LEN_Pos) & RADIO_PCNF0_S1LEN_Msk) |\n+ (((8UL) << RADIO_PCNF0_LFLEN_Pos) & RADIO_PCNF0_LFLEN_Msk);\n+\n+ NRF_RADIO->PCNF1 = (((RADIO_PCNF1_ENDIAN_Little) << RADIO_PCNF1_ENDIAN_Pos) & RADIO_PCNF1_ENDIAN_Msk) |\n+ (((3UL) << RADIO_PCNF1_BALEN_Pos) & RADIO_PCNF1_BALEN_Msk) |\n+ (((0UL) << RADIO_PCNF1_STATLEN_Pos) & RADIO_PCNF1_STATLEN_Msk) |\n+ ((((uint32_t)MAX_PAYLOAD_LENGTH) << RADIO_PCNF1_MAXLEN_Pos) & RADIO_PCNF1_MAXLEN_Msk) |\n+ ((RADIO_PCNF1_WHITEEN_Enabled << RADIO_PCNF1_WHITEEN_Pos) & RADIO_PCNF1_WHITEEN_Msk);\n+\n+ NRF_RADIO->CRCPOLY = RADIO_CRCPOLY_24BIT;\n+ NRF_RADIO->CRCCNF = (\n+ ((RADIO_CRCCNF_SKIPADDR_Skip) << RADIO_CRCCNF_SKIPADDR_Pos) & RADIO_CRCCNF_SKIPADDR_Msk) |\n+ (((RADIO_CRCCNF_LEN_Three) << RADIO_CRCCNF_LEN_Pos) & RADIO_CRCCNF_LEN_Msk\n+ );\n+ NRF_RADIO->CRCINIT = RADIO_CRCINIT_24BIT;\n+\n+ NRF_RADIO->TXADDRESS = 0;\n+ NRF_RADIO->RXADDRESSES = 1;\n+\n+ NRF_RADIO->MODE = ((RADIO_MODE_MODE_Ble_1Mbit) << RADIO_MODE_MODE_Pos) & RADIO_MODE_MODE_Msk;\n+ NRF_RADIO->TIFS = INTERFRAM_SPACING;\n+ NRF_RADIO->PREFIX0 = ((BLE_ACCESS_ADDR & 0xff000000) >> 24);\n+ NRF_RADIO->BASE0 = ((BLE_ACCESS_ADDR & 0x00ffffff) << 8 );\n+}\n+\nvoid radio_setStartFrameCb(radio_capture_cbt cb) {\n@@ -164,6 +201,14 @@ void radio_setFrequency(uint8_t frequency, radio_freq_t tx_or_rx) {\nradio_vars.state = RADIOSTATE_FREQUENCY_SET;\n}\n+void radio_ble_setFrequency(uint8_t channel) {\n+\n+ NRF_RADIO->FREQUENCY = ble_channel_to_frequency(channel);\n+ NRF_RADIO->DATAWHITEIV = channel;\n+\n+ radio_vars.state = RADIOSTATE_FREQUENCY_SET;\n+}\n+\nint8_t radio_getFrequencyOffset(void){\nreturn 0;\n@@ -213,6 +258,21 @@ void radio_loadPacket(uint8_t* packet, uint16_t len) {\nradio_vars.state = RADIOSTATE_PACKET_LOADED;\n}\n+void radio_ble_loadPacket(uint8_t* packet, uint16_t len) {\n+ radio_vars.state = RADIOSTATE_LOADING_PACKET;\n+\n+ ///< note: 1st byte should be the payload size (for Nordic), and\n+ /// the two last bytes are used by the MAC layer for CRC\n+ if ((len > 0) && (len <= MAX_PACKET_SIZE)) {\n+ memcpy(&radio_vars.payload[0], packet, len);\n+ }\n+\n+ // (re)set payload pointer\n+ NRF_RADIO->PACKETPTR = (uint32_t)(radio_vars.payload);\n+\n+ radio_vars.state = RADIOSTATE_PACKET_LOADED;\n+}\n+\nvoid radio_txEnable(void) {\n@@ -311,6 +371,40 @@ void radio_getReceivedFrame(uint8_t* pBufRead,\n*pCrc = (NRF_RADIO->CRCSTATUS == 1U);\n}\n+void radio_ble_getReceivedFrame(uint8_t* pBufRead,\n+ uint8_t* pLenRead,\n+ uint8_t maxBufLen,\n+ int8_t* pRssi,\n+ uint8_t* pLqi,\n+ bool* pCrc)\n+{\n+ // check for length parameter; if too long, payload won't fit into memory\n+ uint8_t len;\n+\n+ len = radio_vars.payload[1];\n+\n+ if (len == 0) {\n+ return;\n+ }\n+\n+ if (len > MAX_PACKET_SIZE) {\n+ len = MAX_PACKET_SIZE;\n+ }\n+\n+ if (len > maxBufLen) {\n+ len = maxBufLen;\n+ }\n+\n+ // copy payload\n+ memcpy(pBufRead, &radio_vars.payload[0], len+3);\n+\n+ // store other parameters\n+ *pLenRead = len+2;\n+\n+ *pCrc = (NRF_RADIO->CRCSTATUS == 1U);\n+\n+}\n+\n//=========================== private =========================================\n@@ -337,6 +431,39 @@ static uint32_t bytewise_bitswap(uint32_t inp) {\n| (swap_bits(inp));\n}\n+static uint8_t ble_channel_to_frequency(channel) {\n+\n+ uint8_t frequency;\n+\n+ if (channel<=10) {\n+\n+ frequency = 4+2*channel;\n+ } else {\n+ if (channel >=11 && channel <=36) {\n+\n+ frequency = 28+2*(channel-11);\n+ } else {\n+ switch(channel){\n+ case 37:\n+ frequency = 2;\n+ break;\n+ case 38:\n+ frequency = 26;\n+ break;\n+ case 39:\n+ frequency = 80;\n+ break;\n+ default:\n+ // something goes wrong\n+ frequency = 2;\n+\n+ }\n+ }\n+ }\n+\n+ return frequency;\n+}\n+\n//=========================== callbacks =======================================\n"
},
{
"change_type": "ADD",
"old_path": null,
"new_path": "projects/nrf52840/01bsp_radio_ble/01bsp_radio_ble.c",
"diff": "+/**\n+\\brief This program shows the use of the \"radio\" bsp module.\n+\n+Since the bsp modules for different platforms have the same declaration, you\n+can use this project with any platform.\n+\n+After loading this program, your board will switch on its radio on frequency\n+CHANNEL.\n+\n+While receiving a packet (i.e. from the start of frame event to the end of\n+frame event), it will turn on its sync LED.\n+\n+Every TIMER_PERIOD, it will also send a packet containing LENGTH_PACKET bytes\n+set to ID. While sending a packet (i.e. from the start of frame event to the\n+end of frame event), it will turn on its error LED.\n+\n+\\author Tengfei Chang <tengfei.chang@inria.fr>, August 2020.\n+*/\n+\n+#include \"board.h\"\n+#include \"radio.h\"\n+#include \"leds.h\"\n+#include \"sctimer.h\"\n+#include \"radio_ble.h\"\n+\n+//=========================== defines =========================================\n+\n+#define LENGTH_PACKET 125+LENGTH_CRC ///< maximum length is 127 bytes\n+#define CHANNEL 37 ///< 2=2402MHz (adv channel 37)\n+#define TIMER_PERIOD (0xffff>>0) ///< 0xffff = 2s@32kHz\n+\n+const static uint8_t ble_device_addr[6] = {0x11, 0x22, 0x33, 0x44, 0x55, 0x66};\n+\n+//=========================== variables =======================================\n+\n+enum {\n+ APP_FLAG_START_FRAME = 0x01,\n+ APP_FLAG_END_FRAME = 0x02,\n+ APP_FLAG_TIMER = 0x04,\n+};\n+\n+typedef enum {\n+ APP_STATE_TX = 0x01,\n+ APP_STATE_RX = 0x02,\n+} app_state_t;\n+\n+typedef struct {\n+ uint8_t num_startFrame;\n+ uint8_t num_endFrame;\n+ uint8_t num_timer;\n+} app_dbg_t;\n+\n+app_dbg_t app_dbg;\n+\n+typedef struct {\n+ uint8_t flags;\n+ app_state_t state;\n+ uint8_t packet[LENGTH_PACKET];\n+ uint8_t packet_len;\n+ int8_t rxpk_rssi;\n+ uint8_t rxpk_lqi;\n+ bool rxpk_crc;\n+} app_vars_t;\n+\n+app_vars_t app_vars;\n+\n+//=========================== prototypes ======================================\n+\n+void cb_startFrame(PORT_TIMER_WIDTH timestamp);\n+void cb_endFrame(PORT_TIMER_WIDTH timestamp);\n+void cb_timer(void);\n+\n+void assemble_packet(void);\n+\n+//=========================== main ============================================\n+\n+/**\n+\\brief The program starts executing here.\n+*/\n+int mote_main(void) {\n+ uint8_t i;\n+\n+ uint8_t freq_offset;\n+ uint8_t sign;\n+ uint8_t read;\n+\n+ // clear local variables\n+ memset(&app_vars,0,sizeof(app_vars_t));\n+\n+ // initialize board\n+ board_init();\n+ radio_ble_init();\n+\n+ // add callback functions radio\n+ radio_setStartFrameCb(cb_startFrame);\n+ radio_setEndFrameCb(cb_endFrame);\n+\n+ // prepare packet\n+ app_vars.packet_len = sizeof(app_vars.packet);\n+\n+ // start bsp timer\n+ sctimer_set_callback(cb_timer);\n+ sctimer_setCompare(sctimer_readCounter()+TIMER_PERIOD);\n+ sctimer_enable();\n+\n+ // prepare radio\n+ radio_rfOn();\n+ // freq type only effects on scum port\n+ radio_ble_setFrequency(CHANNEL);\n+\n+ // switch in RX by default\n+ radio_rxEnable();\n+ app_vars.state = APP_STATE_RX;\n+\n+ // start by a transmit\n+ app_vars.flags |= APP_FLAG_TIMER;\n+\n+ while (1) {\n+\n+ // sleep while waiting for at least one of the flags to be set\n+ while (app_vars.flags==0x00) {\n+ board_sleep();\n+ }\n+\n+ // handle and clear every flag\n+ while (app_vars.flags) {\n+\n+\n+ //==== APP_FLAG_START_FRAME (TX or RX)\n+\n+ if (app_vars.flags & APP_FLAG_START_FRAME) {\n+ // start of frame\n+\n+ switch (app_vars.state) {\n+ case APP_STATE_RX:\n+ // started receiving a packet\n+\n+ // led\n+ leds_error_on();\n+ break;\n+ case APP_STATE_TX:\n+ // started sending a packet\n+\n+ // led\n+ leds_sync_on();\n+ break;\n+ }\n+\n+ // clear flag\n+ app_vars.flags &= ~APP_FLAG_START_FRAME;\n+ }\n+\n+ //==== APP_FLAG_END_FRAME (TX or RX)\n+\n+ if (app_vars.flags & APP_FLAG_END_FRAME) {\n+ // end of frame\n+\n+ switch (app_vars.state) {\n+\n+ case APP_STATE_RX:\n+\n+ // done receiving a packet\n+ app_vars.packet_len = sizeof(app_vars.packet);\n+\n+ // get packet from radio\n+ radio_ble_getReceivedFrame(\n+ app_vars.packet,\n+ &app_vars.packet_len,\n+ sizeof(app_vars.packet),\n+ &app_vars.rxpk_rssi,\n+ &app_vars.rxpk_lqi,\n+ &app_vars.rxpk_crc\n+ );\n+\n+ if (app_vars.packet_len==21) {\n+ for (i=0; i<app_vars.packet_len; i++){\n+\n+ printf(\"%x \",app_vars.packet[i]);\n+ }\n+ printf(\"\\r\\n\");\n+ }\n+\n+ // led\n+ leds_error_off();\n+\n+ // continue to listen\n+ radio_rxNow();\n+ break;\n+ case APP_STATE_TX:\n+ // done sending a packet\n+\n+ memset( app_vars.packet, 0x00, sizeof(app_vars.packet) );\n+\n+ // switch to RX mode\n+ radio_rxEnable();\n+ radio_rxNow();\n+ app_vars.state = APP_STATE_RX;\n+\n+ // led\n+ leds_sync_off();\n+ break;\n+ }\n+ // clear flag\n+ app_vars.flags &= ~APP_FLAG_END_FRAME;\n+ }\n+\n+ //==== APP_FLAG_TIMER\n+\n+ if (app_vars.flags & APP_FLAG_TIMER) {\n+ // timer fired\n+\n+ if (app_vars.state==APP_STATE_RX) {\n+ // stop listening\n+ radio_rfOff();\n+\n+ // prepare packet\n+ app_vars.packet_len = sizeof(app_vars.packet);\n+\n+ assemble_packet();\n+\n+ // start transmitting packet\n+ radio_ble_loadPacket(app_vars.packet,LENGTH_PACKET);\n+ radio_txEnable();\n+ radio_txNow();\n+\n+ app_vars.state = APP_STATE_TX;\n+ }\n+\n+ // clear flag\n+ app_vars.flags &= ~APP_FLAG_TIMER;\n+ }\n+ }\n+ }\n+}\n+//=========================== private =========================================\n+\n+void assemble_packet(void) {\n+\n+ uint8_t i;\n+ memset( app_vars.packet, 0x00, sizeof(app_vars.packet) );\n+ i=0;\n+ app_vars.packet[i++] = 0x42; // BLE advertisement type (non-connectable)\n+ app_vars.packet[i++] = 0x13; // Payload length: 14\n+ app_vars.packet[i++] = ble_device_addr[0]; // BLE adv address byte 0\n+ app_vars.packet[i++] = ble_device_addr[1]; // BLE adv address byte 1\n+ app_vars.packet[i++] = ble_device_addr[2]; // BLE adv address byte 2\n+ app_vars.packet[i++] = ble_device_addr[3]; // BLE adv address byte 3\n+ app_vars.packet[i++] = ble_device_addr[4]; // BLE adv address byte 4\n+ app_vars.packet[i++] = ble_device_addr[5]; // BLE adv address byte 5\n+ app_vars.packet[i++] = 0x02; // BLE adv payload byte 0, AD group 1 length byte\n+ app_vars.packet[i++] = 0x01; // BLE adv payload byte 1, AD group 1 type byte (flags)\n+ app_vars.packet[i++] = 0x06; // BLE adv payload byte 2, AD group 1 payload\n+ app_vars.packet[i++] = 0x04; // BLE adv payload byte 3, AD group 2 length byte\n+ app_vars.packet[i++] = 0xff; // BLE adv payload byte 4, AD group 2 type byte (manufacturer-specific data)\n+ app_vars.packet[i++] = 0x29; // BLE adv payload byte 5, AD group 2 payload (SwaraLink Technologies ID)\n+ app_vars.packet[i++] = 0x07; // BLE adv payload byte 6, AD group 2 payload (SwaraLink Technologies ID)\n+ app_vars.packet[i++] = 0xbe; // BLE adv payload byte 7, AD group 2 payload (byte to send)\n+ app_vars.packet[i++] = 0x04; // BLE adv payload byte 8, AD group 3 length byte\n+ app_vars.packet[i++] = 0x08; // BLE adv payload byte 9, AD group 3 type byte (short local name)\n+ app_vars.packet[i++] = 'x'; // BLE adv payload byte 10, AD group 3 payload (name \"xyz\")\n+ app_vars.packet[i++] = 'y'; // BLE adv payload byte 11, AD group 3 payload (name \"xyz\")\n+ app_vars.packet[i++] = 'z'; // BLE adv payload byte 12, AD group 3 payload (name \"xyz\")\n+}\n+\n+//=========================== callbacks =======================================\n+\n+void cb_startFrame(PORT_TIMER_WIDTH timestamp) {\n+ // set flag\n+ app_vars.flags |= APP_FLAG_START_FRAME;\n+\n+ // update debug stats\n+ app_dbg.num_startFrame++;\n+}\n+\n+void cb_endFrame(PORT_TIMER_WIDTH timestamp) {\n+ // set flag\n+ app_vars.flags |= APP_FLAG_END_FRAME;\n+\n+ // update debug stats\n+ app_dbg.num_endFrame++;\n+}\n+\n+void cb_timer(void) {\n+ // set flag\n+ app_vars.flags |= APP_FLAG_TIMER;\n+\n+ // update debug stats\n+ app_dbg.num_timer++;\n+\n+ sctimer_setCompare(sctimer_readCounter()+TIMER_PERIOD);\n+}\n\\ No newline at end of file\n"
},
{
"change_type": "ADD",
"old_path": null,
"new_path": "projects/nrf52840/01bsp_radio_ble/01bsp_radio_ble.emProject",
"diff": "+<!DOCTYPE CrossStudio_Project_File>\n+<solution Name=\"01bsp_radio_ble\" target=\"8\" version=\"2\">\n+ <project Name=\"01bsp_radio_ble\">\n+ <configuration\n+ Name=\"Common\"\n+ arm_architecture=\"v7EM\"\n+ arm_core_type=\"Cortex-M4\"\n+ arm_endian=\"Little\"\n+ arm_fp_abi=\"Hard\"\n+ arm_fpu_type=\"FPv4-SP-D16\"\n+ arm_linker_heap_size=\"131072\"\n+ arm_linker_process_stack_size=\"0\"\n+ arm_linker_stack_size=\"65536\"\n+ arm_linker_treat_warnings_as_errors=\"No\"\n+ arm_simulator_memory_simulation_parameter=\"RWX 00000000,00100000,FFFFFFFF;RWX 20000000,00010000,CDCDCDCD\"\n+ arm_target_device_name=\"nRF52840_xxAA\"\n+ arm_target_interface_type=\"SWD\"\n+ c_preprocessor_definitions=\"BSP_DEFINES_ONLY;FLOAT_ABI_HARD;INITIALIZE_USER_SECTIONS;NO_VTOR_CONFIG;ARM_MATH_CM4;__FPU_PRESENT=1;USE_APP_CONFIG=1;NRF52840_XXAA=1;BOARD_PCA10056=1;CONFIG_GPIO_AS_PINRESET=1;DAGROOT=1\"\n+ c_user_include_directories=\"../../../drivers/common;../../../inc;../../../kernel;../../../openapps;../../../openapps/c6t;../../../openapps/cinfo;../../../openapps/cjoin;../../../openapps/cleds;../../../openapps/cwellknown;../../../openapps/opencoap;../../../openapps/rrt;../../../openapps/uecho;../../../openapps/uexpiration;../../../openapps/uexpiration_monitor;../../../openapps/uinject;../../../openapps/userialbridge;../../../openstack;../../../openstack/02a-MAClow;../../../openstack/02b-MAChigh;../../../openstack/03a-IPHC;../../../openstack/03b-IPv6;../../../openstack/04-TRAN;../../../openstack/cross-layers;../../../bsp/boards/nrf52840;../../../bsp/boards/nrf52840/sdk/config/nrf52840/config;../../../bsp/boards/nrf52840/sdk/integration/nrfx;../../../bsp/boards/nrf52840/sdk/components/toolchain/cmsis/include;../../../bsp/boards/nrf52840/sdk/components/drivers_nrf/nrf_soc_nosd;../../../bsp/boards/nrf52840/sdk/components/libraries/atomic;../../../bsp/boards/nrf52840/sdk/components/libraries/balloc;../../../bsp/boards/nrf52840/sdk/components/libraries/delay;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_log;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_log/src;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_memobj;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_section_vars;../../../bsp/boards/nrf52840/sdk/components/libraries/mutex;../../../bsp/boards/nrf52840/sdk/components/libraries/strerror;../../../bsp/boards/nrf52840/sdk/components/libraries/uart;../../../bsp/boards/nrf52840/sdk/components/libraries/util;../../../bsp/boards/nrf52840/sdk/integration/nrfx/legacy;../../../bsp/boards/nrf52840/sdk/modules/nrfx;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/include;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src/prs;../../../bsp/boards/nrf52840/sdk/modules/nrfx/hal;../../../bsp/boards/nrf52840/sdk/modules/nrfx/mdk;../../../bsp/boards/nrf52840/sdk/modules/nrfx/soc;../../../bsp/boards/nrf52840/sdk/modules/nrfx/templates;../../../bsp/boards/nrf52840/sdk/components/drivers_nrf/radio_config;../../../bsp/boards\"\n+ debug_register_definition_file=\"../../../bsp/boards/nrf52840/sdk/modules/nrfx/mdk/nrf52840.svd\"\n+ debug_start_from_entry_point_symbol=\"No\"\n+ debug_target_connection=\"J-Link\"\n+ gcc_debugging_level=\"Level 3\"\n+ gcc_entry_point=\"Reset_Handler\"\n+ linker_output_format=\"hex\"\n+ linker_printf_fmt_level=\"long\"\n+ linker_printf_fp_enabled=\"Float\"\n+ linker_printf_width_precision_supported=\"Yes\"\n+ linker_section_placement_file=\"flash_placement.xml\"\n+ linker_section_placement_macros=\"FLASH_PH_START=0x0;FLASH_PH_SIZE=0x100000;RAM_PH_START=0x20000000;RAM_PH_SIZE=0x40000;FLASH_START=0x0;FLASH_SIZE=0x100000;RAM_START=0x20000000;RAM_SIZE=0x40000\"\n+ linker_section_placements_segments=\"FLASH RX 0x0 0x100000;RAM RWX 0x20000000 0x40000\"\n+ macros=\"CMSIS_CONFIG_TOOL=../../../bsp/boards/nrf52840/sdk/external_tools/cmsisconfig/CMSIS_Configuration_Wizard.jar\"\n+ project_directory=\"\"\n+ project_type=\"Executable\" />\n+ <folder Name=\"Application\">\n+ <file file_name=\"../../../bsp/boards/nrf52840/app_config.h\" />\n+ <file file_name=\"01bsp_radio_ble.c\" />\n+ </folder>\n+ <folder Name=\"Segger ES Specific\">\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/modules/nrfx/mdk/ses_nRF_Startup.s\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/modules/nrfx/mdk/ses_nrf52840_Vectors.s\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/modules/nrfx/mdk/system_nrf52840.c\" />\n+ <folder Name=\"Segger Startup Files\">\n+ <file file_name=\"$(StudioDir)/source/thumb_crt0.s\" />\n+ </folder>\n+ </folder>\n+ <folder Name=\"OpenWSN\">\n+ <folder Name=\"bsp\">\n+ <file file_name=\"../../../bsp/boards/nrf52840/board.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/board_info.h\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/debugpins.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/eui64.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/leds.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/radio.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sctimer.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/spi.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/uart.c\" />\n+ <file file_name=\"../../../bsp/boards/board.h\" />\n+ <file file_name=\"../../../bsp/boards/cryptoengine.h\" />\n+ <file file_name=\"../../../bsp/boards/debugpins.h\" />\n+ <file file_name=\"../../../bsp/boards/eui64.h\" />\n+ <file file_name=\"../../../bsp/boards/i2c.h\" />\n+ <file file_name=\"../../../bsp/boards/leds.h\" />\n+ <file file_name=\"../../../bsp/boards/radio.h\" />\n+ <file file_name=\"../../../bsp/boards/sctimer.h\" />\n+ <file file_name=\"../../../bsp/boards/sensors.h\" />\n+ <file file_name=\"../../../bsp/boards/spi.h\" />\n+ <file file_name=\"../../../bsp/boards/toolchain_defs.h\" />\n+ <file file_name=\"../../../bsp/boards/uart.h\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/cryptoengine.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/adc_sensor.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/i2c.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sensors.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/radio_ble.h\" />\n+ </folder>\n+ </folder>\n+ <folder Name=\"Nordic SDK15 Specific\">\n+ <folder Name=\"nRF_Drivers\">\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/integration/nrfx/legacy/nrf_drv_spi.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/integration/nrfx/legacy/nrf_drv_uart.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src/nrfx_spi.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src/nrfx_uart.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src/nrfx_clock.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_section_vars/nrf_section_iter.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/components/libraries/pwr_mgmt/nrf_pwr_mgmt.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/components/libraries/uart/app_uart.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/components/libraries/util/app_util_platform.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/integration/nrfx/legacy/nrf_drv_clock.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src/nrfx_power.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/components/libraries/util/nrf_assert.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/components/libraries/util/app_error.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/components/libraries/util/app_error_handler_gcc.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/components/libraries/util/app_error_weak.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/components/libraries/strerror/nrf_strerror.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/nrfx_rtc_hack.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src/nrfx_twi.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src/nrfx_systick.c\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src/nrfx_saadc.c\" />\n+ </folder>\n+ <folder Name=\"nRF_Libraries\" />\n+ <folder Name=\"Board Definition\">\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/components/boards/boards.c\" />\n+ </folder>\n+ <folder Name=\"CMSIS DSP\">\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/components/toolchain/cmsis/include/arm_math.h\" />\n+ <file file_name=\"../../../bsp/boards/nrf52840/sdk/components/toolchain/cmsis/include/core_cm4.h\" />\n+ </folder>\n+ </folder>\n+ <configuration\n+ Name=\"Debug\"\n+ c_preprocessor_definitions=\"NRF52840\"\n+ gcc_optimization_level=\"None\" />\n+ <configuration Name=\"Release\" gcc_optimization_level=\"Level 3\" />\n+ </project>\n+ <configuration\n+ Name=\"Release\"\n+ c_preprocessor_definitions=\"NDEBUG\"\n+ gcc_optimization_level=\"Optimize For Size\" />\n+ <configuration\n+ Name=\"Debug\"\n+ c_preprocessor_definitions=\"DEBUG; DEBUG_NRF\"\n+ gcc_optimization_level=\"None\" />\n+</solution>\n"
},
{
"change_type": "ADD",
"old_path": null,
"new_path": "projects/nrf52840/01bsp_radio_ble/flash_placement.xml",
"diff": "+<!DOCTYPE Linker_Placement_File>\n+<Root name=\"Flash Section Placement\">\n+ <MemorySegment name=\"FLASH\" start=\"$(FLASH_PH_START)\" size=\"$(FLASH_PH_SIZE)\">\n+ <ProgramSection alignment=\"0x100\" load=\"Yes\" name=\".vectors\" start=\"$(FLASH_START)\" />\n+ <ProgramSection alignment=\"4\" load=\"Yes\" name=\".init\" />\n+ <ProgramSection alignment=\"4\" load=\"Yes\" name=\".init_rodata\" />\n+ <ProgramSection alignment=\"4\" load=\"Yes\" name=\".text\" />\n+ <ProgramSection alignment=\"4\" keep=\"Yes\" load=\"Yes\" name=\".log_const_data\" inputsections=\"*(SORT(.log_const_data*))\" address_symbol=\"__start_log_const_data\" end_symbol=\"__stop_log_const_data\" />\n+ <ProgramSection alignment=\"4\" keep=\"Yes\" load=\"Yes\" name=\".nrf_balloc\" inputsections=\"*(.nrf_balloc*)\" address_symbol=\"__start_nrf_balloc\" end_symbol=\"__stop_nrf_balloc\" />\n+ <ProgramSection alignment=\"4\" keep=\"Yes\" load=\"No\" name=\".nrf_sections\" address_symbol=\"__start_nrf_sections\" />\n+ <ProgramSection alignment=\"4\" keep=\"Yes\" load=\"Yes\" name=\".log_dynamic_data\" inputsections=\"*(SORT(.log_dynamic_data*))\" runin=\".log_dynamic_data_run\"/>\n+ <ProgramSection alignment=\"4\" load=\"Yes\" name=\".dtors\" />\n+ <ProgramSection alignment=\"4\" load=\"Yes\" name=\".ctors\" />\n+ <ProgramSection alignment=\"4\" load=\"Yes\" name=\".rodata\" />\n+ <ProgramSection alignment=\"4\" load=\"Yes\" name=\".ARM.exidx\" address_symbol=\"__exidx_start\" end_symbol=\"__exidx_end\" />\n+ <ProgramSection alignment=\"4\" load=\"Yes\" runin=\".fast_run\" name=\".fast\" />\n+ <ProgramSection alignment=\"4\" load=\"Yes\" runin=\".data_run\" name=\".data\" />\n+ <ProgramSection alignment=\"4\" load=\"Yes\" runin=\".tdata_run\" name=\".tdata\" />\n+ <ProgramSection alignment=\"4\" load=\"Yes\" name=\".pwr_mgmt_data\" address_symbol=\"__start_pwr_mgmt_data\" end_symbol=\"__stop_pwr_mgmt_data\" />\n+ </MemorySegment>\n+ <MemorySegment name=\"RAM\" start=\"$(RAM_PH_START)\" size=\"$(RAM_PH_SIZE)\">\n+ <ProgramSection alignment=\"0x100\" load=\"No\" name=\".vectors_ram\" start=\"$(RAM_START)\" address_symbol=\"__app_ram_start__\"/>\n+ <ProgramSection alignment=\"4\" keep=\"Yes\" load=\"No\" name=\".nrf_sections_run\" address_symbol=\"__start_nrf_sections_run\" />\n+ <ProgramSection alignment=\"4\" keep=\"Yes\" load=\"No\" name=\".log_dynamic_data_run\" address_symbol=\"__start_log_dynamic_data\" end_symbol=\"__stop_log_dynamic_data\" />\n+ <ProgramSection alignment=\"4\" keep=\"Yes\" load=\"No\" name=\".nrf_sections_run_end\" address_symbol=\"__end_nrf_sections_run\" />\n+ <ProgramSection alignment=\"4\" load=\"No\" name=\".fast_run\" />\n+ <ProgramSection alignment=\"4\" load=\"No\" name=\".data_run\" />\n+ <ProgramSection alignment=\"4\" load=\"No\" name=\".tdata_run\" />\n+ <ProgramSection alignment=\"4\" load=\"No\" name=\".bss\" />\n+ <ProgramSection alignment=\"4\" load=\"No\" name=\".tbss\" />\n+ <ProgramSection alignment=\"4\" load=\"No\" name=\".non_init\" />\n+ <ProgramSection alignment=\"4\" size=\"__HEAPSIZE__\" load=\"No\" name=\".heap\" />\n+ <ProgramSection alignment=\"8\" size=\"__STACKSIZE__\" load=\"No\" place_from_segment_end=\"Yes\" name=\".stack\" address_symbol=\"__StackLimit\" end_symbol=\"__StackTop\"/>\n+ <ProgramSection alignment=\"8\" size=\"__STACKSIZE_PROCESS__\" load=\"No\" name=\".stack_process\" />\n+ </MemorySegment>\n+</Root>\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-882. create bsp_radio_ble for nrf52840 to transmit and receive ibeacon
|
491,595 |
06.08.2020 13:26:35
| -7,200 |
0a1316b986a89abe04c78b47486b548a391009b2
|
form ibeacon packet.
|
[
{
"change_type": "MODIFY",
"old_path": "projects/nrf52840/01bsp_radio_ble/01bsp_radio_ble.c",
"new_path": "projects/nrf52840/01bsp_radio_ble/01bsp_radio_ble.c",
"diff": "@@ -26,10 +26,21 @@ end of frame event), it will turn on its error LED.\n//=========================== defines =========================================\n#define LENGTH_PACKET 125+LENGTH_CRC ///< maximum length is 127 bytes\n-#define CHANNEL 37 ///< 2=2402MHz (adv channel 37)\n-#define TIMER_PERIOD (0xffff>>0) ///< 0xffff = 2s@32kHz\n+#define CHANNEL 38 ///< 0~39\n+#define TIMER_PERIOD (0xffff>>1) ///< 0xffff = 2s@32kHz\n+#define TXPOWER 0xE2 ///< 2's complement format, 0xE2 = -30dbm\n-const static uint8_t ble_device_addr[6] = {0x11, 0x22, 0x33, 0x44, 0x55, 0x66};\n+const static uint8_t ble_device_addr[6] = {\n+ 0xaa, 0xbb, 0xcc, 0xcc, 0xbb, 0xaa\n+};\n+\n+// get from https://openuuid.net/signin/: a24e7112-a03f-4623-bb56-ae67bd653c73\n+const static uint8_t ble_uuid[16] = {\n+\n+ 0xa2, 0x4e, 0x71, 0x12, 0xa0, 0x3f,\n+ 0x46, 0x23, 0xbb, 0x56, 0xae, 0x67,\n+ 0xbd, 0x65, 0x3c, 0x73\n+};\n//=========================== variables =======================================\n@@ -70,7 +81,7 @@ void cb_startFrame(PORT_TIMER_WIDTH timestamp);\nvoid cb_endFrame(PORT_TIMER_WIDTH timestamp);\nvoid cb_timer(void);\n-void assemble_packet(void);\n+void assemble_ibeacon_packet(void);\n//=========================== main ============================================\n@@ -172,14 +183,6 @@ int mote_main(void) {\n&app_vars.rxpk_crc\n);\n- if (app_vars.packet_len==21) {\n- for (i=0; i<app_vars.packet_len; i++){\n-\n- printf(\"%x \",app_vars.packet[i]);\n- }\n- printf(\"\\r\\n\");\n- }\n-\n// led\nleds_error_off();\n@@ -216,7 +219,7 @@ int mote_main(void) {\n// prepare packet\napp_vars.packet_len = sizeof(app_vars.packet);\n- assemble_packet();\n+ assemble_ibeacon_packet();\n// start transmitting packet\nradio_ble_loadPacket(app_vars.packet,LENGTH_PACKET);\n@@ -234,32 +237,40 @@ int mote_main(void) {\n}\n//=========================== private =========================================\n-void assemble_packet(void) {\n+void assemble_ibeacon_packet(void) {\nuint8_t i;\n- memset( app_vars.packet, 0x00, sizeof(app_vars.packet) );\ni=0;\n- app_vars.packet[i++] = 0x42; // BLE advertisement type (non-connectable)\n- app_vars.packet[i++] = 0x13; // Payload length: 14\n+\n+ memset( app_vars.packet, 0x00, sizeof(app_vars.packet) );\n+\n+ app_vars.packet[i++] = 0x42; // BLE ADV_SCAN_IND\n+ app_vars.packet[i++] = 0x24; // Payload length\napp_vars.packet[i++] = ble_device_addr[0]; // BLE adv address byte 0\napp_vars.packet[i++] = ble_device_addr[1]; // BLE adv address byte 1\napp_vars.packet[i++] = ble_device_addr[2]; // BLE adv address byte 2\napp_vars.packet[i++] = ble_device_addr[3]; // BLE adv address byte 3\napp_vars.packet[i++] = ble_device_addr[4]; // BLE adv address byte 4\napp_vars.packet[i++] = ble_device_addr[5]; // BLE adv address byte 5\n- app_vars.packet[i++] = 0x02; // BLE adv payload byte 0, AD group 1 length byte\n- app_vars.packet[i++] = 0x01; // BLE adv payload byte 1, AD group 1 type byte (flags)\n- app_vars.packet[i++] = 0x06; // BLE adv payload byte 2, AD group 1 payload\n- app_vars.packet[i++] = 0x04; // BLE adv payload byte 3, AD group 2 length byte\n- app_vars.packet[i++] = 0xff; // BLE adv payload byte 4, AD group 2 type byte (manufacturer-specific data)\n- app_vars.packet[i++] = 0x29; // BLE adv payload byte 5, AD group 2 payload (SwaraLink Technologies ID)\n- app_vars.packet[i++] = 0x07; // BLE adv payload byte 6, AD group 2 payload (SwaraLink Technologies ID)\n- app_vars.packet[i++] = 0xbe; // BLE adv payload byte 7, AD group 2 payload (byte to send)\n- app_vars.packet[i++] = 0x04; // BLE adv payload byte 8, AD group 3 length byte\n- app_vars.packet[i++] = 0x08; // BLE adv payload byte 9, AD group 3 type byte (short local name)\n- app_vars.packet[i++] = 'x'; // BLE adv payload byte 10, AD group 3 payload (name \"xyz\")\n- app_vars.packet[i++] = 'y'; // BLE adv payload byte 11, AD group 3 payload (name \"xyz\")\n- app_vars.packet[i++] = 'z'; // BLE adv payload byte 12, AD group 3 payload (name \"xyz\")\n+\n+ app_vars.packet[i++] = 0x02;\n+ app_vars.packet[i++] = 0x01;\n+ app_vars.packet[i++] = 0x06;\n+\n+ app_vars.packet[i++] = 0x1a;\n+ app_vars.packet[i++] = 0xff;\n+ app_vars.packet[i++] = 0x4c;\n+ app_vars.packet[i++] = 0x00;\n+\n+ app_vars.packet[i++] = 0x02;\n+ app_vars.packet[i++] = 0x15;\n+ memcpy(&app_vars.packet[i], &ble_uuid[0], 16);\n+ i += 16;\n+ app_vars.packet[i++] = 0x00; // major\n+ app_vars.packet[i++] = 0xff;\n+ app_vars.packet[i++] = 0x00; // minor\n+ app_vars.packet[i++] = 0x0f;\n+ app_vars.packet[i++] = TXPOWER; // power level\n}\n//=========================== callbacks =======================================\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-882. form ibeacon packet.
|
491,595 |
06.08.2020 13:48:13
| -7,200 |
6355c741b11473a5bab3331af760ddad76719f00
|
mark MAX_PAYLOAD_SIZE to 127
|
[
{
"change_type": "MODIFY",
"old_path": "bsp/boards/nrf52840/radio.c",
"new_path": "bsp/boards/nrf52840/radio.c",
"diff": "#define RADIO_CRCINIT_24BIT 0x555555\n#define RADIO_CRCPOLY_24BIT 0x0000065B /// ref: https://devzone.nordicsemi.com/f/nordic-q-a/44111/crc-register-values-for-a-24-bit-crc\n-#define MAX_PAYLOAD_LENGTH (252)\n+#define MAX_PAYLOAD_LENGTH (127)\n#define INTERFRAM_SPACING (150) // in us\n#define BLE_ACCESS_ADDR 0x8E89BED6 // the actual address is 0xD6, 0xBE, 0x89, 0x8E\n@@ -396,7 +396,7 @@ void radio_ble_getReceivedFrame(uint8_t* pBufRead,\n}\n// copy payload\n- memcpy(pBufRead, &radio_vars.payload[0], len+3);\n+ memcpy(pBufRead, &radio_vars.payload[0], len+2);\n// store other parameters\n*pLenRead = len+2;\n"
},
{
"change_type": "MODIFY",
"old_path": "projects/nrf52840/01bsp_radio_ble/01bsp_radio_ble.c",
"new_path": "projects/nrf52840/01bsp_radio_ble/01bsp_radio_ble.c",
"diff": "@@ -28,7 +28,7 @@ end of frame event), it will turn on its error LED.\n#define LENGTH_PACKET 125+LENGTH_CRC ///< maximum length is 127 bytes\n#define CHANNEL 38 ///< 0~39\n#define TIMER_PERIOD (0xffff>>1) ///< 0xffff = 2s@32kHz\n-#define TXPOWER 0xE2 ///< 2's complement format, 0xE2 = -30dbm\n+#define TXPOWER 0xD5 ///< 2's complement format, 0xD8 = -40dbm\nconst static uint8_t ble_device_addr[6] = {\n0xaa, 0xbb, 0xcc, 0xcc, 0xbb, 0xaa\n@@ -244,8 +244,8 @@ void assemble_ibeacon_packet(void) {\nmemset( app_vars.packet, 0x00, sizeof(app_vars.packet) );\n- app_vars.packet[i++] = 0x42; // BLE ADV_SCAN_IND\n- app_vars.packet[i++] = 0x24; // Payload length\n+ app_vars.packet[i++] = 0x42; // BLE ADV_NONCONN_IND (this is a must)\n+ app_vars.packet[i++] = 0x21; // Payload length\napp_vars.packet[i++] = ble_device_addr[0]; // BLE adv address byte 0\napp_vars.packet[i++] = ble_device_addr[1]; // BLE adv address byte 1\napp_vars.packet[i++] = ble_device_addr[2]; // BLE adv address byte 2\n@@ -253,10 +253,6 @@ void assemble_ibeacon_packet(void) {\napp_vars.packet[i++] = ble_device_addr[4]; // BLE adv address byte 4\napp_vars.packet[i++] = ble_device_addr[5]; // BLE adv address byte 5\n- app_vars.packet[i++] = 0x02;\n- app_vars.packet[i++] = 0x01;\n- app_vars.packet[i++] = 0x06;\n-\napp_vars.packet[i++] = 0x1a;\napp_vars.packet[i++] = 0xff;\napp_vars.packet[i++] = 0x4c;\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-882. mark MAX_PAYLOAD_SIZE to 127
|
491,595 |
06.08.2020 13:51:13
| -7,200 |
f02d97cfc33c7fefd2c0210656ee4ba191e26dce
|
beacon sending speed x2
|
[
{
"change_type": "MODIFY",
"old_path": "projects/nrf52840/01bsp_radio_ble/01bsp_radio_ble.c",
"new_path": "projects/nrf52840/01bsp_radio_ble/01bsp_radio_ble.c",
"diff": "@@ -27,7 +27,7 @@ end of frame event), it will turn on its error LED.\n#define LENGTH_PACKET 125+LENGTH_CRC ///< maximum length is 127 bytes\n#define CHANNEL 38 ///< 0~39\n-#define TIMER_PERIOD (0xffff>>1) ///< 0xffff = 2s@32kHz\n+#define TIMER_PERIOD (0xffff>>2) ///< 0xffff = 2s@32kHz\n#define TXPOWER 0xD5 ///< 2's complement format, 0xD8 = -40dbm\nconst static uint8_t ble_device_addr[6] = {\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-882. beacon sending speed x2
|
491,595 |
10.08.2020 13:45:29
| -7,200 |
80eeb936e5dcc1245f4c1ac5830672654965de9f
|
Fixed the compilation error for drv_openserail project
|
[
{
"change_type": "MODIFY",
"old_path": "bsp/boards/openmote-b-24ghz/cc2538sf53.lds",
"new_path": "bsp/boards/openmote-b-24ghz/cc2538sf53.lds",
"diff": "@@ -53,6 +53,9 @@ SECTIONS\n*(.bss*)\n*(COMMON)\n_ebss = .;\n+ __bss_end__ = .;\n+ _end = __bss_end__;\n+ end = _end;\n} > SRAM\n.flashcca :\n"
},
{
"change_type": "MODIFY",
"old_path": "projects/common/02drv_openserial/02drv_openserial.c",
"new_path": "projects/common/02drv_openserial/02drv_openserial.c",
"diff": "@@ -73,7 +73,7 @@ int mote_main(void) {\ndebugpins_task_set();\nif (app_vars.timerFired==TRUE) {\napp_vars.timerFired = FALSE;\n- openserial_print_str(stringToPrint, sizeof(stringToPrint));\n+ openserial_printf(\"%s\",stringToPrint);\nif (app_vars.fInhibit==TRUE) {\ndebugpins_slot_clr();\nopenserial_inhibitStart();\n@@ -181,3 +181,6 @@ bool debugPrint_neighbors(void) {\nbool debugPrint_joined(void) {\nreturn FALSE;\n}\n+bool debugPrint_msf(void) {\n+ return FALSE;\n+}\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-833. Fixed the compilation error for drv_openserail project
|
491,595 |
17.08.2020 15:45:49
| -7,200 |
3aa498c53f10fd556d220d8729c7b88aabc979c3
|
commit radio_ble.h file.
|
[
{
"change_type": "ADD",
"old_path": null,
"new_path": "bsp/boards/nrf52840/radio_ble.h",
"diff": "+#ifndef __RADIO_BLE_H\n+#define __RADIO_BLE_H\n+\n+/**\n+\n+\\brief declaration \"radio_ble\" bsp module.\n+\n+\\author Tengfei Chang <tengfei.chang@inria.fr>, August 2020.\n+*/\n+\n+//=========================== define ==========================================\n+\n+//=========================== typedef =========================================\n+\n+//=========================== variables =======================================\n+\n+//=========================== prototypes ======================================\n+\n+// admin\n+void radio_ble_init(void);\n+void radio_ble_setFrequency(uint8_t channel);\n+void radio_ble_loadPacket(uint8_t* packet, uint16_t len);\n+void radio_ble_getReceivedFrame(uint8_t* pBufRead,\n+ uint8_t* pLenRead,\n+ uint8_t maxBufLen,\n+ int8_t* pRssi,\n+ uint8_t* pLqi,\n+ bool* pCrc);\n+\n+/**\n+\\}\n+\\}\n+*/\n+\n+#endif\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-882. commit radio_ble.h file.
|
491,587 |
27.08.2020 12:34:54
| -7,200 |
3d518ec0ba4596ffb8147ee3922714c46409d7b9
|
Remove unused IDE options
|
[
{
"change_type": "MODIFY",
"old_path": "SConscript",
"new_path": "SConscript",
"diff": "@@ -9,7 +9,6 @@ import SCons\nimport colorama as c\nimport distutils.sysconfig\nimport sconsUtils\n-from tools import qtcreator as q\nImport('env')\n@@ -611,12 +610,6 @@ else:\nprint c.Fore.RED + 'Unexpected toolchain {0}'.format(env['toolchain']) + c.Fore.RESET\nExit(-1)\n-if env['ide'] == 'qtcreator':\n- print env['board']\n- q.QtCreatorManager().initialize(env['board'])\n-else:\n- print env['ide']\n-\n# ============================ upload over JTAG ================================\n"
},
{
"change_type": "MODIFY",
"old_path": "SConstruct",
"new_path": "SConstruct",
"diff": "@@ -78,8 +78,6 @@ project:\ncannot send commands to the mote (e.g. IoT-LAB platform),\nuse this flag to build a firmware image which is, by\ndefault, in DAG root mode.\n- ide qtcreator\n-\nCommon variables:\nverbose Print each complete compile/link command.\n0 (off), 1 (on)\n@@ -142,7 +140,6 @@ command_line_options = {\n'debug': ['0', '1'],\n'atmel_24ghz': ['0', '1'],\n'deadline_option': ['0', '1'],\n- 'ide': ['none', 'qtcreator'],\n'revision': ['']\n}\n@@ -270,13 +267,6 @@ command_line_vars.AddVariables(\nvalidate_option, # validator\nint, # converter\n),\n- (\n- 'ide', # key\n- 'qtcreator by now', # help\n- command_line_options['ide'][0], # default\n- validate_option, # validator\n- None, # converter\n- ),\n(\n'revision', # key\n'board revision', # help\n"
},
{
"change_type": "DELETE",
"old_path": "tools/__init__.py",
"new_path": "tools/__init__.py",
"diff": ""
},
{
"change_type": "DELETE",
"old_path": "tools/qtcreator.py",
"new_path": null,
"diff": "-#!/usr/bin/python\n-\n-import os\n-import subprocess\n-import sys\n-import getopt\n-\n-from distutils.spawn import find_executable\n-\n-class QtCreatorManager():\n-\n- def __init__(self):\n-\n- self.current_dir = \".\"\n- self.home_dir = \"..\"\n-\n- self.ignore_folders = ['.git', 'build', 'tools', 'docs', 'site_scons']\n-\n- self.src_extensions = ['.c', '.cpp', '.h', '.hpp', '.py', '.env']\n- self.hdr_extensions = ['.h', '.hpp']\n-\n- self.platform_dir = ''\n- self.common_platform_dir = ''\n- self.board_dir = ''\n- self.bootloader_dir = ''\n- self.projects_dir = ''\n- self.common_projects_dir = ''\n- self.bootloader_platform = ''\n- self.projects_platform = ''\n- self.drivers_dir = ''\n- self.drivers_platform = ''\n- self.common_drivers_dir = ''\n- self.drivers_dir = ''\n- self.drivers_platform = ''\n-\n- self.qtcreator_bin = \"qtcreator\"\n- self.qtcreator_project = \"tools/qtcreator\"\n- self.qtcreator_creator = \"OpenWSN.creator\"\n- self.qtcreator_files = \"OpenWSN.files\"\n- self.qtcreator_includes = \"OpenWSN.includes\"\n- self.qtcreator_default = [\"-noload\", \"Welcome\", \"-noload\", \"QmlDesigner\", \"-noload\", \"QmlProfiler\"]\n-\n- self.platform = \"OpenMote-CC2538\"\n-\n-\n-\n- # Determines valid folders\n- def is_valid_folder(self,path):\n- result = False\n-\n- if path not in self.ignore_folders:\n- result = True\n-\n- return result\n-\n- # Returns all folders in the current path\n- def get_all_folders(self,path):\n- result = []\n- folders = next(os.walk(path))\n-\n- for f in folders[1]:\n- if self.is_valid_folder(f):\n- f = os.path.abspath(f)\n- result.append(f)\n- return result\n-\n- # Determines if it is a valid source file\n- def is_valid_source_file(self,path):\n- name, extension = os.path.splitext(path)\n- if extension in self.src_extensions:\n- return True\n- return False\n-\n- # Determines if it is a valid header directory\n- def is_valid_header_dir(self,path):\n- name, extension = os.path.splitext(path)\n- if extension in hdr_extensions:\n- return True\n- return False\n-\n- # Gets all files from a path\n- def get_all_files(self,path):\n-\n- result = []\n- boardfolder = False\n- bootloaderfolder = False\n- projectsfolder = False\n- driverfolder = False\n-\n- for path, subdirs, files in os.walk(path):\n- if self.board_dir in path:\n- boardfolder = True\n- else:\n- boardfolder = False\n-\n- if self.bootloader_dir in path:\n- bootloaderfolder = True\n- else:\n- bootloaderfolder = False\n-\n- if self.projects_dir in path:\n- projectsfolder = True\n- else:\n- projectsfolder = False\n-\n- if self.drivers_dir in path:\n- driverfolder = True\n- else:\n- driverfolder = False\n-\n- for f in files:\n- if self.is_valid_source_file(f):\n-\n- if ((boardfolder and (self.platform_dir in path or path == self.common_platform_dir or path == self.board_dir))\n- or ((bootloaderfolder and path == self.bootloader_platform))\n- or (projectsfolder and (self.projects_platform in path or self.common_projects_dir in path))\n- or (driverfolder and (self.drivers_platform in path or self.common_drivers_dir in path))):\n-\n- r = os.path.join(path, f)\n- r = os.path.abspath(r)\n- result.append(r)\n-\n- if (not boardfolder and not bootloaderfolder and not projectsfolder and not driverfolder):\n- r = os.path.join(path, f)\n- r = os.path.abspath(r)\n- result.append(r)\n-\n- return result\n-\n- # Gets source files from a path\n- def get_src_files(self,path):\n- src_files = []\n-\n- dirs = self.get_all_folders(path)\n-\n- for d in dirs:\n- files = self.get_all_files(d)\n- for f in files:\n- if (f):\n- src_files.append(f)\n- src_files.sort()\n- return src_files\n-\n- # Gets includes folders from a path\n- def get_inc_dirs(self,path):\n- inc_dirs = []\n-\n- dirs = self.get_all_folders(path)\n-\n- for d in dirs:\n- files = self.get_all_files(d)\n- for f in files:\n- if (f):\n- d, f = os.path.split(f)\n- if d not in inc_dirs:\n- inc_dirs.append(d)\n- inc_dirs.sort()\n- return inc_dirs\n-\n- # Writes output to file\n- def write_qtcreator(self,file_name, inc_dirs):\n- fn = open(file_name, 'w')\n- for inc_dir in inc_dirs:\n- fn.write(inc_dir + \"\\n\")\n- fn.close()\n-\n- # Prepares the QtCreator files\n- def qtcreator_prepare(self):\n-\n- print(\"Preparing QtCreator...\")\n- inc_dirs = self.get_inc_dirs(self.current_dir)\n- src_files = self.get_src_files(self.current_dir)\n-\n- path = os.path.join(self.qtcreator_project, self.qtcreator_files)\n- self.write_qtcreator(path, src_files)\n-\n- path = os.path.join(self.qtcreator_project, self.qtcreator_includes)\n- self.write_qtcreator(path, inc_dirs)\n-\n- print(\"ok!\")\n-\n- # Runs QtCreator\n- def qtcreator_run(self):\n- qt = [self.qtcreator_bin, self.qtcreator_project] + self.qtcreator_default\n-\n- if (find_executable(self.qtcreator_bin)):\n- print(\"Running QtCreator...\"),\n- proc = subprocess.Popen(qt, shell=False, stdin=None, stdout=subprocess.PIPE, stderr=subprocess.PIPE)\n- print(\"ok!\")\n- else:\n- print(\"Error: QtCreator not found!\")\n-\n- # Go to the home project directory\n- def change_dir(self):\n-\n- self.current_dir = os.path.realpath(__file__)\n- d, f = os.path.split(self.current_dir)\n- home = os.path.join(d, self.home_dir)\n- os.chdir(home)\n- self.current_dir = os.path.realpath(home)\n-\n- self.board_dir = os.path.join(self.current_dir, 'bsp', 'boards')\n- self.platform_dir = os.path.join(self.board_dir, self.platform)\n- self.common_platform_dir = os.path.join(self.board_dir, 'common')\n-\n- self.bootloader_platform = os.path.join(self.current_dir, 'bootloader', self.platform)\n- self.bootloader_dir = os.path.join(self.current_dir, 'bootloader')\n-\n- self.projects_dir = os.path.join(self.current_dir, 'projects')\n- self.projects_platform = os.path.join(self.current_dir, 'projects', self.platform)\n- self.common_projects_dir = os.path.join(self.current_dir, 'projects', 'common')\n-\n- self.common_drivers_dir = os.path.join(self.current_dir, 'drivers', 'common')\n- self.drivers_dir = os.path.join(self.current_dir, 'drivers')\n- self.drivers_platform = os.path.join(self.current_dir, 'drivers', self.platform)\n-\n-\n- def parseParams(self,args):\n- global platform\n- try:\n- opts, args = getopt.getopt(args, \"b:\", [\"board=\"])\n- except getopt.GetoptError as err:\n- print err\n- print 'Wrong params. Use: qtcreator.py -b <board name>'\n- sys.exit(2)\n- for opt, arg in opts:\n- if opt == '-h':\n- print 'qtcreator.py -b <board name>'\n- sys.exit()\n- elif opt in (\"-b\", \"--board\"):\n- platform = arg\n-\n- print 'Board is \"', self.platform\n-\n- def initialize(self,pt):\n- self.platform=pt\n- self.change_dir()\n-\n- self.qtcreator_prepare()\n- self.qtcreator_run()\n-\n- # Main function\n- def start(self,args):\n-\n- self.parseParams(args)\n-\n- self.change_dir()\n-\n- self.qtcreator_prepare()\n- self.qtcreator_run()\n-\n-if __name__ == \"__main__\":\n- qtcreator = QtCreatorManager()\n- qtcreator.start(sys.argv[1:])\n"
},
{
"change_type": "DELETE",
"old_path": "tools/qtcreator/OpenWSN.config",
"new_path": null,
"diff": "-// Add predefined macros for your project here. For example:\n-// #define THE_ANSWER 42\n"
},
{
"change_type": "DELETE",
"old_path": "tools/qtcreator/OpenWSN.creator",
"new_path": null,
"diff": "-[General]\n"
},
{
"change_type": "DELETE",
"old_path": "tools/qtcreator/OpenWSN.creator.user",
"new_path": null,
"diff": "-<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n-<!DOCTYPE QtCreatorProject>\n-<!-- Written by QtCreator 3.6.1, 2016-05-20T18:40:48. -->\n-<qtcreator>\n- <data>\n- <variable>EnvironmentId</variable>\n- <value type=\"QByteArray\">{904631d7-3e8a-468b-8567-84b671f0480e}</value>\n- </data>\n- <data>\n- <variable>ProjectExplorer.Project.ActiveTarget</variable>\n- <value type=\"int\">0</value>\n- </data>\n- <data>\n- <variable>ProjectExplorer.Project.EditorSettings</variable>\n- <valuemap type=\"QVariantMap\">\n- <value type=\"bool\" key=\"EditorConfiguration.AutoIndent\">true</value>\n- <value type=\"bool\" key=\"EditorConfiguration.AutoSpacesForTabs\">false</value>\n- <value type=\"bool\" key=\"EditorConfiguration.CamelCaseNavigation\">true</value>\n- <valuemap type=\"QVariantMap\" key=\"EditorConfiguration.CodeStyle.0\">\n- <value type=\"QString\" key=\"language\">Cpp</value>\n- <valuemap type=\"QVariantMap\" key=\"value\">\n- <value type=\"QByteArray\" key=\"CurrentPreferences\">CppGlobal</value>\n- </valuemap>\n- </valuemap>\n- <valuemap type=\"QVariantMap\" key=\"EditorConfiguration.CodeStyle.1\">\n- <value type=\"QString\" key=\"language\">QmlJS</value>\n- <valuemap type=\"QVariantMap\" key=\"value\">\n- <value type=\"QByteArray\" key=\"CurrentPreferences\">QmlJSGlobal</value>\n- </valuemap>\n- </valuemap>\n- <value type=\"int\" key=\"EditorConfiguration.CodeStyle.Count\">2</value>\n- <value type=\"QByteArray\" key=\"EditorConfiguration.Codec\">UTF-8</value>\n- <value type=\"bool\" key=\"EditorConfiguration.ConstrainTooltips\">false</value>\n- <value type=\"int\" key=\"EditorConfiguration.IndentSize\">4</value>\n- <value type=\"bool\" key=\"EditorConfiguration.KeyboardTooltips\">false</value>\n- <value type=\"int\" key=\"EditorConfiguration.MarginColumn\">80</value>\n- <value type=\"bool\" key=\"EditorConfiguration.MouseHiding\">true</value>\n- <value type=\"bool\" key=\"EditorConfiguration.MouseNavigation\">true</value>\n- <value type=\"int\" key=\"EditorConfiguration.PaddingMode\">1</value>\n- <value type=\"bool\" key=\"EditorConfiguration.ScrollWheelZooming\">true</value>\n- <value type=\"bool\" key=\"EditorConfiguration.ShowMargin\">false</value>\n- <value type=\"int\" key=\"EditorConfiguration.SmartBackspaceBehavior\">0</value>\n- <value type=\"bool\" key=\"EditorConfiguration.SpacesForTabs\">true</value>\n- <value type=\"int\" key=\"EditorConfiguration.TabKeyBehavior\">0</value>\n- <value type=\"int\" key=\"EditorConfiguration.TabSize\">8</value>\n- <value type=\"bool\" key=\"EditorConfiguration.UseGlobal\">true</value>\n- <value type=\"int\" key=\"EditorConfiguration.Utf8BomBehavior\">1</value>\n- <value type=\"bool\" key=\"EditorConfiguration.addFinalNewLine\">true</value>\n- <value type=\"bool\" key=\"EditorConfiguration.cleanIndentation\">true</value>\n- <value type=\"bool\" key=\"EditorConfiguration.cleanWhitespace\">true</value>\n- <value type=\"bool\" key=\"EditorConfiguration.inEntireDocument\">false</value>\n- </valuemap>\n- </data>\n- <data>\n- <variable>ProjectExplorer.Project.PluginSettings</variable>\n- <valuemap type=\"QVariantMap\"/>\n- </data>\n- <data>\n- <variable>ProjectExplorer.Project.Target.0</variable>\n- <valuemap type=\"QVariantMap\">\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DefaultDisplayName\">scons</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DisplayName\">scons</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.Id\">{e1c7ba1e-f1b5-4874-9829-f38a8dd74dd0}</value>\n- <value type=\"int\" key=\"ProjectExplorer.Target.ActiveBuildConfiguration\">0</value>\n- <value type=\"int\" key=\"ProjectExplorer.Target.ActiveDeployConfiguration\">-1</value>\n- <value type=\"int\" key=\"ProjectExplorer.Target.ActiveRunConfiguration\">0</value>\n- <valuemap type=\"QVariantMap\" key=\"ProjectExplorer.Target.BuildConfiguration.0\">\n- <value type=\"QString\" key=\"ProjectExplorer.BuildConfiguration.BuildDirectory\">openwsn-fw/build</value>\n- <valuemap type=\"QVariantMap\" key=\"ProjectExplorer.BuildConfiguration.BuildStepList.0\">\n- <valuemap type=\"QVariantMap\" key=\"ProjectExplorer.BuildStepList.Step.0\">\n- <valuelist type=\"QVariantList\" key=\"GenericProjectManager.GenericMakeStep.BuildTargets\">\n- <value type=\"QString\">all</value>\n- </valuelist>\n- <value type=\"bool\" key=\"GenericProjectManager.GenericMakeStep.Clean\">false</value>\n- <value type=\"QString\" key=\"GenericProjectManager.GenericMakeStep.MakeArguments\"></value>\n- <value type=\"QString\" key=\"GenericProjectManager.GenericMakeStep.MakeCommand\"></value>\n- <value type=\"bool\" key=\"ProjectExplorer.BuildStep.Enabled\">true</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DefaultDisplayName\">Make</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DisplayName\"></value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.Id\">GenericProjectManager.GenericMakeStep</value>\n- </valuemap>\n- <value type=\"int\" key=\"ProjectExplorer.BuildStepList.StepsCount\">1</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DefaultDisplayName\">Build</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DisplayName\"></value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.Id\">ProjectExplorer.BuildSteps.Build</value>\n- </valuemap>\n- <valuemap type=\"QVariantMap\" key=\"ProjectExplorer.BuildConfiguration.BuildStepList.1\">\n- <valuemap type=\"QVariantMap\" key=\"ProjectExplorer.BuildStepList.Step.0\">\n- <valuelist type=\"QVariantList\" key=\"GenericProjectManager.GenericMakeStep.BuildTargets\">\n- <value type=\"QString\">clean</value>\n- </valuelist>\n- <value type=\"bool\" key=\"GenericProjectManager.GenericMakeStep.Clean\">true</value>\n- <value type=\"QString\" key=\"GenericProjectManager.GenericMakeStep.MakeArguments\"></value>\n- <value type=\"QString\" key=\"GenericProjectManager.GenericMakeStep.MakeCommand\"></value>\n- <value type=\"bool\" key=\"ProjectExplorer.BuildStep.Enabled\">true</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DefaultDisplayName\">Make</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DisplayName\"></value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.Id\">GenericProjectManager.GenericMakeStep</value>\n- </valuemap>\n- <value type=\"int\" key=\"ProjectExplorer.BuildStepList.StepsCount\">1</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DefaultDisplayName\">Clean</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DisplayName\"></value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.Id\">ProjectExplorer.BuildSteps.Clean</value>\n- </valuemap>\n- <value type=\"int\" key=\"ProjectExplorer.BuildConfiguration.BuildStepListCount\">2</value>\n- <value type=\"bool\" key=\"ProjectExplorer.BuildConfiguration.ClearSystemEnvironment\">false</value>\n- <valuelist type=\"QVariantList\" key=\"ProjectExplorer.BuildConfiguration.UserEnvironmentChanges\"/>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DefaultDisplayName\">Default</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DisplayName\">Default</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.Id\">GenericProjectManager.GenericBuildConfiguration</value>\n- </valuemap>\n- <value type=\"int\" key=\"ProjectExplorer.Target.BuildConfigurationCount\">1</value>\n- <value type=\"int\" key=\"ProjectExplorer.Target.DeployConfigurationCount\">0</value>\n- <valuemap type=\"QVariantMap\" key=\"ProjectExplorer.Target.PluginSettings\"/>\n- <valuemap type=\"QVariantMap\" key=\"ProjectExplorer.Target.RunConfiguration.0\">\n- <valuelist type=\"QVariantList\" key=\"Analyzer.Valgrind.AddedSuppressionFiles\"/>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.Callgrind.CollectBusEvents\">false</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.Callgrind.CollectSystime\">false</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.Callgrind.EnableBranchSim\">false</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.Callgrind.EnableCacheSim\">false</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.Callgrind.EnableEventToolTips\">true</value>\n- <value type=\"double\" key=\"Analyzer.Valgrind.Callgrind.MinimumCostRatio\">0.01</value>\n- <value type=\"double\" key=\"Analyzer.Valgrind.Callgrind.VisualisationMinimumCostRatio\">10</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.FilterExternalIssues\">true</value>\n- <value type=\"int\" key=\"Analyzer.Valgrind.LeakCheckOnFinish\">1</value>\n- <value type=\"int\" key=\"Analyzer.Valgrind.NumCallers\">25</value>\n- <valuelist type=\"QVariantList\" key=\"Analyzer.Valgrind.RemovedSuppressionFiles\"/>\n- <value type=\"int\" key=\"Analyzer.Valgrind.SelfModifyingCodeDetection\">1</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.Settings.UseGlobalSettings\">true</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.ShowReachable\">false</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.TrackOrigins\">true</value>\n- <value type=\"QString\" key=\"Analyzer.Valgrind.ValgrindExecutable\">valgrind</value>\n- <valuelist type=\"QVariantList\" key=\"Analyzer.Valgrind.VisibleErrorKinds\">\n- <value type=\"int\">0</value>\n- <value type=\"int\">1</value>\n- <value type=\"int\">2</value>\n- <value type=\"int\">3</value>\n- <value type=\"int\">4</value>\n- <value type=\"int\">5</value>\n- <value type=\"int\">6</value>\n- <value type=\"int\">7</value>\n- <value type=\"int\">8</value>\n- <value type=\"int\">9</value>\n- <value type=\"int\">10</value>\n- <value type=\"int\">11</value>\n- <value type=\"int\">12</value>\n- <value type=\"int\">13</value>\n- <value type=\"int\">14</value>\n- </valuelist>\n- <value type=\"int\" key=\"PE.EnvironmentAspect.Base\">2</value>\n- <valuelist type=\"QVariantList\" key=\"PE.EnvironmentAspect.Changes\"/>\n- <value type=\"QString\" key=\"ProjectExplorer.CustomExecutableRunConfiguration.Arguments\"></value>\n- <value type=\"QString\" key=\"ProjectExplorer.CustomExecutableRunConfiguration.Executable\"></value>\n- <value type=\"QString\" key=\"ProjectExplorer.CustomExecutableRunConfiguration.WorkingDirectory\">%{buildDir}</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DefaultDisplayName\">Custom Executable</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DisplayName\"></value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.Id\">ProjectExplorer.CustomExecutableRunConfiguration</value>\n- <value type=\"uint\" key=\"RunConfiguration.QmlDebugServerPort\">3768</value>\n- <value type=\"bool\" key=\"RunConfiguration.UseCppDebugger\">false</value>\n- <value type=\"bool\" key=\"RunConfiguration.UseCppDebuggerAuto\">true</value>\n- <value type=\"bool\" key=\"RunConfiguration.UseMultiProcess\">false</value>\n- <value type=\"bool\" key=\"RunConfiguration.UseQmlDebugger\">false</value>\n- <value type=\"bool\" key=\"RunConfiguration.UseQmlDebuggerAuto\">true</value>\n- </valuemap>\n- <valuemap type=\"QVariantMap\" key=\"ProjectExplorer.Target.RunConfiguration.1\">\n- <valuelist type=\"QVariantList\" key=\"Analyzer.Valgrind.AddedSuppressionFiles\"/>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.Callgrind.CollectBusEvents\">false</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.Callgrind.CollectSystime\">false</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.Callgrind.EnableBranchSim\">false</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.Callgrind.EnableCacheSim\">false</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.Callgrind.EnableEventToolTips\">true</value>\n- <value type=\"double\" key=\"Analyzer.Valgrind.Callgrind.MinimumCostRatio\">0.01</value>\n- <value type=\"double\" key=\"Analyzer.Valgrind.Callgrind.VisualisationMinimumCostRatio\">10</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.FilterExternalIssues\">true</value>\n- <value type=\"int\" key=\"Analyzer.Valgrind.LeakCheckOnFinish\">1</value>\n- <value type=\"int\" key=\"Analyzer.Valgrind.NumCallers\">25</value>\n- <valuelist type=\"QVariantList\" key=\"Analyzer.Valgrind.RemovedSuppressionFiles\"/>\n- <value type=\"int\" key=\"Analyzer.Valgrind.SelfModifyingCodeDetection\">1</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.Settings.UseGlobalSettings\">true</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.ShowReachable\">false</value>\n- <value type=\"bool\" key=\"Analyzer.Valgrind.TrackOrigins\">true</value>\n- <value type=\"QString\" key=\"Analyzer.Valgrind.ValgrindExecutable\">valgrind</value>\n- <valuelist type=\"QVariantList\" key=\"Analyzer.Valgrind.VisibleErrorKinds\">\n- <value type=\"int\">0</value>\n- <value type=\"int\">1</value>\n- <value type=\"int\">2</value>\n- <value type=\"int\">3</value>\n- <value type=\"int\">4</value>\n- <value type=\"int\">5</value>\n- <value type=\"int\">6</value>\n- <value type=\"int\">7</value>\n- <value type=\"int\">8</value>\n- <value type=\"int\">9</value>\n- <value type=\"int\">10</value>\n- <value type=\"int\">11</value>\n- <value type=\"int\">12</value>\n- <value type=\"int\">13</value>\n- <value type=\"int\">14</value>\n- </valuelist>\n- <value type=\"QString\" key=\"BareMetal.CustomRunConfig.Executable\"></value>\n- <value type=\"QString\" key=\"BareMetal.RunConfig.WorkingDirectory\"></value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DefaultDisplayName\">qtcreator (via GDB server or hardware debugger)</value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.DisplayName\"></value>\n- <value type=\"QString\" key=\"ProjectExplorer.ProjectConfiguration.Id\">BareMetal.CustomRunConfig</value>\n- <value type=\"QString\" key=\"Qt4ProjectManager.MaemoRunConfiguration.Arguments\"></value>\n- <value type=\"QString\" key=\"Qt4ProjectManager.MaemoRunConfiguration.ProFile\">.</value>\n- <value type=\"uint\" key=\"RunConfiguration.QmlDebugServerPort\">3768</value>\n- <value type=\"bool\" key=\"RunConfiguration.UseCppDebugger\">false</value>\n- <value type=\"bool\" key=\"RunConfiguration.UseCppDebuggerAuto\">true</value>\n- <value type=\"bool\" key=\"RunConfiguration.UseMultiProcess\">false</value>\n- <value type=\"bool\" key=\"RunConfiguration.UseQmlDebugger\">false</value>\n- <value type=\"bool\" key=\"RunConfiguration.UseQmlDebuggerAuto\">true</value>\n- </valuemap>\n- <value type=\"int\" key=\"ProjectExplorer.Target.RunConfigurationCount\">2</value>\n- </valuemap>\n- </data>\n- <data>\n- <variable>ProjectExplorer.Project.TargetCount</variable>\n- <value type=\"int\">1</value>\n- </data>\n- <data>\n- <variable>ProjectExplorer.Project.Updater.FileVersion</variable>\n- <value type=\"int\">18</value>\n- </data>\n- <data>\n- <variable>Version</variable>\n- <value type=\"int\">18</value>\n- </data>\n-</qtcreator>\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Remove unused IDE options
|
491,587 |
27.08.2020 12:40:35
| -7,200 |
1cd6a3c8d838fc22a0f3984cdd80a95384bc6884
|
Move FASTSIM switch to config.h + add checks to check_config.h
|
[
{
"change_type": "MODIFY",
"old_path": "SConscript",
"new_path": "SConscript",
"diff": "@@ -574,9 +574,6 @@ elif env['toolchain'] == 'gcc':\nif env['board'] in ['python']:\nenv.Append(CPPDEFINES='OPENSIM')\n- if env['fastsim'] == 1:\n- env.Append(CPPDEFINES='FASTSIM')\n-\nif os.name != 'nt':\nif env['simhost'].endswith('linux'):\n# enabling shared library to be reallocated\n"
},
{
"change_type": "MODIFY",
"old_path": "SConstruct",
"new_path": "SConstruct",
"diff": "@@ -132,7 +132,6 @@ command_line_options = {\n],\n'fet_version': ['2', '3'],\n'verbose': ['0', '1'],\n- 'fastsim': ['0', '1'],\n'simhost': ['amd64-linux', 'x86-linux', 'amd64-windows', 'x86-windows'],\n'simhostpy': [''], # No reasonable default\n'panid': [''],\n@@ -211,13 +210,6 @@ command_line_vars.AddVariables(\nvalidate_option, # validator\nint, # converter\n),\n- (\n- 'fastsim', # key\n- '', # help\n- command_line_options['fastsim'][1], # default\n- validate_option, # validator\n- int, # converter\n- ),\n(\n'simhost', # key\n'', # help\n"
},
{
"change_type": "MODIFY",
"old_path": "bsp/boards/uart.h",
"new_path": "bsp/boards/uart.h",
"diff": "@@ -47,7 +47,7 @@ void uart_clearRxInterrupts(void);\nvoid uart_clearTxInterrupts(void);\nvoid uart_setCTS(bool state);\nvoid uart_writeByte(uint8_t byteToWrite);\n-#ifdef FASTSIM\n+#if BOARD_FASTSIM_ENABLED\nvoid uart_writeCircularBuffer_FASTSIM(uint8_t* buffer, uint16_t* outputBufIdxR, uint16_t* outputBufIdxW);\n#endif\nuint8_t uart_readByte(void);\n"
},
{
"change_type": "MODIFY",
"old_path": "drivers/common/openserial.c",
"new_path": "drivers/common/openserial.c",
"diff": "@@ -447,7 +447,7 @@ void openserial_flush(void) {\nif (openserial_vars.fBusyFlushing == FALSE) {\nif (openserial_vars.ctsStateChanged == TRUE) {\n// send CTS\n-#ifdef FASTSIM\n+#if BOARD_FASTSIM_ENABLED\n#else\nif (openserial_vars.fInhibited == TRUE) {\nuart_setCTS(FALSE);\n@@ -464,7 +464,7 @@ void openserial_flush(void) {\nif (openserial_vars.outputBufIdxW != openserial_vars.outputBufIdxR) {\n// I have some bytes to transmit\n-#ifdef FASTSIM\n+#if BOARD_FASTSIM_ENABLED\nuart_writeCircularBuffer_FASTSIM(\nopenserial_vars.outputBuf,\n&openserial_vars.outputBufIdxR,\n@@ -488,7 +488,7 @@ void openserial_inhibitStart(void) {\n// DISABLE_INTERRUPT is not necessary here.\nopenserial_vars.fInhibited = TRUE;\n-#ifdef FASTSIM\n+#if BOARD_FASTSIM_ENABLED\n#else\nopenserial_vars.ctsStateChanged = TRUE;\n#endif\n@@ -503,7 +503,7 @@ void openserial_inhibitStop(void) {\n//<<<<<<<<<<<<<<<<<<<<<<<\nDISABLE_INTERRUPTS();\nopenserial_vars.fInhibited = FALSE;\n-#ifdef FASTSIM\n+#if BOARD_FASTSIM_ENABLED\n#else\nopenserial_vars.ctsStateChanged = TRUE;\n#endif\n"
},
{
"change_type": "MODIFY",
"old_path": "inc/check_config.h",
"new_path": "inc/check_config.h",
"diff": "#error 'Python board does not support hardware acceleration.'\n#endif\n+#if BOARD_FASTSIM_ENABLED && !defined(PYTHON_BOARD)\n+#error 'FASTSIM is only supported in simulation mode.'\n+\n+#endif\n+\n+#if !BOARD_FASTSIM_ENABLED && defined(PYTHON_BOARD)\n+#warning 'You are not using FASTSIM for UART communication in simulation mode.'\n+\n+#endif\n+\n#if ((IEEE802154E_SINGLE_CHANNEL != 0) && \\\n((IEEE802154E_SINGLE_CHANNEL < 11) || \\\n(IEEE802154E_SINGLE_CHANNEL > 26)))\n"
},
{
"change_type": "MODIFY",
"old_path": "inc/config.h",
"new_path": "inc/config.h",
"diff": "#define BOARD_SENSORS_ENABLED (0)\n#endif\n+/**\n+ * \\def BOARD_FASTSIM_ENABLED\n+ *\n+ * Enables fast UART printing in simulation mode. Active by default.\n+ *\n+ */\n+#if !defined(BOARD_FASTSIM_ENABLED) && defined(PYTHON_BOARD)\n+#define BOARD_FASTSIM_ENABLED (1)\n+#else\n+#define BOARD_FASTSIM_ENABLED (0)\n+#endif\n+\n+\n#include \"check_config.h\"\n#endif /* OPENWSN_CONFIG_H */\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Move FASTSIM switch to config.h + add checks to check_config.h
|
491,587 |
27.08.2020 12:41:34
| -7,200 |
dd2c70524888b3d291cbe2369a0b9080a47fb6e3
|
Move DEADLINE_OPTION to config.h
|
[
{
"change_type": "MODIFY",
"old_path": "SConscript",
"new_path": "SConscript",
"diff": "@@ -89,8 +89,6 @@ if env['dagroot'] == 1:\nenv.Append(CPPDEFINES='DAGROOT')\nif env['atmel_24ghz'] == 1:\nenv.Append(CPPDEFINES='ATMEL_24GHZ')\n-if env['deadline_option'] == 1:\n- env.Append(CPPDEFINES='DEADLINE_OPTION_ENABLED')\nif env['toolchain'] == 'mspgcc':\nif env['board'] not in ['telosb', 'wsn430v13b', 'wsn430v14', 'gina', 'z1']:\n"
},
{
"change_type": "MODIFY",
"old_path": "SConstruct",
"new_path": "SConstruct",
"diff": "@@ -138,7 +138,6 @@ command_line_options = {\n'dagroot': ['0', '1'],\n'debug': ['0', '1'],\n'atmel_24ghz': ['0', '1'],\n- 'deadline_option': ['0', '1'],\n'revision': ['']\n}\n@@ -252,13 +251,6 @@ command_line_vars.AddVariables(\nvalidate_option, # validator\nint, # converter\n),\n- (\n- 'deadline_option', # key\n- '', # help\n- command_line_options['deadline_option'][0], # default\n- validate_option, # validator\n- int, # converter\n- ),\n(\n'revision', # key\n'board revision', # help\n"
},
{
"change_type": "MODIFY",
"old_path": "inc/config.h",
"new_path": "inc/config.h",
"diff": "#define OPENWSN_UDP_C (0)\n#endif\n+/**\n+ * \\def OPENWSN_DEADLINE_OPTION\n+ *\n+ * Activates IPv6 DEADLINE OPTION.\n+ *\n+ */\n+#ifdef OPENWSN_DEADLINE_OPTION\n+#define OPENWSN_DEADLINE_OPTION (0)\n+#endif\n/**\n* \\def OPENWSN_6LO_FRAGMENTATION_C\n"
},
{
"change_type": "MODIFY",
"old_path": "inc/opendefs.h",
"new_path": "inc/opendefs.h",
"diff": "@@ -332,7 +332,7 @@ typedef struct {\nuint8_t* payload; // pointer to the start of the payload within 'packet'\nint16_t length; // length in bytes of the payload\n//l7\n-#if defined(DEADLINE_OPTION)\n+#if defined(OPENWSN_DEADLINE_OPTION)\nuint16_t max_delay; // Max delay in milliseconds before which the packet should be delivered to the receiver\nbool orgination_time_flag;\nbool drop_flag;\n"
},
{
"change_type": "MODIFY",
"old_path": "openapps/uexpiration_monitor/uexpiration_monitor.c",
"new_path": "openapps/uexpiration_monitor/uexpiration_monitor.c",
"diff": "#include \"openserial.h\"\n#include \"packetfunctions.h\"\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\n#include \"iphc.h\"\n#endif\n@@ -33,7 +33,7 @@ void umonitor_init(void) {\nvoid umonitor_receive(OpenQueueEntry_t *request) {\nuint16_t temp_l4_destination_port;\nOpenQueueEntry_t *reply;\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nmonitor_expiration_vars_t deadline;\n#endif\n@@ -59,7 +59,7 @@ void umonitor_receive(OpenQueueEntry_t *request) {\nopenqueue_freePacketBuffer(reply);\nreturn;\n}\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nmemset(&deadline, 0, sizeof(monitor_expiration_vars_t));\niphc_getDeadlineInfo(&deadline);\nmemcpy(&reply->payload[0],&deadline.time_elapsed,sizeof(uint16_t));\n"
},
{
"change_type": "MODIFY",
"old_path": "openstack/02a-MAClow/IEEE802154E.c",
"new_path": "openstack/02a-MAClow/IEEE802154E.c",
"diff": "@@ -249,7 +249,7 @@ PORT_TIMER_WIDTH ieee154e_asnDiff(asn_t *someASN) {\nreturn diff;\n}\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\n/**\n/brief Difference between two ASN values\n"
},
{
"change_type": "MODIFY",
"old_path": "openstack/02a-MAClow/IEEE802154E.h",
"new_path": "openstack/02a-MAClow/IEEE802154E.h",
"diff": "@@ -324,7 +324,7 @@ void ieee154e_init(void);\n// public\nPORT_TIMER_WIDTH ieee154e_asnDiff(asn_t *someASN);\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nint16_t ieee154e_computeAsnDiff(asn_t *h_asn, asn_t *l_asn);\nvoid ieee154e_calculateExpTime(uint16_t max_delay, uint8_t *et_asn);\n"
},
{
"change_type": "MODIFY",
"old_path": "openstack/03a-IPHC/iphc.c",
"new_path": "openstack/03a-IPHC/iphc.c",
"diff": "static const uint8_t dagroot_mac64b[] = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01};\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nstatic monitor_expiration_vars_t monitor_expiration_vars;\n#endif\n@@ -37,7 +37,7 @@ owerror_t iphc_retrieveIphcHeader(open_addr_t *temp_addr_16b,\n//===== IPv6 hop-by-hop header\nowerror_t iphc_prependIPv6HopByHopHeader(OpenQueueEntry_t **msg, uint8_t nextheader, rpl_option_ht *rpl_option);\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\n// IPv6 Deadline hop-by-hop header\nowerror_t iphc_prependIPv6DeadlineHeader(OpenQueueEntry_t **msg);\n@@ -55,7 +55,7 @@ owerror_t iphc_sendFromForwarding(\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\nrpl_option_ht *rpl_option,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nuint32_t *flow_label,\n@@ -178,7 +178,7 @@ owerror_t iphc_sendFromForwarding(\n}\n}\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nif ((msg->creator == COMPONENT_UEXPIRATION) && (deadline_option != NULL)) {\nif (\ndeadline_option->optionType == DEADLINE_HOPBYHOP_HEADER_OPTION_TYPE &&\n@@ -256,7 +256,7 @@ void iphc_receive(OpenQueueEntry_t *msg) {\nuint8_t page_length;\nrpl_option_ht rpl_option;\nuint8_t rpi_length;\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_option_ht *deadline_ptr = NULL;\ndeadline_option_ht curr_deadline_option;\n#endif\n@@ -267,7 +267,7 @@ void iphc_receive(OpenQueueEntry_t *msg) {\nmemset(&ipv6_inner_header, 0, sizeof(ipv6_header_iht));\nmemset(&rpl_option, 0, sizeof(rpl_option_ht));\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nipv6_outer_header.deadline_option = NULL;\n#endif\n@@ -283,7 +283,7 @@ void iphc_receive(OpenQueueEntry_t *msg) {\nif (ipv6_outer_header.next_header == IANA_IPv6HOPOPT && ipv6_outer_header.hopByhop_option != NULL) {\n// retrieve hop-by-hop header (includes RPL option)\nrpi_length = iphc_retrieveIPv6HopByHopHeader(msg, &rpl_option);\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nif (ipv6_outer_header.deadline_option) {\nmemset(&curr_deadline_option, 0, sizeof(curr_deadline_option));\niphc_retrieveIPv6DeadlineHeader(msg, ipv6_outer_header.deadline_option, &curr_deadline_option);\n@@ -299,7 +299,7 @@ void iphc_receive(OpenQueueEntry_t *msg) {\nmsg,\n&ipv6_outer_header,\n&ipv6_inner_header,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_ptr,\n#endif\n&rpl_option\n@@ -705,7 +705,7 @@ owerror_t iphc_retrieveIPv6Header(OpenQueueEntry_t *msg, ipv6_header_iht *ipv6_o\n}\n}\n}\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nelse if (lorh_type == DEADLINE_6LOTH_TYPE) {\nipv6_outer_header->deadline_option = (uint8_t * )(msg->payload) + *page_length + \\\nextention_header_length;\n@@ -1077,7 +1077,7 @@ owerror_t iphc_prependIPv6HopByHopHeader(OpenQueueEntry_t **msg, uint8_t nexthea\nreturn E_SUCCESS;\n}\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\n//===== IPv6 Deadline hop-by-hop header\n/**\n\\brief Prepend an IPv6 Deadline hop-by-hop header to a message.\n@@ -1215,7 +1215,7 @@ uint8_t iphc_retrieveIPv6HopByHopHeader(OpenQueueEntry_t *msg, rpl_option_ht *rp\nreturn length;\n}\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\n/**\n\\brief Retrieve a Deadline hop-by-hop header from a message.\n"
},
{
"change_type": "MODIFY",
"old_path": "openstack/03a-IPHC/iphc.h",
"new_path": "openstack/03a-IPHC/iphc.h",
"diff": "@@ -144,7 +144,7 @@ enum TYPE_6LORH_enums {\nRH3_6LOTH_TYPE_4 = 0x04,\nRPI_6LOTH_TYPE = 0x05,\nIPECAP_6LOTH_TYPE = 0x06,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nDEADLINE_6LOTH_TYPE = 0x07,\n#endif\n};\n@@ -168,7 +168,7 @@ typedef struct {\nuint8_t next_header;\nuint8_t *routing_header[MAXNUM_RH3];\nuint8_t *hopByhop_option;\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nuint8_t* deadline_option;\n#endif\nuint8_t hop_limit;\n@@ -220,7 +220,7 @@ typedef struct {\n} rpl_option_ht;\nEND_PACK\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nBEGIN_PACK\ntypedef struct {\nuint8_t optionType;\n@@ -254,7 +254,7 @@ owerror_t iphc_sendFromForwarding(\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\nrpl_option_ht *rpl_option,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nuint32_t *flow_label,\n@@ -304,7 +304,7 @@ owerror_t iphc_retrieveIPv6Header(OpenQueueEntry_t *msg,\nuint8_t *page_length\n);\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nvoid iphc_retrieveIPv6DeadlineHeader(\nOpenQueueEntry_t* msg,\nuint8_t* deadline_msg_ptr,\n"
},
{
"change_type": "MODIFY",
"old_path": "openstack/03b-IPv6/forwarding.c",
"new_path": "openstack/03b-IPv6/forwarding.c",
"diff": "@@ -23,7 +23,7 @@ owerror_t forwarding_send_internal_RoutingTable(\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\nrpl_option_ht *rpl_option,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nuint32_t *flow_label,\n@@ -34,7 +34,7 @@ owerror_t forwarding_send_internal_SourceRouting(\nOpenQueueEntry_t *msg,\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nrpl_option_ht *rpl_option\n@@ -42,7 +42,7 @@ owerror_t forwarding_send_internal_SourceRouting(\nvoid forwarding_createRplOption(rpl_option_ht *rpl_option, uint8_t flags);\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nvoid forwarding_createDeadlineOption( deadline_option_ht* deadline_option);\n#endif\n@@ -66,7 +66,7 @@ owerror_t forwarding_send(OpenQueueEntry_t *msg) {\nipv6_header_iht ipv6_outer_header;\nipv6_header_iht ipv6_inner_header;\nrpl_option_ht rpl_option;\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_option_ht deadline_option;\n#endif\nopen_addr_t *myprefix;\n@@ -143,7 +143,7 @@ owerror_t forwarding_send(OpenQueueEntry_t *msg) {\n0x00 // flags\n);\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nforwarding_createDeadlineOption(\n&deadline_option\n);\n@@ -212,7 +212,7 @@ owerror_t forwarding_send(OpenQueueEntry_t *msg) {\n&ipv6_outer_header,\n&ipv6_inner_header,\n&rpl_option,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\n&deadline_option,\n#endif\n&flow_label,\n@@ -277,7 +277,7 @@ void forwarding_receive(\nOpenQueueEntry_t *msg,\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nrpl_option_ht *rpl_option\n@@ -337,7 +337,7 @@ void forwarding_receive(\n// change the creator of the packet\nmsg->creator = COMPONENT_FORWARDING;\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nif (deadline_option != NULL) {\n// Deadline Option : Drop\nif( (deadline_option->time_left <= 0) && (deadline_option->d_flag == 1) ) { // packet expired\n@@ -379,7 +379,7 @@ void forwarding_receive(\n}\nforwarding_createRplOption(rpl_option, rpl_option->flags);\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nif (deadline_option != NULL)\nforwarding_createDeadlineOption(deadline_option);\n#endif\n@@ -391,7 +391,7 @@ void forwarding_receive(\nipv6_outer_header,\nipv6_inner_header,\nrpl_option,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_option,\n#endif\n&(ipv6_outer_header->flow_label),\n@@ -403,7 +403,7 @@ void forwarding_receive(\n} else {\n// source routing header present\nif (forwarding_send_internal_SourceRouting(msg, ipv6_outer_header, ipv6_inner_header,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_option,\n#endif\nrpl_option) == E_FAIL) {\n@@ -453,7 +453,7 @@ owerror_t forwarding_send_internal_RoutingTable(\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\nrpl_option_ht *rpl_option,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nuint32_t *flow_label,\n@@ -491,7 +491,7 @@ owerror_t forwarding_send_internal_RoutingTable(\nipv6_outer_header,\nipv6_inner_header,\nrpl_option,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_option,\n#endif\nflow_label,\n@@ -518,7 +518,7 @@ owerror_t forwarding_send_internal_SourceRouting(\nOpenQueueEntry_t *msg,\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nrpl_option_ht *rpl_option\n@@ -785,7 +785,7 @@ owerror_t forwarding_send_internal_SourceRouting(\n}\nforwarding_createRplOption(rpl_option, rpl_option->flags);\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\nif (deadline_option != NULL)\nforwarding_createDeadlineOption(deadline_option);\n#endif\n@@ -804,7 +804,7 @@ owerror_t forwarding_send_internal_SourceRouting(\nipv6_outer_header,\nipv6_inner_header,\nrpl_option,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_option,\n#endif\n&ipv6_outer_header->flow_label,\n@@ -842,7 +842,7 @@ void forwarding_createRplOption(rpl_option_ht *rpl_option, uint8_t flags) {\nrpl_option->flags = (flags & ~I_FLAG & ~K_FLAG) | (I << 1) | K;\n}\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\n/**\n\\brief Create a Deadline-6LoRH .\n"
},
{
"change_type": "MODIFY",
"old_path": "openstack/03b-IPv6/forwarding.h",
"new_path": "openstack/03b-IPv6/forwarding.h",
"diff": "#define RPL_HOPBYHOP_HEADER_OPTION_TYPE 0x63\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\n#define DEADLINE_HOPBYHOP_HEADER_OPTION_TYPE 0xAB\n#endif\n@@ -66,7 +66,7 @@ void forwarding_receive(\nOpenQueueEntry_t *msg,\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\n-#ifdef DEADLINE_OPTION_ENABLED\n+#ifdef OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nrpl_option_ht *rpl_option\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Move DEADLINE_OPTION to config.h
|
491,587 |
27.08.2020 12:53:14
| -7,200 |
b833f6758c7784f2e8bdf5ed263a574b7c2dcaab
|
Move DAGROOT switch to config.h
|
[
{
"change_type": "MODIFY",
"old_path": "SConscript",
"new_path": "SConscript",
"diff": "@@ -85,8 +85,6 @@ dummyFunc = Builder(action='', suffix='.ihex')\n# add the build variables\nif env['panid']:\nenv.Append(CPPDEFINES={'PANID_DEFINED': env['panid']})\n-if env['dagroot'] == 1:\n- env.Append(CPPDEFINES='DAGROOT')\nif env['atmel_24ghz'] == 1:\nenv.Append(CPPDEFINES='ATMEL_24GHZ')\n"
},
{
"change_type": "MODIFY",
"old_path": "SConstruct",
"new_path": "SConstruct",
"diff": "@@ -72,12 +72,6 @@ project:\nsimhostpy Home directory for simhost cross-build Python headers and\nshared library.\n- Variables for special use cases.\n- dagroot Setting a mote as DAG root is typically done through\n- OpenVisualizer. In some rare cases when the OpenVisualizer\n- cannot send commands to the mote (e.g. IoT-LAB platform),\n- use this flag to build a firmware image which is, by\n- default, in DAG root mode.\nCommon variables:\nverbose Print each complete compile/link command.\n0 (off), 1 (on)\n@@ -135,7 +129,6 @@ command_line_options = {\n'simhost': ['amd64-linux', 'x86-linux', 'amd64-windows', 'x86-windows'],\n'simhostpy': [''], # No reasonable default\n'panid': [''],\n- 'dagroot': ['0', '1'],\n'debug': ['0', '1'],\n'atmel_24ghz': ['0', '1'],\n'revision': ['']\n@@ -230,13 +223,6 @@ command_line_vars.AddVariables(\nNone, # validator\nNone, # converter\n),\n- (\n- 'dagroot', # key\n- '', # help\n- command_line_options['dagroot'][0], # default\n- validate_option, # validator\n- int, # converter\n- ),\n(\n'debug', # key\n'', # help\n"
},
{
"change_type": "MODIFY",
"old_path": "bsp/boards/openmote-b-24ghz/board_info.h",
"new_path": "bsp/boards/openmote-b-24ghz/board_info.h",
"diff": "* Description: CC2538-specific board information bsp module.\n*/\n-#ifndef __BOARD_INFO_H\n-#define __BOARD_INFO_H\n+#ifndef OPENWSN_BOARD_INFO_H\n+#define OPENWSN_BOARD_INFO_H\n#include <stdint.h>\n#include <string.h>\n#define BSP_ANTENNA_BASE GPIO_D_BASE\n#define BSP_ANTENNA_CC2538_24GHZ GPIO_PIN_4 //!< PD4 -- 2.4ghz\n#define BSP_ANTENNA_AT215_24GHZ GPIO_PIN_3 //!< PD3 -- subghz\n-//#define DAGROOT\n//=========================== typedef ========================================\n"
},
{
"change_type": "MODIFY",
"old_path": "bsp/boards/openmote-b-subghz/board_info.h",
"new_path": "bsp/boards/openmote-b-subghz/board_info.h",
"diff": "* Description: CC2538-specific board information bsp module.\n*/\n-#ifndef __BOARD_INFO_H\n-#define __BOARD_INFO_H\n+#ifndef OPENWSN_BOARD_INFO_H\n+#define OPENWSN_BOARD_INFO_H\n#include <stdint.h>\n#include <string.h>\n#define BSP_ANTENNA_BASE GPIO_D_BASE\n#define BSP_ANTENNA_CC2538_24GHZ GPIO_PIN_4 //!< PD4 -- 2.4ghz\n#define BSP_ANTENNA_AT215_24GHZ GPIO_PIN_3 //!< PD3 -- subghz\n-//#define DAGROOT\n//=========================== typedef ========================================\n"
},
{
"change_type": "MODIFY",
"old_path": "bsp/boards/scum/eui64.c",
"new_path": "bsp/boards/scum/eui64.c",
"diff": "//=========================== variables =======================================\n-#ifdef DAGROOT\n+#if OPENWSN_DAGROOT\nconst uint8_t eui64[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x88};\n#else\nconst uint8_t eui64[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77};\n"
},
{
"change_type": "MODIFY",
"old_path": "inc/config.h",
"new_path": "inc/config.h",
"diff": "#define PACKETQUEUE_LENGTH 20\n#endif\n+/**\n+ * \\def OPENWSN_DAGROOT\n+ *\n+ * Set this mote as the DODAG root.\n+ *\n+ */\n+#ifndef OPENWSN_DAGROOT\n+#define OPENWSN_DAGROOT (0)\n+#endif\n+\n// ======================== Board configuration ========================\n/**\n"
},
{
"change_type": "MODIFY",
"old_path": "openstack/cross-layers/idmanager.c",
"new_path": "openstack/cross-layers/idmanager.c",
"diff": "@@ -23,7 +23,7 @@ void idmanager_init(void) {\nidmanager_vars.slotSkip = FALSE;\n// isDAGroot\n-#ifdef DAGROOT\n+#if OPENWSN_DAGROOT\nidmanager_vars.isDAGroot = TRUE;\n#else\nidmanager_vars.isDAGroot = FALSE;\n@@ -40,7 +40,7 @@ void idmanager_init(void) {\n#endif\n// myPrefix\nidmanager_vars.myPrefix.type = ADDR_PREFIX;\n-#ifdef DAGROOT\n+#if OPENWSN_DAGROOT\nidmanager_vars.myPrefix.prefix[0] = 0xbb;\nidmanager_vars.myPrefix.prefix[1] = 0xbb;\nidmanager_vars.myPrefix.prefix[2] = 0x00;\n"
},
{
"change_type": "MODIFY",
"old_path": "projects/nrf52840/01bsp_leds/01bsp_leds.emProject",
"new_path": "projects/nrf52840/01bsp_leds/01bsp_leds.emProject",
"diff": "arm_simulator_memory_simulation_parameter=\"RWX 00000000,00100000,FFFFFFFF;RWX 20000000,00010000,CDCDCDCD\"\narm_target_device_name=\"nRF52840_xxAA\"\narm_target_interface_type=\"SWD\"\n- c_preprocessor_definitions=\"BSP_DEFINES_ONLY;FLOAT_ABI_HARD;INITIALIZE_USER_SECTIONS;NO_VTOR_CONFIG;ARM_MATH_CM4;__FPU_PRESENT=1;USE_APP_CONFIG=1;NRF52840_XXAA=1;BOARD_PCA10056=1;CONFIG_GPIO_AS_PINRESET=1;DAGROOT=1\"\n+ c_preprocessor_definitions=\"BSP_DEFINES_ONLY;FLOAT_ABI_HARD;INITIALIZE_USER_SECTIONS;NO_VTOR_CONFIG;ARM_MATH_CM4;__FPU_PRESENT=1;USE_APP_CONFIG=1;NRF52840_XXAA=1;BOARD_PCA10056=1;CONFIG_GPIO_AS_PINRESET=1;OPENWSN_DAGROOT=1\"\nc_user_include_directories=\"../../../drivers/common;../../../inc;../../../kernel;../../../openapps;../../../openapps/c6t;../../../openapps/cinfo;../../../openapps/cjoin;../../../openapps/cleds;../../../openapps/cwellknown;../../../openapps/opencoap;../../../openapps/rrt;../../../openapps/uecho;../../../openapps/uexpiration;../../../openapps/uexpiration_monitor;../../../openapps/uinject;../../../openapps/userialbridge;../../../openstack;../../../openstack/02a-MAClow;../../../openstack/02b-MAChigh;../../../openstack/03a-IPHC;../../../openstack/03b-IPv6;../../../openstack/04-TRAN;../../../openstack/cross-layers;../../../bsp/boards/nrf52840;../../../bsp/boards/nrf52840/sdk/config/nrf52840/config;../../../bsp/boards/nrf52840/sdk/integration/nrfx;../../../bsp/boards/nrf52840/sdk/components/toolchain/cmsis/include;../../../bsp/boards/nrf52840/sdk/components/drivers_nrf/nrf_soc_nosd;../../../bsp/boards/nrf52840/sdk/components/libraries/atomic;../../../bsp/boards/nrf52840/sdk/components/libraries/balloc;../../../bsp/boards/nrf52840/sdk/components/libraries/delay;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_log;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_log/src;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_memobj;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_section_vars;../../../bsp/boards/nrf52840/sdk/components/libraries/mutex;../../../bsp/boards/nrf52840/sdk/components/libraries/strerror;../../../bsp/boards/nrf52840/sdk/components/libraries/uart;../../../bsp/boards/nrf52840/sdk/components/libraries/util;../../../bsp/boards/nrf52840/sdk/integration/nrfx/legacy;../../../bsp/boards/nrf52840/sdk/modules/nrfx;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/include;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src/prs;../../../bsp/boards/nrf52840/sdk/modules/nrfx/hal;../../../bsp/boards/nrf52840/sdk/modules/nrfx/mdk;../../../bsp/boards/nrf52840/sdk/modules/nrfx/soc;../../../bsp/boards/nrf52840/sdk/modules/nrfx/templates;../../../bsp/boards/nrf52840/sdk/components/drivers_nrf/radio_config;../../../bsp/boards\"\ndebug_register_definition_file=\"../../../bsp/boards/nrf52840/sdk/modules/nrfx/mdk/nrf52840.svd\"\ndebug_start_from_entry_point_symbol=\"No\"\n"
},
{
"change_type": "MODIFY",
"old_path": "projects/nrf52840/01bsp_sctimer/01bsp_sctimer.emProject",
"new_path": "projects/nrf52840/01bsp_sctimer/01bsp_sctimer.emProject",
"diff": "arm_simulator_memory_simulation_parameter=\"RWX 00000000,00100000,FFFFFFFF;RWX 20000000,00010000,CDCDCDCD\"\narm_target_device_name=\"nRF52840_xxAA\"\narm_target_interface_type=\"SWD\"\n- c_preprocessor_definitions=\"BSP_DEFINES_ONLY;FLOAT_ABI_HARD;INITIALIZE_USER_SECTIONS;NO_VTOR_CONFIG;ARM_MATH_CM4;__FPU_PRESENT=1;USE_APP_CONFIG=1;NRF52840_XXAA=1;BOARD_PCA10056=1;CONFIG_GPIO_AS_PINRESET=1;DAGROOT=1\"\n+ c_preprocessor_definitions=\"BSP_DEFINES_ONLY;FLOAT_ABI_HARD;INITIALIZE_USER_SECTIONS;NO_VTOR_CONFIG;ARM_MATH_CM4;__FPU_PRESENT=1;USE_APP_CONFIG=1;NRF52840_XXAA=1;BOARD_PCA10056=1;CONFIG_GPIO_AS_PINRESET=1;OPENWSN_DAGROOT=1\"\nc_user_include_directories=\"../../../drivers/common;../../../inc;../../../kernel;../../../openapps;../../../openapps/c6t;../../../openapps/cinfo;../../../openapps/cjoin;../../../openapps/cleds;../../../openapps/cwellknown;../../../openapps/opencoap;../../../openapps/rrt;../../../openapps/uecho;../../../openapps/uexpiration;../../../openapps/uexpiration_monitor;../../../openapps/uinject;../../../openapps/userialbridge;../../../openstack;../../../openstack/02a-MAClow;../../../openstack/02b-MAChigh;../../../openstack/03a-IPHC;../../../openstack/03b-IPv6;../../../openstack/04-TRAN;../../../openstack/cross-layers;../../../bsp/boards/nrf52840;../../../bsp/boards/nrf52840/sdk/config/nrf52840/config;../../../bsp/boards/nrf52840/sdk/integration/nrfx;../../../bsp/boards/nrf52840/sdk/components/toolchain/cmsis/include;../../../bsp/boards/nrf52840/sdk/components/drivers_nrf/nrf_soc_nosd;../../../bsp/boards/nrf52840/sdk/components/libraries/atomic;../../../bsp/boards/nrf52840/sdk/components/libraries/balloc;../../../bsp/boards/nrf52840/sdk/components/libraries/delay;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_log;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_log/src;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_memobj;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_section_vars;../../../bsp/boards/nrf52840/sdk/components/libraries/mutex;../../../bsp/boards/nrf52840/sdk/components/libraries/strerror;../../../bsp/boards/nrf52840/sdk/components/libraries/uart;../../../bsp/boards/nrf52840/sdk/components/libraries/util;../../../bsp/boards/nrf52840/sdk/integration/nrfx/legacy;../../../bsp/boards/nrf52840/sdk/modules/nrfx;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/include;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src/prs;../../../bsp/boards/nrf52840/sdk/modules/nrfx/hal;../../../bsp/boards/nrf52840/sdk/modules/nrfx/mdk;../../../bsp/boards/nrf52840/sdk/modules/nrfx/soc;../../../bsp/boards/nrf52840/sdk/modules/nrfx/templates;../../../bsp/boards/nrf52840/sdk/components/drivers_nrf/radio_config;../../../bsp/boards\"\ndebug_register_definition_file=\"../../../bsp/boards/nrf52840/sdk/modules/nrfx/mdk/nrf52840.svd\"\ndebug_start_from_entry_point_symbol=\"No\"\n"
},
{
"change_type": "MODIFY",
"old_path": "projects/nrf52840/02drv_openserial/02drv_openserial.emProject",
"new_path": "projects/nrf52840/02drv_openserial/02drv_openserial.emProject",
"diff": "arm_simulator_memory_simulation_parameter=\"RWX 00000000,00100000,FFFFFFFF;RWX 20000000,00010000,CDCDCDCD\"\narm_target_device_name=\"nRF52840_xxAA\"\narm_target_interface_type=\"SWD\"\n- c_preprocessor_definitions=\"BSP_DEFINES_ONLY;FLOAT_ABI_HARD;INITIALIZE_USER_SECTIONS;NO_VTOR_CONFIG;ARM_MATH_CM4;__FPU_PRESENT=1;USE_APP_CONFIG=1;NRF52840_XXAA=1;BOARD_PCA10056=1;CONFIG_GPIO_AS_PINRESET=1;DAGROOT=1\"\n+ c_preprocessor_definitions=\"BSP_DEFINES_ONLY;FLOAT_ABI_HARD;INITIALIZE_USER_SECTIONS;NO_VTOR_CONFIG;ARM_MATH_CM4;__FPU_PRESENT=1;USE_APP_CONFIG=1;NRF52840_XXAA=1;BOARD_PCA10056=1;CONFIG_GPIO_AS_PINRESET=1;OPENWSN_DAGROOT=1\"\nc_user_include_directories=\"../../../drivers/common;../../../inc;../../../kernel;../../../openapps;../../../openapps/c6t;../../../openapps/cinfo;../../../openapps/cjoin;../../../openapps/cleds;../../../openapps/cwellknown;../../../openapps/opencoap;../../../openapps/rrt;../../../openapps/uecho;../../../openapps/uexpiration;../../../openapps/uexpiration_monitor;../../../openapps/uinject;../../../openapps/userialbridge;../../../openstack;../../../openstack/02a-MAClow;../../../openstack/02b-MAChigh;../../../openstack/03a-IPHC;../../../openstack/03b-IPv6;../../../openstack/04-TRAN;../../../openstack/cross-layers;../../../bsp/boards/nrf52840;../../../bsp/boards/nrf52840/sdk/config/nrf52840/config;../../../bsp/boards/nrf52840/sdk/integration/nrfx;../../../bsp/boards/nrf52840/sdk/components/toolchain/cmsis/include;../../../bsp/boards/nrf52840/sdk/components/drivers_nrf/nrf_soc_nosd;../../../bsp/boards/nrf52840/sdk/components/libraries/atomic;../../../bsp/boards/nrf52840/sdk/components/libraries/balloc;../../../bsp/boards/nrf52840/sdk/components/libraries/delay;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_log;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_log/src;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_memobj;../../../bsp/boards/nrf52840/sdk/components/libraries/experimental_section_vars;../../../bsp/boards/nrf52840/sdk/components/libraries/mutex;../../../bsp/boards/nrf52840/sdk/components/libraries/strerror;../../../bsp/boards/nrf52840/sdk/components/libraries/uart;../../../bsp/boards/nrf52840/sdk/components/libraries/util;../../../bsp/boards/nrf52840/sdk/integration/nrfx/legacy;../../../bsp/boards/nrf52840/sdk/modules/nrfx;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/include;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src;../../../bsp/boards/nrf52840/sdk/modules/nrfx/drivers/src/prs;../../../bsp/boards/nrf52840/sdk/modules/nrfx/hal;../../../bsp/boards/nrf52840/sdk/modules/nrfx/mdk;../../../bsp/boards/nrf52840/sdk/modules/nrfx/soc;../../../bsp/boards/nrf52840/sdk/modules/nrfx/templates;../../../bsp/boards/nrf52840/sdk/components/drivers_nrf/radio_config;../../../bsp/boards\"\ndebug_register_definition_file=\"../../../bsp/boards/nrf52840/sdk/modules/nrfx/mdk/nrf52840.svd\"\ndebug_start_from_entry_point_symbol=\"No\"\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Move DAGROOT switch to config.h
|
491,587 |
27.08.2020 14:00:18
| -7,200 |
06fdefec6eb6ddeed5e55f224e6d0d3b10ca1a12
|
Remove eclipse project file
|
[
{
"change_type": "DELETE",
"old_path": ".project",
"new_path": null,
"diff": "-<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n-<projectDescription>\n- <name>openos</name>\n- <comment></comment>\n- <projects>\n- </projects>\n- <buildSpec>\n- <buildCommand>\n- <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>\n- <triggers>full,incremental,</triggers>\n- <arguments>\n- </arguments>\n- </buildCommand>\n- <buildCommand>\n- <name>ch.hsr.ifs.sconsolidator.Builder</name>\n- <arguments>\n- </arguments>\n- </buildCommand>\n- </buildSpec>\n- <natures>\n- <nature>org.eclipse.cdt.core.cnature</nature>\n- <nature>org.eclipse.cdt.core.ccnature</nature>\n- <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>\n- <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>\n- <nature>ch.hsr.ifs.sconsolidator.ExistingCodeNature</nature>\n- </natures>\n-</projectDescription>\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Remove eclipse project file
|
491,587 |
27.08.2020 14:02:13
| -7,200 |
34e72813c7da120660811add12b49e1341284219
|
Remove unused debug flag
|
[
{
"change_type": "MODIFY",
"old_path": "SConstruct",
"new_path": "SConstruct",
"diff": "@@ -125,7 +125,6 @@ command_line_options = {\n'simhost': ['amd64-linux', 'x86-linux', 'amd64-windows', 'x86-windows'],\n'simhostpy': [''], # No reasonable default\n'panid': [''],\n- 'debug': ['0', '1'],\n'atmel_24ghz': ['0', '1'],\n'revision': ['']\n}\n@@ -212,14 +211,6 @@ command_line_vars.AddVariables(\nNone, # validator\nNone, # converter\n),\n- (\n- 'debug', # key\n- '', # help\n- command_line_options['debug'][0], # default\n- validate_option, # validator\n- int, # converter\n- ),\n- (\n'atmel_24ghz', # key\n'', # help\ncommand_line_options['atmel_24ghz'][0], # default\n"
},
{
"change_type": "MODIFY",
"old_path": "projects/gina/SConscript.env",
"new_path": "projects/gina/SConscript.env",
"diff": "@@ -24,11 +24,6 @@ MSPVERSION = \"2618\"\nif buildEnv['toolchain']=='mspgcc':\nflags = []\nflags += ['-mmcu=msp430f{0}'.format(MSPVERSION)]\n- if buildEnv['debug']==0:\n- flags += ['-Os']\n- else:\n- flags += ['-O0']\n- flags += ['-g']\nbuildEnv.Append(CCFLAGS = ' '.join(flags))\nbuildEnv.Append(LINKFLAGS = ' '.join(flags))\nelif buildEnv['toolchain']=='iar':\n"
},
{
"change_type": "MODIFY",
"old_path": "projects/telosb/SConscript.env",
"new_path": "projects/telosb/SConscript.env",
"diff": "@@ -24,11 +24,6 @@ MSPVERSION = \"1611\"\nif buildEnv['toolchain']=='mspgcc':\nflags = []\nflags += ['-mmcu=msp430f{0}'.format(MSPVERSION)]\n- if buildEnv['debug']==0:\n- flags += ['-Os']\n- else:\n- flags += ['-O0']\n- flags += ['-g']\nbuildEnv.Append(CCFLAGS = ' '.join(flags))\nbuildEnv.Append(LINKFLAGS = ' '.join(flags))\nelif buildEnv['toolchain']=='iar':\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Remove unused debug flag
|
491,587 |
27.08.2020 14:02:32
| -7,200 |
eae24a91c40039f75a9f947a6c4096233eff338b
|
Move PANID to config.h
|
[
{
"change_type": "MODIFY",
"old_path": "SConscript",
"new_path": "SConscript",
"diff": "@@ -83,8 +83,6 @@ if env['board'] != 'python':\ndummyFunc = Builder(action='', suffix='.ihex')\n# add the build variables\n-if env['panid']:\n- env.Append(CPPDEFINES={'PANID_DEFINED': env['panid']})\nif env['atmel_24ghz'] == 1:\nenv.Append(CPPDEFINES='ATMEL_24GHZ')\n"
},
{
"change_type": "MODIFY",
"old_path": "SConstruct",
"new_path": "SConstruct",
"diff": "@@ -124,7 +124,6 @@ command_line_options = {\n'verbose': ['0', '1'],\n'simhost': ['amd64-linux', 'x86-linux', 'amd64-windows', 'x86-windows'],\n'simhostpy': [''], # No reasonable default\n- 'panid': [''],\n'atmel_24ghz': ['0', '1'],\n'revision': ['']\n}\n@@ -205,12 +204,6 @@ command_line_vars.AddVariables(\nNone, # converter\n),\n(\n- 'panid', # key\n- '0xFFFF', # help\n- command_line_options['panid'][0], # default\n- None, # validator\n- None, # converter\n- ),\n'atmel_24ghz', # key\n'', # help\ncommand_line_options['atmel_24ghz'][0], # default\n"
},
{
"change_type": "MODIFY",
"old_path": "openstack/cross-layers/idmanager.c",
"new_path": "openstack/cross-layers/idmanager.c",
"diff": "@@ -31,7 +31,7 @@ void idmanager_init(void) {\n// myPANID\nidmanager_vars.myPANID.type = ADDR_PANID;\n-#ifdef PANID_DEFINED\n+#ifdef OPENWSN_PANID_DEFINED\nidmanager_vars.myPANID.panid[0] = PANID_DEFINED & 0x00ff;\nidmanager_vars.myPANID.panid[1] =(PANID_DEFINED & 0xff00)>>8;\n#else\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Move PANID to config.h
|
491,587 |
27.08.2020 14:26:52
| -7,200 |
1745e59207ea84b68137c1e4b0e712ebab2f2c1b
|
fix warnings in doxygen
|
[
{
"change_type": "MODIFY",
"old_path": "docs/Doxyfile",
"new_path": "docs/Doxyfile",
"diff": "@@ -1821,18 +1821,6 @@ GENERATE_XML = NO\nXML_OUTPUT = xml\n-# The XML_SCHEMA tag can be used to specify a XML schema, which can be used by a\n-# validating XML parser to check the syntax of the XML files.\n-# This tag requires that the tag GENERATE_XML is set to YES.\n-\n-XML_SCHEMA =\n-\n-# The XML_DTD tag can be used to specify a XML DTD, which can be used by a\n-# validating XML parser to check the syntax of the XML files.\n-# This tag requires that the tag GENERATE_XML is set to YES.\n-\n-XML_DTD =\n-\n# If the XML_PROGRAMLISTING tag is set to YES doxygen will dump the program\n# listings (including syntax highlighting and cross-referencing information) to\n# the XML output. Note that enabling this will significantly increase the size\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
fix warnings in doxygen
|
491,587 |
27.08.2020 14:48:22
| -7,200 |
d8c2a40380f5db9eca30dc297117d14939d80680
|
Add compile flags for apps and modules
|
[
{
"change_type": "MODIFY",
"old_path": "SConstruct",
"new_path": "SConstruct",
"diff": "@@ -49,6 +49,10 @@ project:\n(MinGW on Windows build host).\nmspgcc, iar, iar-proj, gcc\n+ Software modules/apps to include:\n+ modules A comma, separated list of modules to include in the build.\n+ apps A comma, separated list of apps to include in the build.\n+\nConnected hardware variables:\nbootload Location of the board to bootload the binary on.\nCOMx for Windows, /dev entries for Linux\n@@ -59,10 +63,6 @@ project:\nfet_version Firmware version running on the MSP-FET430uif for jtag.\n2, 3\n- Simulation variables:\n- fastsim Compiles the firmware for fast simulation.\n- 1 (on), 0 (off)\n-\nThese simulation variables are for a cross-platform build, and are valid\nonly from an amd64-linux build host.\nsimhost Host platform and OS for simulation. Default selection is\n@@ -120,6 +120,9 @@ command_line_options = {\n'armgcc',\n'gcc',\n],\n+ 'apps': ['c6t', 'cexample', 'cinfo', 'cinfrared', 'cled', 'csensors', 'cstorm', 'cwellknown', 'rrt', 'uecho',\n+ 'uexpiration', 'uexp-monitor', 'uinject', 'userialbridge', 'cjoin', ''],\n+ 'modules': ['coap', 'udp', 'fragmentation', 'adaptive-msf', 'icmpv6echo', 'l2-security', ''],\n'fet_version': ['2', '3'],\n'verbose': ['0', '1'],\n'simhost': ['amd64-linux', 'x86-linux', 'amd64-windows', 'x86-windows'],\n@@ -189,6 +192,20 @@ command_line_vars.AddVariables(\nvalidate_option, # validator\nint, # converter\n),\n+ (\n+ 'modules', # key\n+ '', # help\n+ '', # default\n+ validate_option, # validator\n+ None, # converter\n+ ),\n+ (\n+ 'apps', # key\n+ '', # help\n+ '', # default\n+ validate_option, # validator\n+ None, # converter\n+ ),\n(\n'simhost', # key\n'', # help\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Add compile flags for apps and modules
|
491,587 |
27.08.2020 15:48:12
| -7,200 |
4210b121a2035f9a372ffbdf55f25209b5522631
|
Split stack modules and stack configuration
Move ADAPTIVE-MSF to stack conf
|
[
{
"change_type": "MODIFY",
"old_path": "inc/config.h",
"new_path": "inc/config.h",
"diff": "#endif\n-// ======================== Stack configuration ========================\n+// ========================== Stack modules ===========================\n/**\n* \\def OPENWSN_UDP_C\n#endif\n#endif\n-\n-/**\n- * \\def OPENWSN_ADAPTIVE_MSF\n- *\n- * Allow the MSF algorithm to dynamically remove and allocate slots, based on the traffic load in the network.\n- *\n- */\n-#ifndef OPENWSN_ADAPTIVE_MSF\n-#define OPENWSN_ADAPTIVE_MSF (0)\n-#endif\n-\n-\n/**\n* \\def OPENWSN_ICMPV6ECHO_C\n*\n#endif\n+// ========================== Stack configuration ===========================\n+\n+/**\n+ * \\def OPENWSN_ADAPTIVE_MSF\n+ *\n+ * Allow the MSF algorithm to dynamically remove and allocate slots, based on the traffic load in the network.\n+ *\n+ */\n+#ifndef OPENWSN_ADAPTIVE_MSF\n+#define OPENWSN_ADAPTIVE_MSF (0)\n+#endif\n+\n+\n/**\n* \\def IEEE802154E_SINGLE_CHANNEL\n*\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Split stack modules and stack configuration
Move ADAPTIVE-MSF to stack conf
|
491,587 |
27.08.2020 15:48:53
| -7,200 |
38d4939725c1ed06a1df3f532715c532662a1d34
|
Add compile flags for apps, modules, stack conf., and board options
|
[
{
"change_type": "MODIFY",
"old_path": "SConscript",
"new_path": "SConscript",
"diff": "@@ -61,6 +61,65 @@ else:\nprint c.Fore.RED + \"Unsupported board: {}\".format(env['board']) + c.Fore.RESET\nExit(-1)\n+# check which modules we have to include in the build\n+if 'coap' in env['modules'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_COAP_C')\n+if 'udp' in env['modules'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_UDP_C')\n+if 'l2-security' in env['modules'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_IEEE802154E_SECURITY_C')\n+if 'fragmentation' in env['modules'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_6LO_FRAGMENTATION_C')\n+if 'icmpv6echo' in env['modules'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_ICMPV6ECHO_C')\n+\n+# check which apps we have to include in the build\n+if 'c6t' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_C6T_C')\n+if 'cexample' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_CEXAMPLE_C')\n+if 'cinfo' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_CINFO_C')\n+if 'cinfrared' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_CINFRARED_C')\n+if 'cled' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_CLED_C')\n+if 'csensors' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_CSENSORS_C')\n+if 'cstorm' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_CSTORM_C')\n+if 'cwellknown' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_CWELLKNOWN_C')\n+if 'rrt' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_RRT_C')\n+if 'uecho' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_UECHO_C')\n+if 'uexpiration' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_UEXPIRATION_C')\n+if 'uexp-monitor' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_UEXP_MONITOR_C')\n+if 'uinject' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_UINJECT_C')\n+if 'userialbridge' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_USERIALBRIDGE_C')\n+if 'cjoin' in env['apps'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_CJOIN_C')\n+\n+# check the stack configuration\n+if 'adaptive-msf' in env['stackcfg'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_ADAPTIVE_MSF')\n+if 'dagroot' in env['stackcfg'].split(','):\n+ env.Append(CPPDEFINES='OPENWSN_DAGROOT')\n+\n+# check the board features\n+if 'hw-crypto' in env['boardopt'].split(','):\n+ env.Append(CPPDEFINES='BOARD_CRYPTOENGINE_ENABLED')\n+if 'printf' in env['boardopt'].split(','):\n+ env.Append(CPPDEFINES='BOARD_OPENSERIAL_PRINTF')\n+if 'fastsim' in env['boardopt'].split(','):\n+ env.Append(CPPDEFINES='BOARD_FASTSIM_ENABLED')\n+\n+\n# common include paths\nif env['board'] != 'python':\nenv.Append(\n"
},
{
"change_type": "MODIFY",
"old_path": "SConstruct",
"new_path": "SConstruct",
"diff": "@@ -49,9 +49,11 @@ project:\n(MinGW on Windows build host).\nmspgcc, iar, iar-proj, gcc\n- Software modules/apps to include:\n+ Software modules/apps to include and stack/board configuration:\nmodules A comma, separated list of modules to include in the build.\napps A comma, separated list of apps to include in the build.\n+ stackcfg A comma, separated list of stack configuration options.\n+ boardopt A comma, separated list of board options.\nConnected hardware variables:\nbootload Location of the board to bootload the binary on.\n@@ -122,7 +124,9 @@ command_line_options = {\n],\n'apps': ['c6t', 'cexample', 'cinfo', 'cinfrared', 'cled', 'csensors', 'cstorm', 'cwellknown', 'rrt', 'uecho',\n'uexpiration', 'uexp-monitor', 'uinject', 'userialbridge', 'cjoin', ''],\n- 'modules': ['coap', 'udp', 'fragmentation', 'adaptive-msf', 'icmpv6echo', 'l2-security', ''],\n+ 'modules': ['coap', 'udp', 'fragmentation', 'icmpv6echo', 'l2-security', ''],\n+ 'stackcfg': ['adaptive-msf', 'dagroot', ''],\n+ 'boardopt' : ['hw-crypto', 'printf', 'fastsim', ''],\n'fet_version': ['2', '3'],\n'verbose': ['0', '1'],\n'simhost': ['amd64-linux', 'x86-linux', 'amd64-windows', 'x86-windows'],\n@@ -136,8 +140,15 @@ def validate_option(key, value, env):\nif key not in command_line_options:\nprint c.Fore.RED + \"Unknown switch {0}.\".format(key) + c.Fore.RESET\nExit(-1)\n- if value not in command_line_options[key]:\n- print c.Fore.RED + \"Unknown {0} \\\"{1}\\\". Options are {2}.\\n\\n\".format(key, value, ','.join(\n+\n+ if key == 'modules' or key == 'apps':\n+ values = value.split(',')\n+ else:\n+ values = [value]\n+\n+ for v in values:\n+ if v not in command_line_options[key]:\n+ print c.Fore.RED + \"Unknown {0} \\\"{1}\\\". Options are: {2}.\\n\\n\".format(key, v, ', '.join(\ncommand_line_options[key])) + c.Fore.RESET\nExit(-1)\n@@ -206,6 +217,20 @@ command_line_vars.AddVariables(\nvalidate_option, # validator\nNone, # converter\n),\n+ (\n+ 'stackcfg', # key\n+ '', # help\n+ '', # default\n+ validate_option, # validator\n+ None, # converter\n+ ),\n+ (\n+ 'boardopt', # key\n+ '', # help\n+ '', # default\n+ validate_option, # validator\n+ None, # converter\n+ ),\n(\n'simhost', # key\n'', # help\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Add compile flags for apps, modules, stack conf., and board options
|
491,587 |
31.08.2020 17:10:34
| -7,200 |
83560a2538834389bba57d732d1af093fec2fe6f
|
Move deadline option to stack configuration in config.h + fix ifdef bug
|
[
{
"change_type": "MODIFY",
"old_path": "inc/config.h",
"new_path": "inc/config.h",
"diff": "#define OPENWSN_UDP_C (0)\n#endif\n-/**\n- * \\def OPENWSN_DEADLINE_OPTION\n- *\n- * Activates IPv6 DEADLINE OPTION.\n- *\n- */\n-#ifdef OPENWSN_DEADLINE_OPTION\n-#define OPENWSN_DEADLINE_OPTION (0)\n-#endif\n-\n/**\n* \\def OPENWSN_6LO_FRAGMENTATION_C\n*\n// ========================== Stack configuration ===========================\n+/**\n+ * \\def OPENWSN_DEADLINE_OPTION\n+ *\n+ * Activates IPv6 DEADLINE OPTION.\n+ *\n+ */\n+#ifndef OPENWSN_DEADLINE_OPTION\n+#define OPENWSN_DEADLINE_OPTION (0)\n+#endif\n+\n/**\n* \\def OPENWSN_ADAPTIVE_MSF\n*\n"
},
{
"change_type": "MODIFY",
"old_path": "openstack/02a-MAClow/IEEE802154E.c",
"new_path": "openstack/02a-MAClow/IEEE802154E.c",
"diff": "@@ -249,7 +249,7 @@ PORT_TIMER_WIDTH ieee154e_asnDiff(asn_t *someASN) {\nreturn diff;\n}\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\n/**\n/brief Difference between two ASN values\n"
},
{
"change_type": "MODIFY",
"old_path": "openstack/03a-IPHC/iphc.c",
"new_path": "openstack/03a-IPHC/iphc.c",
"diff": "static const uint8_t dagroot_mac64b[] = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01};\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\nstatic monitor_expiration_vars_t monitor_expiration_vars;\n#endif\n@@ -37,7 +37,7 @@ owerror_t iphc_retrieveIphcHeader(open_addr_t *temp_addr_16b,\n//===== IPv6 hop-by-hop header\nowerror_t iphc_prependIPv6HopByHopHeader(OpenQueueEntry_t **msg, uint8_t nextheader, rpl_option_ht *rpl_option);\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\n// IPv6 Deadline hop-by-hop header\nowerror_t iphc_prependIPv6DeadlineHeader(OpenQueueEntry_t **msg);\n@@ -55,7 +55,7 @@ owerror_t iphc_sendFromForwarding(\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\nrpl_option_ht *rpl_option,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nuint32_t *flow_label,\n@@ -178,7 +178,7 @@ owerror_t iphc_sendFromForwarding(\n}\n}\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\nif ((msg->creator == COMPONENT_UEXPIRATION) && (deadline_option != NULL)) {\nif (\ndeadline_option->optionType == DEADLINE_HOPBYHOP_HEADER_OPTION_TYPE &&\n@@ -256,7 +256,7 @@ void iphc_receive(OpenQueueEntry_t *msg) {\nuint8_t page_length;\nrpl_option_ht rpl_option;\nuint8_t rpi_length;\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_option_ht *deadline_ptr = NULL;\ndeadline_option_ht curr_deadline_option;\n#endif\n@@ -267,7 +267,7 @@ void iphc_receive(OpenQueueEntry_t *msg) {\nmemset(&ipv6_inner_header, 0, sizeof(ipv6_header_iht));\nmemset(&rpl_option, 0, sizeof(rpl_option_ht));\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\nipv6_outer_header.deadline_option = NULL;\n#endif\n@@ -283,7 +283,7 @@ void iphc_receive(OpenQueueEntry_t *msg) {\nif (ipv6_outer_header.next_header == IANA_IPv6HOPOPT && ipv6_outer_header.hopByhop_option != NULL) {\n// retrieve hop-by-hop header (includes RPL option)\nrpi_length = iphc_retrieveIPv6HopByHopHeader(msg, &rpl_option);\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\nif (ipv6_outer_header.deadline_option) {\nmemset(&curr_deadline_option, 0, sizeof(curr_deadline_option));\niphc_retrieveIPv6DeadlineHeader(msg, ipv6_outer_header.deadline_option, &curr_deadline_option);\n@@ -299,7 +299,7 @@ void iphc_receive(OpenQueueEntry_t *msg) {\nmsg,\n&ipv6_outer_header,\n&ipv6_inner_header,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_ptr,\n#endif\n&rpl_option\n@@ -705,7 +705,7 @@ owerror_t iphc_retrieveIPv6Header(OpenQueueEntry_t *msg, ipv6_header_iht *ipv6_o\n}\n}\n}\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\nelse if (lorh_type == DEADLINE_6LOTH_TYPE) {\nipv6_outer_header->deadline_option = (uint8_t * )(msg->payload) + *page_length + \\\nextention_header_length;\n@@ -1077,7 +1077,7 @@ owerror_t iphc_prependIPv6HopByHopHeader(OpenQueueEntry_t **msg, uint8_t nexthea\nreturn E_SUCCESS;\n}\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\n//===== IPv6 Deadline hop-by-hop header\n/**\n\\brief Prepend an IPv6 Deadline hop-by-hop header to a message.\n@@ -1215,7 +1215,7 @@ uint8_t iphc_retrieveIPv6HopByHopHeader(OpenQueueEntry_t *msg, rpl_option_ht *rp\nreturn length;\n}\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\n/**\n\\brief Retrieve a Deadline hop-by-hop header from a message.\n"
},
{
"change_type": "MODIFY",
"old_path": "openstack/03a-IPHC/iphc.h",
"new_path": "openstack/03a-IPHC/iphc.h",
"diff": "@@ -144,7 +144,7 @@ enum TYPE_6LORH_enums {\nRH3_6LOTH_TYPE_4 = 0x04,\nRPI_6LOTH_TYPE = 0x05,\nIPECAP_6LOTH_TYPE = 0x06,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\nDEADLINE_6LOTH_TYPE = 0x07,\n#endif\n};\n@@ -168,7 +168,7 @@ typedef struct {\nuint8_t next_header;\nuint8_t *routing_header[MAXNUM_RH3];\nuint8_t *hopByhop_option;\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\nuint8_t* deadline_option;\n#endif\nuint8_t hop_limit;\n@@ -220,7 +220,7 @@ typedef struct {\n} rpl_option_ht;\nEND_PACK\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\nBEGIN_PACK\ntypedef struct {\nuint8_t optionType;\n@@ -254,7 +254,7 @@ owerror_t iphc_sendFromForwarding(\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\nrpl_option_ht *rpl_option,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nuint32_t *flow_label,\n@@ -304,7 +304,7 @@ owerror_t iphc_retrieveIPv6Header(OpenQueueEntry_t *msg,\nuint8_t *page_length\n);\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\nvoid iphc_retrieveIPv6DeadlineHeader(\nOpenQueueEntry_t* msg,\nuint8_t* deadline_msg_ptr,\n"
},
{
"change_type": "MODIFY",
"old_path": "openstack/03b-IPv6/forwarding.c",
"new_path": "openstack/03b-IPv6/forwarding.c",
"diff": "@@ -23,7 +23,7 @@ owerror_t forwarding_send_internal_RoutingTable(\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\nrpl_option_ht *rpl_option,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nuint32_t *flow_label,\n@@ -34,7 +34,7 @@ owerror_t forwarding_send_internal_SourceRouting(\nOpenQueueEntry_t *msg,\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nrpl_option_ht *rpl_option\n@@ -42,7 +42,7 @@ owerror_t forwarding_send_internal_SourceRouting(\nvoid forwarding_createRplOption(rpl_option_ht *rpl_option, uint8_t flags);\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\nvoid forwarding_createDeadlineOption( deadline_option_ht* deadline_option);\n#endif\n@@ -66,7 +66,7 @@ owerror_t forwarding_send(OpenQueueEntry_t *msg) {\nipv6_header_iht ipv6_outer_header;\nipv6_header_iht ipv6_inner_header;\nrpl_option_ht rpl_option;\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_option_ht deadline_option;\n#endif\nopen_addr_t *myprefix;\n@@ -143,7 +143,7 @@ owerror_t forwarding_send(OpenQueueEntry_t *msg) {\n0x00 // flags\n);\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\nforwarding_createDeadlineOption(\n&deadline_option\n);\n@@ -212,7 +212,7 @@ owerror_t forwarding_send(OpenQueueEntry_t *msg) {\n&ipv6_outer_header,\n&ipv6_inner_header,\n&rpl_option,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\n&deadline_option,\n#endif\n&flow_label,\n@@ -277,7 +277,7 @@ void forwarding_receive(\nOpenQueueEntry_t *msg,\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nrpl_option_ht *rpl_option\n@@ -337,7 +337,7 @@ void forwarding_receive(\n// change the creator of the packet\nmsg->creator = COMPONENT_FORWARDING;\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\nif (deadline_option != NULL) {\n// Deadline Option : Drop\nif( (deadline_option->time_left <= 0) && (deadline_option->d_flag == 1) ) { // packet expired\n@@ -379,7 +379,7 @@ void forwarding_receive(\n}\nforwarding_createRplOption(rpl_option, rpl_option->flags);\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\nif (deadline_option != NULL)\nforwarding_createDeadlineOption(deadline_option);\n#endif\n@@ -391,7 +391,7 @@ void forwarding_receive(\nipv6_outer_header,\nipv6_inner_header,\nrpl_option,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_option,\n#endif\n&(ipv6_outer_header->flow_label),\n@@ -403,7 +403,7 @@ void forwarding_receive(\n} else {\n// source routing header present\nif (forwarding_send_internal_SourceRouting(msg, ipv6_outer_header, ipv6_inner_header,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_option,\n#endif\nrpl_option) == E_FAIL) {\n@@ -453,7 +453,7 @@ owerror_t forwarding_send_internal_RoutingTable(\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\nrpl_option_ht *rpl_option,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nuint32_t *flow_label,\n@@ -491,7 +491,7 @@ owerror_t forwarding_send_internal_RoutingTable(\nipv6_outer_header,\nipv6_inner_header,\nrpl_option,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_option,\n#endif\nflow_label,\n@@ -518,7 +518,7 @@ owerror_t forwarding_send_internal_SourceRouting(\nOpenQueueEntry_t *msg,\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nrpl_option_ht *rpl_option\n@@ -785,7 +785,7 @@ owerror_t forwarding_send_internal_SourceRouting(\n}\nforwarding_createRplOption(rpl_option, rpl_option->flags);\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\nif (deadline_option != NULL)\nforwarding_createDeadlineOption(deadline_option);\n#endif\n@@ -804,7 +804,7 @@ owerror_t forwarding_send_internal_SourceRouting(\nipv6_outer_header,\nipv6_inner_header,\nrpl_option,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_option,\n#endif\n&ipv6_outer_header->flow_label,\n@@ -842,7 +842,7 @@ void forwarding_createRplOption(rpl_option_ht *rpl_option, uint8_t flags) {\nrpl_option->flags = (flags & ~I_FLAG & ~K_FLAG) | (I << 1) | K;\n}\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\n/**\n\\brief Create a Deadline-6LoRH .\n"
},
{
"change_type": "MODIFY",
"old_path": "openstack/03b-IPv6/forwarding.h",
"new_path": "openstack/03b-IPv6/forwarding.h",
"diff": "#define RPL_HOPBYHOP_HEADER_OPTION_TYPE 0x63\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\n#define DEADLINE_HOPBYHOP_HEADER_OPTION_TYPE 0xAB\n#endif\n@@ -66,7 +66,7 @@ void forwarding_receive(\nOpenQueueEntry_t *msg,\nipv6_header_iht *ipv6_outer_header,\nipv6_header_iht *ipv6_inner_header,\n-#ifdef OPENWSN_DEADLINE_OPTION\n+#if OPENWSN_DEADLINE_OPTION\ndeadline_option_ht* deadline_option,\n#endif\nrpl_option_ht *rpl_option\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Move deadline option to stack configuration in config.h + fix ifdef bug
|
491,587 |
31.08.2020 17:11:07
| -7,200 |
60c4c128814cbca297fb02c99e8aca4e08748989
|
Move python build scripts to "Scripts" folder + announce footprint scripts
|
[
{
"change_type": "ADD",
"old_path": null,
"new_path": "scripts/README.md",
"diff": "+# OpenWSN-FW Scripts\n+\n+This folder contains scripts for building the firmware an analysis of the code footprint.\n+\n+- **site_scons**: SCons build scripts\n+- **footprints**: script to analyze\n\\ No newline at end of file\n"
},
{
"change_type": "RENAME",
"old_path": "site_scons/sconsUtils.py",
"new_path": "scripts/site_scons/sconsUtils.py",
"diff": ""
},
{
"change_type": "RENAME",
"old_path": "site_scons/site_tools/crossMingw64.py",
"new_path": "scripts/site_scons/site_tools/crossMingw64.py",
"diff": ""
},
{
"change_type": "DELETE",
"old_path": "site_scons/README.md",
"new_path": "site_scons/README.md",
"diff": ""
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Move python build scripts to "Scripts" folder + announce footprint scripts
|
491,587 |
01.09.2020 11:22:25
| -7,200 |
5e3e1d9d72ce0b65cd5d5afca0e354745ffa6b47
|
Enables stackcfg options + logging option + optimization flag option
|
[
{
"change_type": "MODIFY",
"old_path": "SConscript",
"new_path": "SConscript",
"diff": "@@ -119,6 +119,26 @@ if 'printf' in env['boardopt'].split(','):\nif 'fastsim' in env['boardopt'].split(','):\nenv.Append(CPPDEFINES='BOARD_FASTSIM_ENABLED')\n+# set logging level OpenWSN\n+env.Append(CPPDEFINES='OPENWSN_DEBUG_LEVEL={}'.format(env['logging']))\n+\n+# set stack configuration options\n+for option in env['stackcfg'].split(','):\n+ if option == '':\n+ continue\n+\n+ name, _, value = option.partition(':')\n+\n+ if name == 'pktqueue':\n+ env.Append(CPPDEFINES='PACKETQUEUE_LENGTH={}'.format(value))\n+ elif name == 'dagroot':\n+ env.Append(CPPDEFINES='DAGROOT')\n+ elif name == 'adaptive-msf':\n+ env.Append(CPPDEFINES='ADAPTIVE_MSF')\n+ elif name == 'channel':\n+ env.Append(CPPDEFINES='IEEE802154E_SINGLE_CHANNEL={}'.format(value))\n+ else:\n+ print c.Fore.RED + 'Unknown or invalid option for stackcfg: {}'.format(name) + c.Fore.RESET\n# common include paths\nif env['board'] != 'python':\n@@ -156,7 +176,7 @@ if env['toolchain'] == 'mspgcc':\nenv.Append(CCFLAGS='-Wstrict-prototypes')\nenv.Append(CCFLAGS='-ffunction-sections')\nenv.Append(CCFLAGS='-fdata-sections')\n- env.Append(CCFLAGS='')\n+ env.Append(CCFLAGS=env['oflag'])\n# archiver\nenv.Replace(AR='msp430-ar')\n@@ -302,7 +322,7 @@ elif env['toolchain'] == 'armgcc':\n# compiler (C)\nenv.Replace(CC='arm-none-eabi-gcc')\n- env.Append(CCFLAGS='-O0')\n+ env.Append(CCFLAGS=env['oflag'])\nenv.Append(CCFLAGS='-Wall')\nenv.Append(CCFLAGS='-Wa,-adhlns=${TARGET.base}.lst')\nenv.Append(CCFLAGS='-c')\n@@ -350,7 +370,7 @@ elif env['toolchain'] == 'armgcc':\nelif env['board'] == 'silabs-ezr32wg':\n# compiler (C)\nenv.Replace(CC='arm-none-eabi-gcc')\n- env.Append(CCFLAGS='-O0')\n+ env.Append(CCFLAGS=env['oflag'])\nenv.Append(CCFLAGS='-Wall')\nenv.Append(CCFLAGS='-Wa,-adhlns=${TARGET.base}.lst')\nenv.Append(CCFLAGS='-c')\n@@ -408,7 +428,7 @@ elif env['toolchain'] == 'armgcc':\nenv.Append(CCFLAGS='-ggdb')\nenv.Append(CCFLAGS='-g3')\nenv.Append(CCFLAGS='-std=gnu99')\n- env.Append(CCFLAGS='-O0')\n+ env.Append(CCFLAGS=env['oflag'])\nenv.Append(CCFLAGS='-Wall')\nenv.Append(CCFLAGS='-Wstrict-prototypes')\nenv.Append(CCFLAGS='-mcpu=cortex-m3')\n@@ -454,7 +474,7 @@ elif env['toolchain'] == 'armgcc':\n# compiler (C)\nenv.Replace(CC='arm-none-eabi-gcc')\n- env.Append(CCFLAGS='-O1')\n+ env.Append(CCFLAGS=env['oflag'])\nenv.Append(CCFLAGS='-Wall')\nenv.Append(CCFLAGS='-Wa,-adhlns=${TARGET.base}.lst')\nenv.Append(CCFLAGS='-c')\n@@ -495,7 +515,7 @@ elif env['toolchain'] == 'armgcc':\n# compiler (C)\nenv.Replace(CC='arm-none-eabi-gcc')\n- env.Append(CCFLAGS='-O0')\n+ env.Append(CCFLAGS=env['oflag'])\nenv.Append(CCFLAGS='-Wall')\nenv.Append(CCFLAGS='-Wa,-adhlns=${TARGET.base}.lst')\nenv.Append(CCFLAGS='-c')\n@@ -558,7 +578,7 @@ elif env['toolchain'] == 'armgcc':\n# compiler (C)\nenv.Replace(CC='arm-none-eabi-gcc')\n- env.Append(CCFLAGS='-O3')\n+ env.Append(CCFLAGS=env['oflag'])\nenv.Append(CCFLAGS='-Wall')\nenv.Append(CCFLAGS='-mcpu=cortex-m0')\nenv.Append(CCFLAGS='-mthumb')\n"
},
{
"change_type": "MODIFY",
"old_path": "SConstruct",
"new_path": "SConstruct",
"diff": "@@ -75,6 +75,8 @@ project:\nshared library.\nCommon variables:\n+ oflag Change the compiler optimization level. Default is -O0.\n+\nverbose Print each complete compile/link command.\n0 (off), 1 (on)\n@@ -122,16 +124,18 @@ command_line_options = {\n'armgcc',\n'gcc',\n],\n+ 'logging': [str(l) for l in range(6)],\n'apps': ['c6t', 'cexample', 'cinfo', 'cinfrared', 'cled', 'csensors', 'cstorm', 'cwellknown', 'rrt', 'uecho',\n'uexpiration', 'uexp-monitor', 'uinject', 'userialbridge', 'cjoin', ''],\n'modules': ['coap', 'udp', 'fragmentation', 'icmpv6echo', 'l2-security', ''],\n- 'stackcfg': ['adaptive-msf', 'dagroot', ''],\n+ 'stackcfg': ['adaptive-msf', 'dagroot', 'channel', 'pktqueue', ''],\n'boardopt' : ['hw-crypto', 'printf', 'fastsim', ''],\n'fet_version': ['2', '3'],\n'verbose': ['0', '1'],\n'simhost': ['amd64-linux', 'x86-linux', 'amd64-windows', 'x86-windows'],\n'simhostpy': [''], # No reasonable default\n'atmel_24ghz': ['0', '1'],\n+ 'oflag': ['-O0', '-O1', '-O2', '-O3', '-Os'],\n'revision': ['']\n}\n@@ -143,10 +147,14 @@ def validate_option(key, value, env):\nif key == 'modules' or key == 'apps':\nvalues = value.split(',')\n+ elif key == 'stackcfg':\n+ values = value.split(',')\nelse:\nvalues = [value]\nfor v in values:\n+ if ':' in v:\n+ v = v.split(':')[0]\nif v not in command_line_options[key]:\nprint c.Fore.RED + \"Unknown {0} \\\"{1}\\\". Options are: {2}.\\n\\n\".format(key, v, ', '.join(\ncommand_line_options[key])) + c.Fore.RESET\n@@ -175,6 +183,20 @@ command_line_vars.AddVariables(\nvalidate_option, # validator\nNone, # converter\n),\n+ (\n+ 'logging', # key\n+ '', # help\n+ command_line_options['logging'][5], # default\n+ validate_option, # validator\n+ None, # converter\n+ ),\n+ (\n+ 'oflag', # key\n+ '', # help\n+ command_line_options['oflag'][0], # default\n+ validate_option, # validator\n+ None, # converter\n+ ),\n(\n'jtag', # key\n'', # help\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Enables stackcfg options + logging option + optimization flag option
|
491,587 |
03.09.2020 09:48:07
| -7,200 |
0bb73aa849b3952f4dfee075db3cb2dc595cf608
|
Fix PANID configuration option
|
[
{
"change_type": "MODIFY",
"old_path": "SConscript",
"new_path": "SConscript",
"diff": "@@ -137,6 +137,8 @@ for option in env['stackcfg'].split(','):\nenv.Append(CPPDEFINES='ADAPTIVE_MSF')\nelif name == 'channel':\nenv.Append(CPPDEFINES='IEEE802154E_SINGLE_CHANNEL={}'.format(value))\n+ elif name == 'panid':\n+ env.Append(CPPDEFINES='PANID_DEFINED={}'.format(value))\nelse:\nprint c.Fore.RED + 'Unknown or invalid option for stackcfg: {}'.format(name) + c.Fore.RESET\n"
},
{
"change_type": "MODIFY",
"old_path": "SConstruct",
"new_path": "SConstruct",
"diff": "@@ -128,7 +128,7 @@ command_line_options = {\n'apps': ['c6t', 'cexample', 'cinfo', 'cinfrared', 'cled', 'csensors', 'cstorm', 'cwellknown', 'rrt', 'uecho',\n'uexpiration', 'uexp-monitor', 'uinject', 'userialbridge', 'cjoin', ''],\n'modules': ['coap', 'udp', 'fragmentation', 'icmpv6echo', 'l2-security', ''],\n- 'stackcfg': ['adaptive-msf', 'dagroot', 'channel', 'pktqueue', ''],\n+ 'stackcfg': ['adaptive-msf', 'dagroot', 'channel', 'pktqueue', 'panid', ''],\n'boardopt' : ['hw-crypto', 'printf', 'fastsim', ''],\n'fet_version': ['2', '3'],\n'verbose': ['0', '1'],\n"
},
{
"change_type": "MODIFY",
"old_path": "inc/config.h",
"new_path": "inc/config.h",
"diff": "#define DAGROOT (0)\n#endif\n+/**\n+ * \\def DAGROOT\n+ *\n+ * Set this mote as the DODAG root.\n+ *\n+ */\n+#ifndef PANID_DEFINED\n+#define PANID_DEFINED (0xcafe)\n+#endif\n+\n// ======================== Board configuration ========================\n/**\n"
},
{
"change_type": "MODIFY",
"old_path": "openstack/cross-layers/idmanager.c",
"new_path": "openstack/cross-layers/idmanager.c",
"diff": "@@ -31,13 +31,9 @@ void idmanager_init(void) {\n// myPANID\nidmanager_vars.myPANID.type = ADDR_PANID;\n-#ifdef PANID_DEFINED\nidmanager_vars.myPANID.panid[0] = PANID_DEFINED & 0x00ff;\nidmanager_vars.myPANID.panid[1] =(PANID_DEFINED & 0xff00)>>8;\n-#else\n- idmanager_vars.myPANID.panid[0] = 0xca;\n- idmanager_vars.myPANID.panid[1] = 0xfe;\n-#endif\n+\n// myPrefix\nidmanager_vars.myPrefix.type = ADDR_PREFIX;\n#if DAGROOT\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Fix PANID configuration option
|
491,587 |
16.09.2020 12:34:12
| -7,200 |
5cb896d27b4627883069e00a6e1f2c3c65b0c74e
|
Fix linker issue IoT-Lab_M3 and IoT-Lab-A8_M3
|
[
{
"change_type": "MODIFY",
"old_path": "SConscript",
"new_path": "SConscript",
"diff": "@@ -455,6 +455,8 @@ elif env['toolchain'] == 'armgcc':\nenv.Append(LINKFLAGS='-mthumb')\nenv.Append(LINKFLAGS='-mthumb-interwork')\nenv.Append(LINKFLAGS='-nostartfiles')\n+ env.Append(LINKFLAGS='-specs=nosys.specs')\n+ env.Append(LINKFLAGS='-specs=nano.specs')\nenv.Append(LINKFLAGS='-Tbsp/boards/' + env['board'] + '/stm32_flash.ld')\nenv.Append(\nLINKFLAGS=os.path.join('build', env['board'] + '_armgcc', 'bsp', 'boards', env['board'], 'startup.o'))\n"
},
{
"change_type": "MODIFY",
"old_path": "bsp/boards/iot-lab_A8-M3/stm32_flash.ld",
"new_path": "bsp/boards/iot-lab_A8-M3/stm32_flash.ld",
"diff": "**\n** Environment : Atollic TrueSTUDIO(R)\n**\n-** Distribution: The file is distributed as is, without any warranty\n+** Distribution: The file is distributed as is, without any warranty\n** of any kind.\n**\n** (c)Copyright Atollic AB.\n@@ -88,12 +88,14 @@ SECTIONS\n.preinit_array :\n{\n+ . = ALIGN(4);\nPROVIDE_HIDDEN (__preinit_array_start = .);\nKEEP (*(.preinit_array*))\nPROVIDE_HIDDEN (__preinit_array_end = .);\n} >FLASH\n.init_array :\n{\n+ . = ALIGN(4);\nPROVIDE_HIDDEN (__init_array_start = .);\nKEEP (*(SORT(.init_array.*)))\nKEEP (*(.init_array*))\n@@ -101,6 +103,7 @@ SECTIONS\n} >FLASH\n.fini_array :\n{\n+ . = ALIGN(4);\nPROVIDE_HIDDEN (__fini_array_start = .);\nKEEP (*(.fini_array*))\nKEEP (*(SORT(.fini_array.*)))\n@@ -148,10 +151,9 @@ SECTIONS\nPROVIDE(__heap1_max = .);\n} > RAM\n- /*\nPROVIDE ( end = _ebss );\nPROVIDE ( _end = _ebss );\n- */\n+\n/* User_heap_stack section, used to check that there is enough RAM left */\n/*\n._user_heap_stack :\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Fix linker issue IoT-Lab_M3 and IoT-Lab-A8_M3
|
491,587 |
19.08.2020 10:20:31
| -7,200 |
c06d4219aa9bcdbd5e71df6e89b1bcaa76230106
|
Update openapps/uinject to new socket API
|
[
{
"change_type": "MODIFY",
"old_path": "openapps/uinject/uinject.c",
"new_path": "openapps/uinject/uinject.c",
"diff": "#include \"opendefs.h\"\n#include \"uinject.h\"\n-#include \"openqueue.h\"\n+#include \"sock.h\"\n+#include \"async.h\"\n#include \"openserial.h\"\n#include \"packetfunctions.h\"\n#include \"scheduler.h\"\n//=========================== variables =======================================\n-uinject_vars_t uinject_vars;\n+static sock_udp_t _sock;\n+static uinject_vars_t uinject_vars;\nstatic const uint8_t uinject_payload[] = \"uinject\";\nstatic const uint8_t uinject_dst_addr[] = {\n@@ -31,75 +33,96 @@ static const uint8_t uinject_dst_addr[] = {\n//=========================== prototypes ======================================\n-void uinject_timer_cb(opentimers_id_t id);\n+void _sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg);\n-void uinject_task_cb(void);\n+void _uinject_timer_cb(opentimers_id_t id);\n+\n+void _uinject_task_cb(void);\n//=========================== public ==========================================\nvoid uinject_init(void) {\n// clear local variables\n+ memset(&_sock, 0, sizeof(sock_udp_t));\nmemset(&uinject_vars, 0, sizeof(uinject_vars_t));\n- // register at UDP stack\n- uinject_vars.desc.port = WKP_UDP_INJECT;\n- uinject_vars.desc.callbackReceive = &uinject_receive;\n- uinject_vars.desc.callbackSendDone = &uinject_sendDone;\n+ sock_udp_ep_t local;\n+ local.family = AF_INET6;\n+ local.port = WKP_UDP_INJECT;\n+\n+ if (sock_udp_create(&_sock, &local, NULL, 0) < 0) {\n+ openserial_printf(\"Could not create socket\\n\");\n+ return;\n+ }\n+\n+ openserial_printf(\"Created a UDP socket\\n\");\n+\n+ sock_udp_set_cb(&_sock, _sock_handler, NULL);\n- uinject_vars.period = UINJECT_PERIOD_MS;\n// start periodic timer\n+ uinject_vars.period = UINJECT_PERIOD_MS;\nuinject_vars.timerId = opentimers_create(TIMER_GENERAL_PURPOSE, TASKPRIO_UDP);\nopentimers_scheduleIn(\nuinject_vars.timerId,\nUINJECT_PERIOD_MS,\nTIME_MS,\nTIMER_PERIODIC,\n- uinject_timer_cb\n+ _uinject_timer_cb\n);\n}\n-void uinject_sendDone(OpenQueueEntry_t *msg, owerror_t error) {\n+//=========================== private =========================================\n+\n+\n+\n+void _sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg) {\n+ (void) arg;\n+ char buf[50];\n+\n+ if (type & SOCK_ASYNC_MSG_RECV) {\n+ sock_udp_ep_t remote;\n+ int16_t res;\n+\n+ if ((res = sock_udp_recv(sock, buf, sizeof(buf), 0, &remote)) >= 0) {\n+ openserial_printf(\"Received %d bytes from remote endpoint:\\n\", res);\n+ openserial_printf(\" - port: %d\", remote.port);\n+ openserial_printf(\" - addr: \", remote.port);\n+ for(int i=0; i < 16; i ++)\n+ openserial_printf(\"%x \", remote.addr.ipv6[i]);\n+\n+ openserial_printf(\"\\n\\n\");\n+ openserial_printf(\"Msg received: %s\\n\\n\", buf);\n+ }\n+ }\n+\n+ if (type & SOCK_ASYNC_MSG_SENT) {\n+ owerror_t error = *(uint8_t*)arg;\nif (error == E_FAIL) {\nLOG_ERROR(COMPONENT_UINJECT, ERR_MAXRETRIES_REACHED,\n(errorparameter_t) uinject_vars.counter,\n- (errorparameter_t) 0\n- );\n+ (errorparameter_t) 0);\n}\n-\n- // free the packet buffer entry\n- openqueue_freePacketBuffer(msg);\n-\n// allow send next uinject packet\nuinject_vars.busySendingUinject = FALSE;\n}\n-\n-void uinject_receive(OpenQueueEntry_t *pkt) {\n-\n- openqueue_freePacketBuffer(pkt);\n}\n-//=========================== private =========================================\n-void uinject_timer_cb(opentimers_id_t id) {\n+void _uinject_timer_cb(opentimers_id_t id) {\n// calling the task directly as the timer_cb function is executed in\n// task mode by opentimer already\nif (openrandom_get16b() < (0xffff / UINJECT_TRAFFIC_RATE)) {\n- uinject_task_cb();\n+ _uinject_task_cb();\n}\n}\n-void uinject_task_cb(void) {\n- OpenQueueEntry_t *pkt;\n+void _uinject_task_cb(void) {\nuint8_t asnArray[5];\n- uint8_t numCellsUsed;\nopen_addr_t parentNeighbor;\nbool foundNeighbor;\n- uint32_t ticksOn;\n- uint32_t ticksInTotal;\n-\n// don't run if not synch\nif (ieee154e_isSynch() == FALSE) {\nreturn;\n@@ -126,95 +149,44 @@ void uinject_task_cb(void) {\n}\n// if you get here, send a packet\n-\n- // get a free packet buffer\n- pkt = openqueue_getFreePacketBuffer(COMPONENT_UINJECT);\n- if (pkt == NULL) {\n- LOG_ERROR(COMPONENT_UINJECT, ERR_NO_FREE_PACKET_BUFFER, (errorparameter_t) 0, (errorparameter_t) 0);\n- return;\n- }\n-\n- pkt->owner = COMPONENT_UINJECT;\n- pkt->creator = COMPONENT_UINJECT;\n- pkt->l4_protocol = IANA_UDP;\n- pkt->l4_destination_port = WKP_UDP_INJECT;\n- pkt->l4_sourcePortORicmpv6Type = WKP_UDP_INJECT;\n- pkt->l3_destinationAdd.type = ADDR_128B;\n- memcpy(&pkt->l3_destinationAdd.addr_128b[0], uinject_dst_addr, 16);\n-\n- // add payload\n- if (packetfunctions_reserveHeader(&pkt, sizeof(uinject_payload) - 1) == E_FAIL) {\n- openqueue_freePacketBuffer(pkt);\n- return;\n- }\n- memcpy(&pkt->payload[0], uinject_payload, sizeof(uinject_payload) - 1);\n-\n- if (packetfunctions_reserveHeader(&pkt, sizeof(uint16_t)) == E_FAIL) {\n- openqueue_freePacketBuffer(pkt);\n- return;\n- }\n-\n- pkt->payload[1] = (uint8_t)((uinject_vars.counter & 0xff00) >> 8);\n- pkt->payload[0] = (uint8_t)(uinject_vars.counter & 0x00ff);\n+ sock_udp_ep_t remote;\n+ remote.port = WKP_UDP_INJECT;\n+ remote.family = AF_INET6;\n+ memcpy(remote.addr.ipv6, uinject_dst_addr, sizeof(uinject_dst_addr));\n+\n+ uint8_t payload[50];\n+ uint8_t len = 0;\n+ // add 'uinject' string\n+ memcpy(&payload[len], uinject_payload, sizeof(uinject_payload) - 1);\n+ len += sizeof(uinject_payload) - 1;\n+ // add counter\n+ payload[len++] = (uint8_t)(uinject_vars.counter & 0x00ff);\n+ payload[len++] = (uint8_t)((uinject_vars.counter & 0xff00) >> 8);\nuinject_vars.counter++;\n-\n- if (packetfunctions_reserveHeader(&pkt, sizeof(asn_t)) == E_FAIL) {\n- openqueue_freePacketBuffer(pkt);\n- return;\n- }\n-\n-\n+ // add asn\nieee154e_getAsn(asnArray);\n- pkt->payload[0] = asnArray[0];\n- pkt->payload[1] = asnArray[1];\n- pkt->payload[2] = asnArray[2];\n- pkt->payload[3] = asnArray[3];\n- pkt->payload[4] = asnArray[4];\n-\n- if (packetfunctions_reserveHeader(&pkt, sizeof(uint8_t)) == E_FAIL) {\n- openqueue_freePacketBuffer(pkt);\n- return;\n- }\n- numCellsUsed = msf_getPreviousNumCellsUsed(CELLTYPE_TX);\n- pkt->payload[0] = numCellsUsed;\n-\n- if (packetfunctions_reserveHeader(&pkt, sizeof(uint8_t)) == E_FAIL) {\n- openqueue_freePacketBuffer(pkt);\n- return;\n- }\n-\n- numCellsUsed = msf_getPreviousNumCellsUsed(CELLTYPE_RX);\n- pkt->payload[0] = numCellsUsed;\n-\n- if (packetfunctions_reserveHeader(&pkt, sizeof(uint16_t)) == E_FAIL) {\n- openqueue_freePacketBuffer(pkt);\n- return;\n- }\n-\n- pkt->payload[1] = (uint8_t)(idmanager_getMyID(ADDR_16B)->addr_16b[0]);\n- pkt->payload[0] = (uint8_t)(idmanager_getMyID(ADDR_16B)->addr_16b[1]);\n-\n+ memcpy(&payload[len], asnArray, sizeof(asnArray));\n+ len += sizeof(asnArray);\n+ // add tx cells used\n+ payload[len++] = msf_getPreviousNumCellsUsed(CELLTYPE_TX);\n+ // add rx cells used\n+ payload[len++] = msf_getPreviousNumCellsUsed(CELLTYPE_RX);\n+ // add 16b addr\n+ payload[len++] = (uint8_t)(idmanager_getMyID(ADDR_16B)->addr_16b[1]);\n+ payload[len++] = (uint8_t)(idmanager_getMyID(ADDR_16B)->addr_16b[0]);\n+ // add ticks info\n+ uint32_t ticksOn;\n+ uint32_t ticksInTotal;\nieee154e_getTicsInfo(&ticksOn, &ticksInTotal);\n+ memcpy(&payload[len], (uint8_t*) ticksOn, sizeof(ticksOn));\n+ len += sizeof(ticksOn);\n+ memcpy(&payload[len], (uint8_t*) ticksInTotal, sizeof(ticksInTotal));\n+ len += sizeof(ticksInTotal);\n- if (packetfunctions_reserveHeader(&pkt, sizeof(uint32_t)) == E_FAIL) {\n- openqueue_freePacketBuffer(pkt);\n- return;\n+ if (sock_udp_send(&_sock, payload, len, &remote) > 0) {\n+ // set busySending to TRUE\n+ uinject_vars.busySendingUinject = TRUE;\n}\n-\n- pkt->payload[3] = (uint8_t)((ticksOn & 0xff000000) >> 24);\n- pkt->payload[2] = (uint8_t)((ticksOn & 0x00ff0000) >> 16);\n- pkt->payload[1] = (uint8_t)((ticksOn & 0x0000ff00) >> 8);\n- pkt->payload[0] = (uint8_t)(ticksOn & 0x000000ff);\n-\n- if (packetfunctions_reserveHeader(&pkt, sizeof(uint32_t)) == E_FAIL) {\n- openqueue_freePacketBuffer(pkt);\n- return;\n- }\n- pkt->payload[3] = (uint8_t)((ticksInTotal & 0xff000000) >> 24);\n- pkt->payload[2] = (uint8_t)((ticksInTotal & 0x00ff0000) >> 16);\n- pkt->payload[1] = (uint8_t)((ticksInTotal & 0x0000ff00) >> 8);\n- pkt->payload[0] = (uint8_t)(ticksInTotal & 0x000000ff);\n-\n}\n#endif /* OPENWSN_UINJECT_C */\n"
},
{
"change_type": "MODIFY",
"old_path": "openapps/uinject/uinject.h",
"new_path": "openapps/uinject/uinject.h",
"diff": "@@ -31,9 +31,6 @@ typedef struct {\nvoid uinject_init(void);\n-void uinject_sendDone(OpenQueueEntry_t *msg, owerror_t error);\n-\n-void uinject_receive(OpenQueueEntry_t *msg);\n/**\n\\}\n\\}\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-878. Update openapps/uinject to new socket API
|
491,587 |
19.08.2020 10:21:30
| -7,200 |
5073643d6c686964caae3c02bcfa43ec05718396
|
Update openapps/uexpiration_monitor to use new socket API
|
[
{
"change_type": "MODIFY",
"old_path": "openapps/uexpiration_monitor/uexpiration_monitor.c",
"new_path": "openapps/uexpiration_monitor/uexpiration_monitor.c",
"diff": "#include \"opendefs.h\"\n#include \"uexpiration_monitor.h\"\n-#include \"openqueue.h\"\n+#include \"sock.h\"\n+#include \"async.h\"\n#include \"openserial.h\"\n#include \"packetfunctions.h\"\n//=========================== variables =======================================\n+static sock_udp_t _sock;\n+\n//=========================== prototypes ======================================\n-//=========================== public ==========================================\n+//=========================== private =========================================\n-void umonitor_init(void) {\n-}\n+void _sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg) {\n+ (void) arg;\n-void umonitor_receive(OpenQueueEntry_t *request) {\n- uint16_t temp_l4_destination_port;\n- OpenQueueEntry_t *reply;\n+ uint8_t buf[50];\n+ if (type & SOCK_ASYNC_MSG_RECV) {\n+ sock_udp_ep_t remote;\n+ size_t len = 0;\n+ if (sock_udp_recv(sock, buf, sizeof(buf), 0, &remote) >= 0) {\n#ifdef DEADLINE_OPTION\n+ monitor_expiration_vars_t deadline = { 0 };\n+ iphc_getDeadlineInfo(&deadline);\n+ memcpy(&buf[0], &deadline.time_elapsed, sizeof(uint16_t));\n+ memcpy(&buf[2], &deadline.time_left, sizeof(int16_t));\n+ len += sizeof(uint16_t);\n+ len += sizeof(int16_t);\n#endif\n-\n- reply = openqueue_getFreePacketBuffer(COMPONENT_UMONITOR);\n- if (reply == NULL) {\n- LOG_ERROR(COMPONENT_UMONITOR, ERR_NO_FREE_PACKET_BUFFER, (errorparameter_t) 0, (errorparameter_t) 0);\n- openqueue_freePacketBuffer(request); //clear the request packet as well\n- return;\n+ if (sock_udp_send(sock, (char*) buf, len, &remote) < 0) {\n+ LOG_ERROR(COMPONENT_UMONITOR, ERR_PUSH_LOWER_LAYER,\n+ (errorparameter_t) 0,\n+ (errorparameter_t) 0);\n+ }\n+ }\n+ }\n}\n- reply->owner = COMPONENT_UMONITOR;\n- reply->creator = COMPONENT_UMONITOR;\n- reply->l4_protocol = IANA_UDP;\n- temp_l4_destination_port = request->l4_destination_port;\n- reply->l4_destination_port = request->l4_sourcePortORicmpv6Type;\n- reply->l4_sourcePortORicmpv6Type = temp_l4_destination_port;\n- reply->l3_destinationAdd.type = ADDR_128B;\n- memcpy(&reply->l3_destinationAdd.addr_128b[0], &request->l3_sourceAdd.addr_128b[0], 16);\n+//=========================== public ==========================================\n- /*************** Packet Payload ********************/\n- // [Expiration time, Delay]\n- packetfunctions_reserveHeaderSize(reply, (2 * sizeof(uint16_t)));\n-#ifdef DEADLINE_OPTION\n- iphc_getDeadlineInfo(&deadline);\n- memcpy(&reply->payload[0],&deadline.time_elapsed,sizeof(uint16_t));\n- memcpy(&reply->payload[2],&deadline.time_left,sizeof(uint16_t));\n-#endif\n- openqueue_freePacketBuffer(request);\n+void umonitor_init(void)\n+{\n+ // clear local variables\n+ memset(&_sock, 0, sizeof(sock_udp_t));\n-}\n+ sock_udp_ep_t local;\n+ local.family = AF_INET6;\n+ local.port = WKP_UDP_MONITOR;\n-void umonitor_sendDone(OpenQueueEntry_t *msg, owerror_t error) {\n- openqueue_freePacketBuffer(msg);\n+ if (sock_udp_create(&_sock, &local, NULL, 0) < 0) {\n+ LOG_ERROR(COMPONENT_UMONITOR, ERR_INVALID_PARAM,\n+ (errorparameter_t) 0,\n+ (errorparameter_t) 0);\n+ return;\n}\n-bool umonitor_debugPrint(void) {\n- return FALSE;\n+ sock_udp_set_cb(&_sock, _sock_handler, NULL);\n}\n-//=========================== private =========================================\n-\n#endif /* OPEWSN_UEXP_MONITOR_C */\n"
},
{
"change_type": "MODIFY",
"old_path": "openapps/uexpiration_monitor/uexpiration_monitor.h",
"new_path": "openapps/uexpiration_monitor/uexpiration_monitor.h",
"diff": "void umonitor_init(void);\n-void umonitor_receive(OpenQueueEntry_t *msg);\n-\n-void umonitor_sendDone(OpenQueueEntry_t *msg, owerror_t error);\n-\n-bool umonitor_debugPrint(void);\n-\n/**\n\\}\n\\}\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
FW-878. Update openapps/uexpiration_monitor to use new socket API
|
491,609 |
29.09.2020 19:26:37
| -7,200 |
1045000d087c150c90da6aec9f498779018fc086
|
coap: Implement the handler of socket receive.
|
[
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/coap.c",
"new_path": "openweb/opencoap/coap.c",
"diff": "@@ -51,6 +51,8 @@ void coap_forward_message(OpenQueueEntry_t *msg,\nopen_addr_t *destIP,\nuint16_t destPortNumber);\n+void coap_sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg);\n+\n//=========================== public ==========================================\n//===== from stack\n@@ -61,6 +63,7 @@ void coap_forward_message(OpenQueueEntry_t *msg,\nvoid coap_init(void) {\nuint16_t rand;\nuint8_t pos;\n+ sock_udp_ep_t local;\npos = 0;\n@@ -82,9 +85,17 @@ void coap_init(void) {\ncoap_vars.statelessProxy.sequenceNumber = 0;\n// register at UDP stack\n- coap_vars.desc.port = WKP_UDP_COAP;\n- coap_vars.desc.callbackReceive = coap_receive;\n- coap_vars.desc.callbackSendDone = coap_sendDone;\n+ memset(&coap_vars.sock, 0, sizeof(sock_udp_t));\n+ local.port = WKP_UDP_COAP;\n+\n+ if (sock_udp_create(&coap_vars.sock, &local, NULL, 0) < 0) {\n+ openserial_printf(\"Could not create socket\\n\");\n+ return;\n+ }\n+\n+ openserial_printf(\"Created a UDP socket\\n\");\n+\n+ sock_udp_set_cb(&coap_vars.sock, coap_sock_handler, NULL);\n}\n/**\n@@ -502,13 +513,21 @@ void coap_receive(OpenQueueEntry_t *msg) {\nmemcpy(&msg->l3_destinationAdd.addr_128b[0], &msg->l3_sourceAdd.addr_128b[0], LENGTH_ADDR128b);\n// fill in CoAP header\n- coap_header_encode(msg,\n+ if (coap_header_encode(msg,\nCOAP_VERSION,\nresponse_type,\ncoap_header.TKL,\ncoap_header.Code,\ncoap_header.messageID,\n+ &coap_header.token[0]) == E_FAIL) {\n+ openqueue_freePacketBuffer(msg);\n+ return;\n+ }\n+/* if ((openudp_send(msg)) == E_FAIL) {\n+ openqueue_freePacketBuffer(msg);\n+ }\n+*/\n}\n/**\n@@ -930,6 +949,59 @@ uint8_t coap_find_option(coap_option_iht *array, uint8_t arrayLen, coap_option_t\n//=========================== private =========================================\n+void coap_sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg) {\n+ (void) arg;\n+ sock_udp_ep_t remote;\n+ sock_udp_ep_t local;\n+ int16_t res;\n+ uint16_t footer_length;\n+ OpenQueueEntry_t *msg;\n+\n+ if (type & SOCK_ASYNC_MSG_RECV) {\n+\n+ msg = openqueue_getFreePacketBuffer(COMPONENT_OPENCOAP);\n+\n+ if (msg == NULL) {\n+ LOG_ERROR(COMPONENT_OPENCOAP, ERR_NO_FREE_PACKET_BUFFER, (errorparameter_t) 0, (errorparameter_t) 0);\n+ return;\n+ }\n+\n+ if (packetfunctions_reserveHeader(&msg, IPV6_PACKET_SIZE) == E_FAIL) {\n+ openserial_printf(\"Could not reserve header\\n\");\n+ return;\n+ }\n+\n+ if ((res = sock_udp_recv(sock, msg->payload, IPV6_PACKET_SIZE, 0, &remote)) >= 0) {\n+\n+ openserial_printf(\"Received %d bytes from remote endpoint:\\n\", res);\n+ openserial_printf(\" - port: %d\", remote.port);\n+ openserial_printf(\" - addr: \", remote.port);\n+ for(int i=0; i < 16; i ++) {\n+ openserial_printf(\"%x \", remote.addr.ipv6[i]);\n+ }\n+\n+ openserial_printf(\"\\n\\n\");\n+\n+ // set the length to the actual received bytes\n+ footer_length = msg->length - res;\n+ packetfunctions_tossFooter(&msg, footer_length);\n+\n+ // fill the metadata\n+ msg->l4_protocol_compressed = FALSE;\n+ msg->l4_protocol = IANA_UDP;\n+ msg->l4_sourcePortORicmpv6Type = remote.port;\n+ sock_udp_get_local(sock, &local);\n+ msg->l4_destination_port = local.port;\n+ msg->l4_payload = msg->payload;\n+ msg->l4_length = res;\n+ memcpy(&msg->l3_destinationAdd.addr_128b, &local.addr, LENGTH_ADDR128b);\n+ memcpy(&msg->l3_sourceAdd.addr_128b, &remote.addr, LENGTH_ADDR128b);\n+\n+ coap_receive(msg);\n+ }\n+ }\n+}\n+\nuint8_t coap_options_parse(\nuint8_t *buffer,\nuint8_t bufferLen,\n"
},
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/coap.h",
"new_path": "openweb/opencoap/coap.h",
"diff": "#include \"config.h\"\n#include \"opentimers.h\"\n#include \"udp.h\"\n+#include \"sock.h\"\n+#include \"async.h\"\n//=========================== define ==========================================\n@@ -215,6 +217,7 @@ typedef struct {\nuint8_t delayCounter;\nuint16_t messageID;\ncoap_statelessproxy_vars_t statelessProxy;\n+ sock_udp_t sock;\n} coap_vars_t;\n//=========================== prototypes ======================================\n"
},
{
"change_type": "MODIFY",
"old_path": "projects/python/SConscript.env",
"new_path": "projects/python/SConscript.env",
"diff": "@@ -844,6 +844,7 @@ functions_to_change = [\n'coap_handle_stateless_proxy',\n'coap_add_stateless_proxy_option',\n'coap_forward_message',\n+ 'coap_sock_handler',\n'icmpv6coap_timer_cb',\n# oscore\n'oscore_init_security_context',\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
coap: Implement the handler of socket receive.
|
491,609 |
30.09.2020 16:10:27
| -7,200 |
a14c3591b07f9f5ba52d6dc7c6bc42468e740171
|
coap: Implement internal wrapper over the sock send.
|
[
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/coap.c",
"new_path": "openweb/opencoap/coap.c",
"diff": "@@ -53,6 +53,8 @@ void coap_forward_message(OpenQueueEntry_t *msg,\nvoid coap_sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg);\n+owerror_t coap_sock_send_internal(OpenQueueEntry_t *msg);\n+\n//=========================== public ==========================================\n//===== from stack\n@@ -453,7 +455,7 @@ void coap_receive(OpenQueueEntry_t *msg) {\n} else {\n// reset packet payload (DO NOT DELETE, we will reuse same buffer for response)\n- msg->payload = &(msg->packet[127]);\n+ msg->payload = &(msg->packet[127]); // FIXME use packetfunctions to reset\nmsg->length = 0;\n// set the CoAP header\ncoap_header.TKL = 0;\n@@ -466,7 +468,7 @@ void coap_receive(OpenQueueEntry_t *msg) {\nif (outcome == E_FAIL) {\n// reset packet payload (DO NOT DELETE, we will reuse same buffer for response)\n- msg->payload = &(msg->packet[127]);\n+ msg->payload = &(msg->packet[127]); // FIXME use packetfunctions to reset\nmsg->length = 0;\n// set the CoAP header\ncoap_header.TKL = 0;\n@@ -524,10 +526,10 @@ void coap_receive(OpenQueueEntry_t *msg) {\nreturn;\n}\n-/* if ((openudp_send(msg)) == E_FAIL) {\n+ if ((coap_sock_send_internal(msg)) == E_FAIL) {\nopenqueue_freePacketBuffer(msg);\n}\n-*/\n+\n}\n/**\n@@ -777,6 +779,7 @@ owerror_t coap_send(\nreturn E_FAIL;\n}\n+ return coap_sock_send_internal(msg);\n}\n/**\n@@ -950,7 +953,6 @@ uint8_t coap_find_option(coap_option_iht *array, uint8_t arrayLen, coap_option_t\n//=========================== private =========================================\nvoid coap_sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg) {\n- (void) arg;\nsock_udp_ep_t remote;\nsock_udp_ep_t local;\nint16_t res;\n@@ -966,12 +968,12 @@ void coap_sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg) {\nreturn;\n}\n- if (packetfunctions_reserveHeader(&msg, IPV6_PACKET_SIZE) == E_FAIL) {\n+ if (packetfunctions_reserveHeader(&msg, COAP_MAX_MSG_LEN) == E_FAIL) {\nopenserial_printf(\"Could not reserve header\\n\");\nreturn;\n}\n- if ((res = sock_udp_recv(sock, msg->payload, IPV6_PACKET_SIZE, 0, &remote)) >= 0) {\n+ if ((res = sock_udp_recv(sock, msg->payload, COAP_MAX_MSG_LEN, 0, &remote)) >= 0) {\nopenserial_printf(\"Received %d bytes from remote endpoint:\\n\", res);\nopenserial_printf(\" - port: %d\", remote.port);\n@@ -987,6 +989,7 @@ void coap_sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg) {\npacketfunctions_tossFooter(&msg, footer_length);\n// fill the metadata\n+ msg->owner = COMPONENT_OPENCOAP;\nmsg->l4_protocol_compressed = FALSE;\nmsg->l4_protocol = IANA_UDP;\nmsg->l4_sourcePortORicmpv6Type = remote.port;\n@@ -999,7 +1002,27 @@ void coap_sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg) {\ncoap_receive(msg);\n}\n+ } else if (type & SOCK_ASYNC_MSG_SENT) {\n+ msg = openqueue_getPacketByComponent(COMPONENT_OPENCOAP);\n+ coap_sendDone(msg, *(owerror_t *)arg);\n+ }\n}\n+\n+owerror_t coap_sock_send_internal(OpenQueueEntry_t *msg) {\n+ sock_udp_ep_t remote;\n+ int16_t res;\n+\n+ // init remote endpoint\n+ remote.family = AF_INET6;\n+ memcpy(&remote.addr, &msg->l3_destinationAdd.addr_128b, LENGTH_ADDR128b);\n+ remote.netif = 0;\n+ remote.port = msg->l4_destination_port;\n+\n+ if ((res = sock_udp_send(&coap_vars.sock, msg->payload, msg->length, &remote)) >= 0) {\n+ return E_SUCCESS;\n+ }\n+\n+ return E_FAIL;\n}\nuint8_t coap_options_parse(\n@@ -1296,24 +1319,41 @@ void coap_forward_message(OpenQueueEntry_t *msg,\n// fill payload\nif (msg->length) {\n- packetfunctions_reserveHeader(&outgoingPacket, msg->length);\n+ if (packetfunctions_reserveHeader(&outgoingPacket, msg->length) == E_FAIL) {\n+ goto fail;\n+ }\nmemcpy(outgoingPacket->payload, msg->payload, msg->length);\n- packetfunctions_reserveHeader(&outgoingPacket, 1);\n+ if (packetfunctions_reserveHeader(&outgoingPacket, 1) == E_FAIL) {\n+ goto fail;\n+ }\noutgoingPacket->payload[0] = COAP_PAYLOAD_MARKER;\n}\n// encode options\n- coap_options_encode(outgoingPacket, outgoingOptions, outgoingOptionsLen, COAP_OPTION_CLASS_ALL);\n+ if (coap_options_encode(outgoingPacket, outgoingOptions, outgoingOptionsLen, COAP_OPTION_CLASS_ALL) == E_FAIL) {\n+ goto fail;\n+ }\n// encode CoAP header\n- coap_header_encode(outgoingPacket,\n+ if (coap_header_encode(outgoingPacket,\nheader->Ver,\nheader->T,\nheader->TKL,\nheader->Code,\nheader->messageID,\n- header->token);\n+ header->token) == E_FAIL) {\n+ goto fail;\n+ }\n+ if ((coap_sock_send_internal(outgoingPacket)) == E_FAIL) {\n+ goto fail;\n+ }\n+\n+ return;\n+\n+ fail:\n+ openqueue_freePacketBuffer(outgoingPacket);\n+ return;\n}\n#endif /* OPENWSN_COAP_C */\n"
},
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/coap.h",
"new_path": "openweb/opencoap/coap.h",
"diff": "#include \"config.h\"\n#include \"opentimers.h\"\n-#include \"udp.h\"\n#include \"sock.h\"\n#include \"async.h\"\n@@ -37,6 +36,8 @@ static const uint8_t ipAddr_ringmaster[] = {0xbb, 0xbb, 0x00, 0x00, 0x00, 0x00,\n// This value may be reduced as a memory optimization, but would invalidate spec compliance\n#define COAP_MAX_TKL 8\n+#define COAP_MAX_MSG_LEN IPV6_PACKET_SIZE - 20\n+\n#define COAP_PAYLOAD_MARKER 0xFF\n#define COAP_VERSION 1\n"
},
{
"change_type": "MODIFY",
"old_path": "projects/python/SConscript.env",
"new_path": "projects/python/SConscript.env",
"diff": "@@ -845,6 +845,7 @@ functions_to_change = [\n'coap_add_stateless_proxy_option',\n'coap_forward_message',\n'coap_sock_handler',\n+ 'coap_sock_send_internal',\n'icmpv6coap_timer_cb',\n# oscore\n'oscore_init_security_context',\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
coap: Implement internal wrapper over the sock send.
|
491,609 |
30.09.2020 16:11:05
| -7,200 |
8dd409e4878ba372e6e5c8093778e07e7ae72233
|
forwarding: Remove assumption on cjoin metadata.
|
[
{
"change_type": "MODIFY",
"old_path": "openstack/03b-IPv6/forwarding.c",
"new_path": "openstack/03b-IPv6/forwarding.c",
"diff": "@@ -463,7 +463,7 @@ owerror_t forwarding_send_internal_RoutingTable(\nopen_addr_t temp_prefix64btoWrite;\n// retrieve the next hop from the routing table\n- if (msg->is_cjoin_response || msg->creator == COMPONENT_CJOIN) {\n+ if (packetfunctions_isLinkLocal(&msg->l3_destinationAdd)) {\nif (neighbors_isStableNeighbor(&(msg->l3_destinationAdd)) || msg->is_cjoin_response) {\n// IP destination is 1-hop neighbor, send directly\npacketfunctions_ip128bToMac64b(&(msg->l3_destinationAdd), &temp_prefix64btoWrite,\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
forwarding: Remove assumption on cjoin metadata.
|
491,609 |
02.10.2020 15:51:55
| -7,200 |
5ce8b0037332a4c46ffaa5cbfb516405bbf29503
|
coap: Take ownership over the packet before calling reserveHeader.
|
[
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/coap.c",
"new_path": "openweb/opencoap/coap.c",
"diff": "@@ -968,6 +968,9 @@ void coap_sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg) {\nreturn;\n}\n+ // take ownership over the packet\n+ msg->owner = COMPONENT_OPENCOAP;\n+\nif (packetfunctions_reserveHeader(&msg, COAP_MAX_MSG_LEN) == E_FAIL) {\nopenserial_printf(\"Could not reserve header\\n\");\nreturn;\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
coap: Take ownership over the packet before calling reserveHeader.
|
491,609 |
02.10.2020 17:31:48
| -7,200 |
36ce4b969239579d9d8af74e9ccadb983c3ffdf0
|
coap: Fix the warning of uninitialized var outcome.
|
[
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/coap.c",
"new_path": "openweb/opencoap/coap.c",
"diff": "@@ -454,6 +454,8 @@ void coap_receive(OpenQueueEntry_t *msg) {\n}\n} else {\n+ // resource not found but success in creating the response\n+ outcome = E_SUCCESS;\n// reset packet payload (DO NOT DELETE, we will reuse same buffer for response)\nmsg->payload = &(msg->packet[127]); // FIXME use packetfunctions to reset\nmsg->length = 0;\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
coap: Fix the warning of uninitialized var outcome.
|
491,609 |
05.10.2020 17:06:49
| -7,200 |
77d64f9f283c499d2414749dc784820c4c70c3e8
|
coap: Make coap_receive coap_sendDone private.
|
[
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/coap.c",
"new_path": "openweb/opencoap/coap.c",
"diff": "coap_vars_t coap_vars;\n//=========================== prototype =======================================\n+\n+void coap_receive(OpenQueueEntry_t *msg);\n+\n+void coap_sendDone(OpenQueueEntry_t *msg, owerror_t error);\n+\nowerror_t coap_header_encode(OpenQueueEntry_t *msg,\nuint8_t version,\ncoap_type_t type,\n"
},
{
"change_type": "MODIFY",
"old_path": "openweb/opencoap/coap.h",
"new_path": "openweb/opencoap/coap.h",
"diff": "@@ -226,10 +226,6 @@ typedef struct {\n// from stack\nvoid coap_init(void);\n-void coap_receive(OpenQueueEntry_t *msg);\n-\n-void coap_sendDone(OpenQueueEntry_t *msg, owerror_t error);\n-\n// from CoAP resources\nvoid coap_writeLinks(OpenQueueEntry_t *msg, uint8_t componentID);\n@@ -245,7 +241,7 @@ owerror_t coap_send(\ncoap_resource_desc_t *descSender\n);\n-// option handling\n+// option handling for OSCORE\ncoap_option_class_t coap_get_option_class(coap_option_t type);\nuint8_t coap_options_encode(OpenQueueEntry_t *msg,\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
coap: Make coap_receive coap_sendDone private.
|
491,609 |
04.02.2021 12:29:02
| -3,600 |
c1da91459d9d2c7547e4a74e3855f2a9be2677b0
|
Hot fix: Remove var declaration within for loop.
|
[
{
"change_type": "MODIFY",
"old_path": "openstack/04-TRAN/sock.c",
"new_path": "openstack/04-TRAN/sock.c",
"diff": "@@ -330,11 +330,12 @@ static void _sock_get_local_addr(open_addr_t* local) {\nstatic bool _sock_valid_addr(sock_udp_ep_t* ep) {\nuint8_t zero_count;\nconst uint8_t* p;\n+ uint8_t i;\np = (uint8_t* )&ep->addr;\nzero_count = 0;\n- for (uint8_t i = 0; i < sizeof(ep->addr); i++) {\n+ for (i = 0; i < sizeof(ep->addr); i++) {\nif (p [i] == 0) {\nzero_count++;\n}\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Hot fix: Remove var declaration within for loop.
|
491,587 |
09.02.2021 16:28:45
| -3,600 |
a45a5d8161cd8df93b6aa0659917fabdd1fa5b71
|
Set up Windows workflow
|
[
{
"change_type": "RENAME",
"old_path": ".github/workflows/main.yml",
"new_path": ".github/workflows/linux.yml",
"diff": ""
},
{
"change_type": "ADD",
"old_path": null,
"new_path": ".github/workflows/windows.yml",
"diff": "+# This is a basic workflow to help you get started with Actions\n+\n+name: SCons build Windows\n+\n+# Controls when the action will run.\n+on:\n+ # Triggers the workflow on push or pull request events but only for the develop branch\n+ push:\n+ branches: [ develop ]\n+ pull_request:\n+ branches: [ develop ]\n+\n+ # Allows you to run this workflow manually from the Actions tab\n+ workflow_dispatch:\n+\n+# A workflow run is made up of one or more jobs that can run sequentially or in parallel\n+jobs:\n+ # This workflow contains a single job called \"build\"\n+ build:\n+ # The type of runner that the job will run on\n+ runs-on: windows-latest\n+\n+ # Steps represent a sequence of tasks that will be executed as part of the job\n+ steps:\n+ # Checks-out your repository under $GITHUB_WORKSPACE, so your job can access it\n+ - uses: actions/checkout@v2\n+\n+ # Runs a single command using the runners shell\n+ - name: Set up MinGW\n+ uses: egor-tensin/setup-mingw@v2\n+ with:\n+ platform: x86\n+\n+ - name: Test GCC\n+ run: |\n+ gcc --version\n+\n+ - name: Set up Python 2.7\n+ uses: actions/setup-python@v2\n+ with:\n+ python-version: '2.7.x'\n+ architecture: 'x86'\n+\n+ - name: Installing SCons\n+ run: |\n+ python -c \"import sys; print(sys.version)\"\n+ python -m pip --version\n+ pip install scons\n+\n+ # Runs a set of commands using the runners shell\n+ - name: Build python board\n+ run: |\n+ scons board=python toolchain=gcc oos_openwsn\n+\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Set up Windows workflow
|
491,587 |
09.02.2021 17:35:34
| -3,600 |
37ce80d5ca22c46aa26cb3b7941db1b74fad8d80
|
Fixes missing error codes on Windows
|
[
{
"change_type": "MODIFY",
"old_path": "openstack/04-TRAN/sock.h",
"new_path": "openstack/04-TRAN/sock.h",
"diff": "#include \"opendefs.h\"\n#include \"async_types.h\"\n+#if defined (__WIN32__)\n+#define EADDRINUSE (1)\n+#define EAFNOSUPPORT (1)\n+#define ENOBUFS (1)\n+#define ENOTCONN (1)\n+#endif\n+\n/**\n* @brief A Common IP-based transport layer endpoint\n*/\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Fixes missing error codes on Windows
|
491,587 |
10.02.2021 11:53:09
| -3,600 |
cb3832eeb7fe0b53b0f9a145f77efc02201bc6a7
|
Build matrix for Linux and Windows
|
[
{
"change_type": "MODIFY",
"old_path": ".github/workflows/linux.yml",
"new_path": ".github/workflows/linux.yml",
"diff": "@@ -17,6 +17,14 @@ on:\njobs:\n# This workflow contains a single job called \"build\"\nbuild:\n+ strategy:\n+ fail-fast: false\n+ matrix:\n+ include:\n+ - { toolchain: gcc, board: python }\n+ - { toolchain: armgcc, board: openmote-cc2538}\n+ - { toolchain: armgcc, board: iot-lab_M3}\n+\n# The type of runner that the job will run on\nruns-on: ubuntu-latest\n@@ -29,7 +37,16 @@ jobs:\n- name: Install SCons\nrun: sudo apt install scons\n+ - name: Setup ARM toolchain\n+ uses: fiam/arm-none-eabi-gcc@v1\n+ with:\n+ release: '9-2020-q2'\n+\n+ - name: Test ARM toolchain\n+ run: |\n+ arm-none-eabi-gcc --version\n+\n# Runs a set of commands using the runners shell\n- - name: Build python board\n+ - name: Build firmware\nrun: |\n- scons board=python toolchain=gcc oos_openwsn\n+ scons board=${{ matrix.board }} toolchain=${{ matrix.toolchain }} oos_openwsn\n"
},
{
"change_type": "MODIFY",
"old_path": ".github/workflows/windows.yml",
"new_path": ".github/workflows/windows.yml",
"diff": "@@ -17,6 +17,14 @@ on:\njobs:\n# This workflow contains a single job called \"build\"\nbuild:\n+ strategy:\n+ fail-fast: false\n+ matrix:\n+ include:\n+ - { toolchain: gcc, board: python }\n+ - { toolchain: armgcc, board: openmote-cc2538}\n+ - { toolchain: armgcc, board: iot-lab_M3}\n+\n# The type of runner that the job will run on\nruns-on: windows-latest\n@@ -25,7 +33,6 @@ jobs:\n# Checks-out your repository under $GITHUB_WORKSPACE, so your job can access it\n- uses: actions/checkout@v2\n- # Runs a single command using the runners shell\n- name: Set up MinGW\nuses: egor-tensin/setup-mingw@v2\nwith:\n@@ -41,6 +48,15 @@ jobs:\npython-version: '2.7.x'\narchitecture: 'x86'\n+ - name: Setup ARM toolchain\n+ uses: fiam/arm-none-eabi-gcc@v1\n+ with:\n+ release: '9-2020-q2'\n+\n+ - name: Test ARM toolchain\n+ run: |\n+ arm-none-eabi-gcc --version\n+\n- name: Installing SCons\nrun: |\npython -c \"import sys; print(sys.version)\"\n@@ -48,7 +64,7 @@ jobs:\npip install scons\n# Runs a set of commands using the runners shell\n- - name: Build python board\n+ - name: Build firmware\nrun: |\n- scons board=python toolchain=gcc oos_openwsn\n+ scons board=${{ matrix.board }} toolchain=${{ matrix.toolchain }} oos_openwsn\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Build matrix for Linux and Windows
|
491,587 |
10.02.2021 14:35:33
| -3,600 |
943deacf3d58c44d17e94229fba011c4e7395c5b
|
Remove Travis CI builder
|
[
{
"change_type": "DELETE",
"old_path": ".travis.yml",
"new_path": null,
"diff": "-language: c\n-\n-before_script:\n-- python --version\n-- pip install --user pip\n-- pip install --user colorama\n-- sudo apt-key adv --keyserver keyserver.ubuntu.com --recv-keys 6D1D8367A3421AFB\n-- sudo add-apt-repository -y ppa:team-gcc-arm-embedded/ppa\n-- sudo apt update\n-- sudo apt install scons\n-- scons --version\n-- sudo apt install gcc-arm-embedded\n-- arm-none-eabi-gcc --version\n-- sudo apt install gcc-msp430\n-- msp430-gcc --version\n-- sudo apt install doxygen\n-- doxygen --version\n-\n-script:\n-- mkdir -p ./build/doc/\n-- scons docs\n-# - scons board=telosb toolchain=mspgcc verbose=1 oos_macpong\n-# - scons board=telosb kernel=freertos toolchain=mspgcc verbose=1 oos_macpong\n-- scons board=openmote-cc2538 toolchain=armgcc verbose=1 oos_macpong\n-- scons board=openmotestm toolchain=armgcc verbose=1 oos_macpong\n-# - scons board=wsn430v14 toolchain=mspgcc verbose=1 oos_macpong\n-# - scons board=wsn430v13b toolchain=mspgcc verbose=1 oos_macpong\n-# - scons board=gina toolchain=mspgcc verbose=1 oos_macpong\n-# - scons board=z1 toolchain=mspgcc verbose=1 oos_macpong\n-- scons board=iot-lab_M3 toolchain=armgcc verbose=1 oos_macpong\n-- scons board=iot-lab_A8-M3 toolchain=armgcc verbose=1 oos_macpong\n-# - scons board=telosb toolchain=mspgcc verbose=1 oos_openwsn\n-# - scons board=telosb kernel=freertos toolchain=mspgcc verbose=1 oos_openwsn\n-- scons board=openmotestm toolchain=armgcc verbose=1 oos_openwsn\n-- scons board=openmote-cc2538 toolchain=armgcc verbose=1 oos_openwsn\n-- scons board=openmote-cc2538 toolchain=armgcc verbose=1 oos_sniffer\n-- scons board=openmote-b toolchain=armgcc verbose=1 oos_openwsn\n-- scons board=openmote-b-24ghz toolchain=armgcc verbose=1 oos_openwsn\n-# - scons board=wsn430v14 toolchain=mspgcc verbose=1 oos_openwsn\n-# - scons board=wsn430v13b toolchain=mspgcc verbose=1 oos_openwsn\n-# - scons board=gina toolchain=mspgcc verbose=1 oos_openwsn\n-# - scons board=z1 toolchain=mspgcc verbose=1 oos_openwsn\n-- scons board=python toolchain=gcc verbose=1 oos_openwsn\n-- scons board=iot-lab_M3 toolchain=armgcc verbose=1 oos_openwsn\n-- scons board=iot-lab_A8-M3 toolchain=armgcc verbose=1 oos_openwsn\n-- scons board=samr21_xpro toolchain=armgcc verbose=1 oos_openwsn\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Remove Travis CI builder
|
491,592 |
03.11.2021 09:40:31
| -3,600 |
d03fb6269af98a52e14c2079de3711a57d75faaa
|
Update SConscript.env
fixing compilation of uinject in simulator.
|
[
{
"change_type": "MODIFY",
"old_path": "projects/python/SConscript.env",
"new_path": "projects/python/SConscript.env",
"diff": "@@ -906,8 +906,9 @@ functions_to_change = [\n'uinject_init',\n'uinject_sendDone',\n'uinject_receive',\n- 'uinject_timer_cb',\n- 'uinject_task_cb',\n+ '_uinject_timer_cb',\n+ '_uinject_task_cb',\n+ '_sock_handler',\n# userialbridge\n'userialbridge_init',\n'userialbridge_sendDone',\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Update SConscript.env
fixing compilation of uinject in simulator.
|
491,592 |
09.11.2021 21:50:31
| -3,600 |
e8f60e9fdcb5fff491257e0df7fafdb4129578df
|
Update uinject.c
renaming overlapping function with coap causing the simulator to fail
|
[
{
"change_type": "MODIFY",
"old_path": "openapps/uinject/uinject.c",
"new_path": "openapps/uinject/uinject.c",
"diff": "@@ -33,7 +33,7 @@ static const uint8_t uinject_dst_addr[] = {\n//=========================== prototypes ======================================\n-void _sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg);\n+void uinject_sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg);\nvoid _uinject_timer_cb(opentimers_id_t id);\n@@ -58,7 +58,7 @@ void uinject_init(void) {\nopenserial_printf(\"Created a UDP socket\\n\");\n- sock_udp_set_cb(&_sock, _sock_handler, NULL);\n+ sock_udp_set_cb(&_sock, uinject_sock_handler, NULL);\n// start periodic timer\nuinject_vars.period = UINJECT_PERIOD_MS;\n@@ -76,7 +76,7 @@ void uinject_init(void) {\n-void _sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg) {\n+void uinject_sock_handler(sock_udp_t *sock, sock_async_flags_t type, void *arg) {\n(void) arg;\nchar buf[50];\n"
}
] |
C
|
BSD 3-Clause New or Revised License
|
openwsn-berkeley/openwsn-fw
|
Update uinject.c
renaming overlapping function with coap causing the simulator to fail
|
718,770 |
04.01.2017 19:48:25
| 18,000 |
03e54920686987b11335b17362b562115fac4fc8
|
a few more attempts at walkTree(). walkTree5() was not the guy. now it looks like it should be good, but the current test is going weird.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/symboliks/common.py",
"new_path": "vivisect/symboliks/common.py",
"diff": "@@ -201,6 +201,28 @@ class SymbolikBase:\n'''\nraise Exception('%s *must* implement solve(emu=emu)!' % self.__class__.__name__)\n+ def reduce2(self, emu=None, foo=False):\n+ '''\n+ Algebraic reduction and operator folding where possible.\n+\n+ Example:\n+ symobj = symobj.reduce()\n+ '''\n+ def doreduce(path,oldkid,ctx):\n+ return oldkid._reduce(emu=emu)\n+\n+ sym = self.walkTree7(doreduce, once=True)\n+ if foo:\n+ symstr = str(sym)\n+ while True:\n+ sym = sym.walkTree7(doreduce)\n+ s1str = str(sym)\n+ if s1str == symstr:\n+ break\n+ symstr = s1str\n+\n+ return sym\n+\ndef reduce(self, emu=None, foo=False):\n'''\nAlgebraic reduction and operator folding where possible.\n@@ -489,7 +511,7 @@ class SymbolikBase:\nstack.pop()\nstack.pop()\n- def walkTree5(self, cb, ctx=None):\n+ def walkTree5(self, cb, ctx=None, once=True):\n'''\nthis version basically mirrors the original walkTree/_walkTreeImpl combination\nnot sure about the stack usage.\n@@ -497,26 +519,40 @@ class SymbolikBase:\n'''\npath = []\nidxs = []\n+ done = []\ncur = self\nidx = 0\nwhile True:\n+ if once and cur in done:\n+ if not len(path):\n+ return cur\n+\n+ cur= path.pop()\n+ idx = idxs.pop()\n+ continue\n+\nif idx == len(cur.kids):\n- #print \"END OF KID at level %d\" % (len(path))\n+ print \"END OF KID at level %d\" % (len(path))\n# do thing for cur\npath.append(cur)\n- #idxs.append(0)\n- cb(path, cur, ctx)\n+ newb = cb(path, cur, ctx)\n+ done.append(cur)\npath.pop()\n- #idxs.pop()\nif not len(path):\n- return\n+ if newb != None:\n+ return newb\n+ return cur\ncur = path.pop()\nidx = idxs.pop()\n+ if newb != None:\n+ if newb._sym_id == cur._sym_id:\n+ print \"YUP! cb returns the same sometimes!\"\n+ self.setSymKid(idx, newb)\ncontinue\n# otherwise, let's pick on the next kid\n@@ -527,19 +563,143 @@ class SymbolikBase:\nidxs.append(idx)\nif len(kid.kids):\n- #print \"DIVING DEEPER %d\" % (len(path))\n+ print \"DIVING DEEPER %d\" % (len(path))\ncur = kid\nidx = 0\ncontinue\nelse:\n+\npath.append(kid)\n- cb(path, kid, ctx)\n+ newb = cb(path, kid, ctx)\n+ if newb != None:\n+ if newb._sym_id == kid._sym_id:\n+ print \"YUP! cb returns the same sometimes!\"\n+ self.setSymKid(idx, newb)\n+ done.append(kid)\npath.pop()\npath.pop()\nidxs.pop()\n+ def walkTree6(self, cb, ctx=None, once=True):\n+ '''\n+ this version basically mirrors the original walkTree/_walkTreeImpl combination\n+ not sure about the stack usage.\n+ probably want to track index separately so we can just hand stack in as the path (and have it be correct)\n+ '''\n+ path = []\n+ idxs = []\n+ done = []\n+\n+ cur = self\n+ idx = 0\n+\n+ while True:\n+\n+ # if we only hit the same thing once, and we've already done it, skip this one\n+ if once and cur in done:\n+ print \"cur in done...\"\n+ if not len(path):\n+ return cur\n+\n+ cur = path.pop()\n+ idx = idxs.pop()\n+ continue\n+\n+ # let's pick on the next kid\n+ kid = cur.kids[idx]\n+ idx += 1\n+\n+ # add our current node to the path (and save our index)\n+ path.append(cur)\n+ idxs.append(idx)\n+\n+\n+ # depth first...\n+ if len(kid.kids):\n+ print \"DIVING DEEPER %d\" % (len(path))\n+ cur = kid\n+ idx = 0\n+ continue\n+\n+ # if current level of kids index is at the end, bail out\n+ if idx == len(cur.kids):\n+ print \"END OF KID at level %d\" % (len(path))\n+\n+ # do thing for cur\n+ newb = cb(path, cur, ctx)\n+ done.append(cur)\n+ cur = path.pop()\n+ idx = idxs.pop()\n+\n+ # are we at the end of our analysis?\n+ if not len(path):\n+ if newb != None:\n+ return newb\n+ return cur\n+\n+ # otherwise... move up a level\n+ cur = path.pop()\n+ idx = idxs.pop()\n+\n+ if newb != None:\n+ if newb._sym_id == cur._sym_id:\n+ print \"YUP! cb returns the same sometimes!\"\n+ self.setSymKid(idx, newb)\n+ continue\n+\n+ def walkTree7(self, cb, ctx=None, once=True):\n+ '''\n+ this version basically mirrors the original walkTree/_walkTreeImpl combination\n+ not sure about the stack usage.\n+ probably want to track index separately so we can just hand stack in as the path (and have it be correct)\n+ '''\n+ path = []\n+ idxs = []\n+ done = []\n+\n+ cur = self\n+ idx = 0\n+\n+\n+ while True:\n+ # follow kids if there are any left...\n+ if idx < len(cur.kids):\n+ kid = cur.kids[idx]\n+ if once and kid in done:\n+ idx += 1\n+ continue\n+\n+ path.append(cur)\n+ idxs.append(idx+1)\n+\n+ cur = kid\n+ idx = 0\n+\n+ # do self\n+ path.append(cur)\n+ newb = cb(path, cur, ctx)\n+ if newb != None:\n+ if newb._sym_id == cur._sym_id:\n+ print \"YUP! cb returns the same sometimes!\"\n+ self.setSymKid(idx, newb)\n+ path.pop()\n+ # tie newb in\n+\n+ done.append(cur)\n+\n+ if not len(path):\n+ if newb:\n+ return newb\n+ return cur\n+\n+ cur = path.pop()\n+ idx = idxs.pop()\n+\n+\n+\n+\ndef render(self, canvas, vw):\ncanvas.addText( str(self) )\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
a few more attempts at walkTree(). walkTree5() was not the guy. now it looks like it should be good, but the current test is going weird.
|
718,770 |
04.01.2017 20:53:17
| 18,000 |
c8932c6fbdb729e1cdffe25502247fa5c3da0313
|
fixed! walkTree7 seems to be the ticket.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/symboliks/common.py",
"new_path": "vivisect/symboliks/common.py",
"diff": "+import sys\nimport hashlib\nimport operator\nimport functools\n@@ -666,36 +667,44 @@ class SymbolikBase:\nwhile True:\n# follow kids if there are any left...\nif idx < len(cur.kids):\n+ #sys.stdout.write('+')\nkid = cur.kids[idx]\nif once and kid in done:\nidx += 1\ncontinue\npath.append(cur)\n- idxs.append(idx+1)\n+ idxs.append(idx)\ncur = kid\nidx = 0\n+ else:\n+ sys.stdout.write('.')\n# do self\npath.append(cur)\n+ #sys.stdout.write(' >> ')\nnewb = cb(path, cur, ctx)\n+ #sys.stdout.write(' << ')\nif newb != None:\nif newb._sym_id == cur._sym_id:\nprint \"YUP! cb returns the same sometimes!\"\n- self.setSymKid(idx, newb)\n+ #print \"setSymKid: %s :: %d\" % (len(path), idx)\n+ cur.setSymKid(idx, newb)\npath.pop()\n# tie newb in\ndone.append(cur)\nif not len(path):\n+ #sys.stdout.write('=')\nif newb:\nreturn newb\nreturn cur\ncur = path.pop()\n- idx = idxs.pop()\n+ idx = idxs.pop() + 1\n+ #sys.stdout.write('-')\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
fixed! walkTree7 seems to be the ticket.
|
718,770 |
05.01.2017 16:41:03
| 18,000 |
88b6668d6ab3dc8febcb89c3fb1ce827e13e921f
|
yay i think the bugs are worked out
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/symboliks/common.py",
"new_path": "vivisect/symboliks/common.py",
"diff": "@@ -202,7 +202,7 @@ class SymbolikBase:\n'''\nraise Exception('%s *must* implement solve(emu=emu)!' % self.__class__.__name__)\n- def reduce2(self, emu=None, foo=False):\n+ def reduce(self, emu=None, foo=False):\n'''\nAlgebraic reduction and operator folding where possible.\n@@ -212,11 +212,11 @@ class SymbolikBase:\ndef doreduce(path,oldkid,ctx):\nreturn oldkid._reduce(emu=emu)\n- sym = self.walkTree7(doreduce, once=True)\n+ sym = self.walkTree(doreduce, once=True)\nif foo:\nsymstr = str(sym)\nwhile True:\n- sym = sym.walkTree7(doreduce)\n+ sym = sym.walkTree(doreduce)\ns1str = str(sym)\nif s1str == symstr:\nbreak\n@@ -224,7 +224,7 @@ class SymbolikBase:\nreturn sym\n- def reduce(self, emu=None, foo=False):\n+ def reduce_orig(self, emu=None, foo=False):\n'''\nAlgebraic reduction and operator folding where possible.\n@@ -234,11 +234,11 @@ class SymbolikBase:\ndef doreduce(path,oldkid,ctx):\nreturn oldkid._reduce(emu=emu)\n- sym = self.walkTree(doreduce)\n+ sym = self.walkTree_orig(doreduce)\nif foo:\nsymstr = str(sym)\nwhile True:\n- sym = sym.walkTree(doreduce)\n+ sym = sym.walkTree_orig(doreduce)\ns1str = str(sym)\nif s1str == symstr:\nbreak\n@@ -313,7 +313,7 @@ class SymbolikBase:\nreturn False\n- def walkTree(self, cb, ctx=None):\n+ def walkTree_orig(self, cb, ctx=None):\n'''\nWalk the tree of symbolik objects. (depth first)\n@@ -349,170 +349,7 @@ class SymbolikBase:\npath.pop()\nreturn newkid\n- def _walkTree2Impl(self, path, cb, ctx=None):\n- '''\n- clean self up.\n- AST ENDPOINTS:\n- ==============\n- cnot,\n- Call,\n- Arg,\n- Var, LookupVar,\n- Const,\n-\n- AST PARENTS:\n- ============\n- Mem,\n- Operators\n- '''\n- path.append( self )\n- # when kids[i] is a list of tupes then we need to call into it!\n- for i in range(len(self.kids)):\n- oldkid = self.kids[i]\n- newkid = oldkid._walkTreeImpl(path,cb,ctx=ctx)\n- if newkid._sym_id != oldkid._sym_id:\n- self.setSymKid(i, newkid)\n-\n- newkid = cb(path,self,ctx)\n- if newkid == None:\n- newkid = self\n-\n- # lifo like a stack ( and like a baws )\n- path.pop()\n- return newkid\n-\n- def walkTree2(self, cb, ctx=None):\n- '''\n- depth-first is key.\n- all the walking is done here. _walkTreeImpl2 only cleans itself up.\n- '''\n-\n- '''\n- path = vg_path.newPathNode()\n- todo = [ (path, self) ]\n-\n- for i in range(len(self.kids)):\n- oldkid = self.kids[i]\n- cpath = vg_path.newPathNode(oldkid)\n-\n- #newkid = oldkid._walkTreeImpl(path,cb,ctx=ctx)\n-\n- ##########################3\n- todo = [ [nid, kids, idx=0] ]\n- while todo:\n- nid, kids, idx = todo.pop()\n- kid = kid[idx]\n- if len(kid.kids):\n- todo.append(\n-\n- ##### NOPE ######'''\n- # do stack-recursion throughout the AST tree.\n- cur = self\n- idx = 0\n- path = [ [cur, idx] ]\n-\n- while len(path):\n- # operate on the most recent path entry\n- cur, idx = path[-1]\n- print len(path), idx\n-\n- # if the current idx is past the end, backup\n- if idx == len(cur.kids):\n- print \"END OF KID at level %d\" % (len(path))\n- cb(path, cur, ctx)\n- path.pop()\n- # do thing for cur\n- continue\n-\n- # otherwise, let's pick on the next kid\n- kid = cur.kids[idx]\n- idx += 1\n- path[-1][1] = idx\n-\n- # if this kid has other kids, add him to the stack and keep diving\n- if len(kid.kids):\n- print \"DIVING DEEPER %d\" % (len(path))\n- path.append([kid, 0])\n-\n- def walkTree3(self, cb, ctx=None):\n- stack = []\n-\n- cur = self\n- idx = 0\n-\n- while True: #break out when we reach the end of self.kids\n- if idx == len(cur.kids):\n- print \"END OF KID at level %d\" % (len(stack))\n-\n- # do thing for cur\n- cb(stack, cur, ctx)\n-\n- if not len(stack):\n- return\n-\n- cur, idx = stack.pop()\n- continue\n-\n- # otherwise, let's pick on the next kid\n- kid = cur.kids[idx]\n- idx += 1\n-\n- stack.append( (cur, idx) )\n- if len(kid.kids):\n- print \"DIVING DEEPER %d\" % (len(stack))\n- cur = kid\n- idx = 0\n- continue\n-\n- else:\n- cb(stack, kid, ctx)\n- stack.pop()\n-\n- def walkTree4(self, cb, ctx=None):\n- '''\n- this version basically mirrors the original walkTree/_walkTreeImpl combination\n- not sure about the stack usage.\n- probably want to track index separately so we can just hand stack in as the path (and have it be correct)\n- '''\n- stack = []\n-\n- cur = self\n- idx = 0\n-\n- while True: #break out when we reach the end of self.kids\n- if idx == len(cur.kids):\n- print \"END OF KID at level %d\" % (len(stack))\n-\n- # do thing for cur\n- stack.append((cur, 0))\n- cb(stack, cur, ctx)\n- stack.pop()\n-\n- if not len(stack):\n- return\n-\n- cur, idx = stack.pop()\n- continue\n-\n- # otherwise, let's pick on the next kid\n- kid = cur.kids[idx]\n- idx += 1\n-\n- stack.append( (cur, idx) )\n-\n- if len(kid.kids):\n- print \"DIVING DEEPER %d\" % (len(stack))\n- cur = kid\n- idx = 0\n- continue\n-\n- else:\n- stack.append((kid, 0))\n- cb(stack, kid, ctx)\n- stack.pop()\n- stack.pop()\n-\n- def walkTree5(self, cb, ctx=None, once=True):\n+ def walkTree(self, cb, ctx=None, once=True):\n'''\nthis version basically mirrors the original walkTree/_walkTreeImpl combination\nnot sure about the stack usage.\n@@ -525,145 +362,6 @@ class SymbolikBase:\ncur = self\nidx = 0\n- while True:\n- if once and cur in done:\n- if not len(path):\n- return cur\n-\n- cur= path.pop()\n- idx = idxs.pop()\n- continue\n-\n- if idx == len(cur.kids):\n- print \"END OF KID at level %d\" % (len(path))\n-\n- # do thing for cur\n- path.append(cur)\n- newb = cb(path, cur, ctx)\n- done.append(cur)\n- path.pop()\n-\n- if not len(path):\n- if newb != None:\n- return newb\n- return cur\n-\n- cur = path.pop()\n- idx = idxs.pop()\n- if newb != None:\n- if newb._sym_id == cur._sym_id:\n- print \"YUP! cb returns the same sometimes!\"\n- self.setSymKid(idx, newb)\n- continue\n-\n- # otherwise, let's pick on the next kid\n- kid = cur.kids[idx]\n- idx += 1\n-\n- path.append(cur)\n- idxs.append(idx)\n-\n- if len(kid.kids):\n- print \"DIVING DEEPER %d\" % (len(path))\n- cur = kid\n- idx = 0\n- continue\n-\n- else:\n-\n- path.append(kid)\n- newb = cb(path, kid, ctx)\n- if newb != None:\n- if newb._sym_id == kid._sym_id:\n- print \"YUP! cb returns the same sometimes!\"\n- self.setSymKid(idx, newb)\n- done.append(kid)\n- path.pop()\n-\n- path.pop()\n- idxs.pop()\n-\n- def walkTree6(self, cb, ctx=None, once=True):\n- '''\n- this version basically mirrors the original walkTree/_walkTreeImpl combination\n- not sure about the stack usage.\n- probably want to track index separately so we can just hand stack in as the path (and have it be correct)\n- '''\n- path = []\n- idxs = []\n- done = []\n-\n- cur = self\n- idx = 0\n-\n- while True:\n-\n- # if we only hit the same thing once, and we've already done it, skip this one\n- if once and cur in done:\n- print \"cur in done...\"\n- if not len(path):\n- return cur\n-\n- cur = path.pop()\n- idx = idxs.pop()\n- continue\n-\n- # let's pick on the next kid\n- kid = cur.kids[idx]\n- idx += 1\n-\n- # add our current node to the path (and save our index)\n- path.append(cur)\n- idxs.append(idx)\n-\n-\n- # depth first...\n- if len(kid.kids):\n- print \"DIVING DEEPER %d\" % (len(path))\n- cur = kid\n- idx = 0\n- continue\n-\n- # if current level of kids index is at the end, bail out\n- if idx == len(cur.kids):\n- print \"END OF KID at level %d\" % (len(path))\n-\n- # do thing for cur\n- newb = cb(path, cur, ctx)\n- done.append(cur)\n- cur = path.pop()\n- idx = idxs.pop()\n-\n- # are we at the end of our analysis?\n- if not len(path):\n- if newb != None:\n- return newb\n- return cur\n-\n- # otherwise... move up a level\n- cur = path.pop()\n- idx = idxs.pop()\n-\n- if newb != None:\n- if newb._sym_id == cur._sym_id:\n- print \"YUP! cb returns the same sometimes!\"\n- self.setSymKid(idx, newb)\n- continue\n-\n- def walkTree7(self, cb, ctx=None, once=True):\n- '''\n- this version basically mirrors the original walkTree/_walkTreeImpl combination\n- not sure about the stack usage.\n- probably want to track index separately so we can just hand stack in as the path (and have it be correct)\n- '''\n- path = []\n- idxs = []\n- done = []\n-\n- cur = self\n- idx = 0\n-\n-\nwhile True:\n# follow kids if there are any left...\nif idx < len(cur.kids):\n@@ -673,26 +371,22 @@ class SymbolikBase:\nidx += 1\ncontinue\n+ # store current info for this level\npath.append(cur)\nidxs.append(idx)\n+ # let's get into the minds of our kids...\ncur = kid\nidx = 0\n- else:\n- sys.stdout.write('.')\n+ #else:\n+ # sys.stdout.write('.')\n# do self\n- path.append(cur)\n- #sys.stdout.write(' >> ')\n+ #sys.stdout.write(' >> %r' % cur.__class__)\n+ path.append(cur) # old walkTree expects cur to be on the top of the stack\nnewb = cb(path, cur, ctx)\n+ path.pop() # clean up, since our algorithm doesn't expect cur on the top...\n#sys.stdout.write(' << ')\n- if newb != None:\n- if newb._sym_id == cur._sym_id:\n- print \"YUP! cb returns the same sometimes!\"\n- #print \"setSymKid: %s :: %d\" % (len(path), idx)\n- cur.setSymKid(idx, newb)\n- path.pop()\n- # tie newb in\ndone.append(cur)\n@@ -702,10 +396,19 @@ class SymbolikBase:\nreturn newb\nreturn cur\n+ # pop back up a level\ncur = path.pop()\n- idx = idxs.pop() + 1\n+ idx = idxs.pop()\n+\n+ # tie newb in\n+ if newb != None:\n+ #print \"setSymKid: %s :: %d\" % (len(path), idx)\n+ cur.setSymKid(idx, newb)\n+\n#sys.stdout.write('-')\n+ idx += 1\n+\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
yay i think the bugs are worked out
|
718,770 |
13.01.2017 14:13:12
| 18,000 |
b3b8e84d121a3a38b2958b73dbcc8f4929e97537
|
fix for uxth/b
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -1544,8 +1544,8 @@ thumb_base = [\n# Miscellaneous in6tructions\n('1011001000', (561,'sxth', rm_rd, 0)), # SXTH<c> <Rd>, <Rm>\n('1011001001', (561,'sxtb', rm_rd, 0)), # SXTB<c> <Rd>, <Rm>\n- ('1011001000', (561,'uxth', rm_rd, 0)), # UXTH<c> <Rd>, <Rm>\n- ('1011001001', (561,'uxtb', rm_rd, 0)), # UXTB<c> <Rd>, <Rm>\n+ ('1011001010', (561,'uxth', rm_rd, 0)), # UXTH<c> <Rd>, <Rm>\n+ ('1011001011', (561,'uxtb', rm_rd, 0)), # UXTB<c> <Rd>, <Rm>\n('1011010', (56,'push', push_reglist, 0)), # PUSH <reglist>\n('10110110010', (57,'setend', sh4_imm1, 0)), # SETEND <endian_specifier>\n('10110110011', (58,'cps', simpleops(),0)), # CPS<effect> <iflags> FIXME\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
fix for uxth/b
|
718,770 |
17.01.2017 00:00:52
| 18,000 |
fb831378e54093a2c79fde2b18797bb5053f7a08
|
clean up unnecessary field.
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/symboliks/common.py",
"new_path": "vivisect/symboliks/common.py",
"diff": "@@ -82,7 +82,6 @@ class SymbolikBase:\nself.kids = []\nself.parents = []\nself.cache = {}\n- self._reduced = False\ndef __add__(self, other):\nreturn o_add(self, other, self.getWidth())\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
clean up unnecessary field.
|
718,770 |
20.01.2017 17:55:45
| 18,000 |
bcc3ec31ae9786e697674c4512a222b5898670c5
|
clean up old and printing statements
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/symboliks/common.py",
"new_path": "vivisect/symboliks/common.py",
"diff": "@@ -223,28 +223,6 @@ class SymbolikBase:\nreturn sym\n- def reduce_orig(self, emu=None, foo=False):\n- '''\n- Algebraic reduction and operator folding where possible.\n-\n- Example:\n- symobj = symobj.reduce()\n- '''\n- def doreduce(path,oldkid,ctx):\n- return oldkid._reduce(emu=emu)\n-\n- sym = self.walkTree_orig(doreduce)\n- if foo:\n- symstr = str(sym)\n- while True:\n- sym = sym.walkTree_orig(doreduce)\n- s1str = str(sym)\n- if s1str == symstr:\n- break\n- symstr = s1str\n-\n- return sym\n-\ndef _reduce(self, emu=None):\n'''\nAlgebraic reduction and operator folding where possible.\n@@ -312,42 +290,6 @@ class SymbolikBase:\nreturn False\n- def walkTree_orig(self, cb, ctx=None):\n- '''\n- Walk the tree of symbolik objects. (depth first)\n-\n- The callback is expected to have the following\n- convention:\n- newobj = callback(path,oldkid,ctx)\n-\n- NOTE: because the callback may completely replace\n- the symbolik object, walkTree() returns the\n- (potentially new) \"self\" and should be used\n- similarly to \"reduce()\":\n-\n- symobj = symbobj.walkTree(callback)\n-\n- '''\n- return self._walkTreeImpl([],cb,ctx=ctx)\n-\n- def _walkTreeImpl(self, path, cb, ctx=None):\n- # the internal version of walk tree ( which is also the recursive one )\n- path.append( self )\n- # when kids[i] is a list of tupes then we need to call into it!\n- for i in range(len(self.kids)):\n- oldkid = self.kids[i]\n- newkid = oldkid._walkTreeImpl(path,cb,ctx=ctx)\n- if newkid._sym_id != oldkid._sym_id:\n- self.setSymKid(i, newkid)\n-\n- newkid = cb(path,self,ctx)\n- if newkid == None:\n- newkid = self\n-\n- # lifo like a stack ( and like a baws )\n- path.pop()\n- return newkid\n-\ndef walkTree(self, cb, ctx=None, once=True):\n'''\nthis version basically mirrors the original walkTree/_walkTreeImpl combination\n@@ -408,10 +350,6 @@ class SymbolikBase:\nidx += 1\n-\n-\n-\n-\ndef render(self, canvas, vw):\ncanvas.addText( str(self) )\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/symboliks/tests/test_analysis.py",
"new_path": "vivisect/symboliks/tests/test_analysis.py",
"diff": "@@ -47,7 +47,7 @@ def cb_astNodeCount(path,obj,ctx):\nctx['count'] += 1\nif len(path) > ctx['depth']:\nctx['depth'] = len(path)\n- print \"\\n\\t%r\\n\\t\\t%s\" % (obj, '\\n\\t\\t'.join([repr(x) for x in path]))\n+ #print \"\\n\\t%r\\n\\t\\t%s\" % (obj, '\\n\\t\\t'.join([repr(x) for x in path]))\nclass WalkTreeTest(unittest.TestCase):\n@@ -70,14 +70,12 @@ class WalkTreeTest(unittest.TestCase):\ndef walkTreeDoer(vw):\nsctx = vsym_analysis.getSymbolikAnalysisContext(vw)\n- print sctx\n-\ncount = 0\nfor fva in vw.getFunctions():\nctx = {'depth':0, 'count':0}\ncount += 1\n- print \"(%d) 0x%x done\" % (count, fva)\n+ #print \"(%d) 0x%x done\" % (count, fva)\n#raw_input(\"============================================================\")\nfor spath in sctx.getSymbolikPaths(fva, maxpath=1):\n@@ -86,7 +84,7 @@ def walkTreeDoer(vw):\ncontinue\neff = effs[-1]\n- print \"=====\\n %r \\n=====\" % (eff)\n+ #print \"=====\\n %r \\n=====\" % (eff)\n# this is ugly\nsymast = getattr(eff, 'symobj', None)\n@@ -108,7 +106,7 @@ def walkTreeDoer(vw):\nif symast == None:\n- print \"CRAP! skipping\"\n+ #print \"CRAP! skipping\"\ncontinue\neff.walkTree(cb_astNodeCount, ctx); ctx\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
clean up old and printing statements
|
718,770 |
20.01.2017 23:51:43
| 18,000 |
0a103fcdb2ca55c961ae8a7079e53f5b12931c2e
|
fix envi codeflow bug for ARM/THUMB switching
|
[
{
"change_type": "MODIFY",
"old_path": "envi/codeflow.py",
"new_path": "envi/codeflow.py",
"diff": "@@ -225,9 +225,9 @@ class CodeFlowContext(object):\n# the function that we want to make prodcedural\n# called us so we can't call to make it procedural\n# until its done\n- cf_eps.add(bva)\n+ cf_eps.add((bva, bflags))\nelse:\n- self.addEntryPoint( bva )\n+ self.addEntryPoint( bva, arch=bflags )\nif self._cf_noret.get( bva ):\n# then our next va is noflow!\n@@ -247,7 +247,7 @@ class CodeFlowContext(object):\n# remove our local blocks from global block stack\nself._cf_blocks.pop()\nwhile cf_eps:\n- fva = cf_eps.pop()\n+ fva, arch = cf_eps.pop()\nif not self._mem.isFunction(fva):\nself.addEntryPoint(fva, arch=arch)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
fix envi codeflow bug for ARM/THUMB switching
|
718,770 |
21.01.2017 00:56:09
| 18,000 |
ccaf2ba6a15e45f6ea04f78f8a467fcc80320a6c
|
add endian-awareness to envi readMemoryValue functions (thus Emulators and MemCanvases), while improving performance through table lookups instead of sequential-ifs for format strings
|
[
{
"change_type": "MODIFY",
"old_path": "envi/__init__.py",
"new_path": "envi/__init__.py",
"diff": "@@ -752,33 +752,23 @@ class Emulator(e_reg.RegisterContext, e_mem.MemoryObject):\n\"\"\"\nReturns the value of the bytes at the \"addr\" address, given the size (currently, power of 2 only)\n\"\"\"\n- #FIXME: Handle endianness\nbytes = self.readMemory(addr, size)\nif bytes == None:\nreturn None\nif len(bytes) != size:\nraise Exception(\"Read Gave Wrong Length At 0x%.8x (va: 0x%.8x wanted %d got %d)\" % (self.getProgramCounter(),addr, size, len(bytes)))\n- if size == 1:\n- return struct.unpack(\"B\", bytes)[0]\n- elif size == 2:\n- return struct.unpack(\">H\", bytes)[0]\n- elif size == 4:\n- return struct.unpack(\">L\", bytes)[0]\n- elif size == 8:\n- return struct.unpack(\">Q\", bytes)[0]\n+\n+ fmttbl = e_bits.fmt_chars[self.getEndian()]\n+ return struct.unpack(fmttbl[size], bytes)[0]\ndef writeMemValue(self, addr, value, size):\n#FIXME change this (and all uses of it) to passing in format...\n#FIXME: Remove byte check and possibly half-word check. (possibly all but word?)\n- #FIXME: Handle endianness\n- if size == 1:\n- bytes = struct.pack(\"B\",value & 0xff)\n- elif size == 2:\n- bytes = struct.pack(\">H\",value & 0xffff)\n- elif size == 4:\n- bytes = struct.pack(\">L\", value & 0xffffffff)\n- elif size == 8:\n- bytes = struct.pack(\">Q\", value & 0xffffffffffffffff)\n+ mask = e_bits.umaxes[size]\n+ fmttbl = e_bits.fmt_chars[self.getEndian()]\n+\n+ bytes = struct.pack(fmttbl[size], value & mask)\n+\nself.writeMemory(addr, bytes)\ndef readMemSignedValue(self, addr, size):\n@@ -787,12 +777,8 @@ class Emulator(e_reg.RegisterContext, e_mem.MemoryObject):\nbytes = self.readMemory(addr, size)\nif bytes == None:\nreturn None\n- if size == 1:\n- return struct.unpack(\"b\", bytes)[0]\n- elif size == 2:\n- return struct.unpack(\">h\", bytes)[0]\n- elif size == 4:\n- return struct.unpack(\">l\", bytes)[0]\n+ fmttbl = e_bits.fmt_schars[self.getEndian()]\n+ return struct.unpack(fmttbl[size], bytes)[0]\ndef integerSubtraction(self, op, sidx=0, midx=1):\n\"\"\"\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/bits.py",
"new_path": "envi/bits.py",
"diff": "@@ -137,8 +137,18 @@ def is_aux_carry(src, dst):\ndef is_aux_carry_sub(src, dst):\nreturn src & 0xf > dst & 0xf\n+# set of format lists which make size, endianness, and signedness fast and easy\nle_fmt_chars = (None,\"B\",\"<H\",None,\"<I\",None,None,None,\"<Q\")\nbe_fmt_chars = (None,\"B\",\">H\",None,\">I\",None,None,None,\">Q\")\n+\n+fmt_chars = (le_fmt_chars, be_fmt_chars)\n+\n+le_fmt_schars = (None,\"b\",\"<h\",None,\"<i\",None,None,None,\"<q\")\n+be_fmt_schars = (None,\"b\",\">h\",None,\">i\",None,None,None,\">q\")\n+\n+fmt_schars = (le_fmt_schars, be_fmt_schars)\n+\n+\ndef parsebytes(bytes, offset, size, sign=False, bigend=False):\n\"\"\"\nMostly for pulling immediates out of strings...\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/memory.py",
"new_path": "envi/memory.py",
"diff": "@@ -3,6 +3,7 @@ import struct\nimport collections\nimport envi\n+import envi.bits as e_bits\n\"\"\"\nA module containing memory utilities and the definition of the\n@@ -164,17 +165,13 @@ class IMemory:\nbytes = self.readMemory(addr, size)\nif bytes == None:\nreturn None\n+\n#FIXME change this (and all uses of it) to passing in format...\nif len(bytes) != size:\nraise Exception(\"Read Gave Wrong Length At 0x%.8x (va: 0x%.8x wanted %d got %d)\" % (self.getProgramCounter(),addr, size, len(bytes)))\n- if size == 1:\n- return struct.unpack(\"B\", bytes)[0]\n- elif size == 2:\n- return struct.unpack(\"<H\", bytes)[0]\n- elif size == 4:\n- return struct.unpack(\"<I\", bytes)[0]\n- elif size == 8:\n- return struct.unpack(\"<Q\", bytes)[0]\n+\n+ fmttbl = (e_bits.le_fmt_chars, e_bits.be_fmt_chars)[self.getEndian()]\n+ return struct.unpack(fmttbl[size], bytes)[0]\ndef readMemoryPtr(self, va):\n'''\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
add endian-awareness to envi readMemoryValue functions (thus Emulators and MemCanvases), while improving performance through table lookups instead of sequential-ifs for format strings
|
718,770 |
21.01.2017 02:31:27
| 18,000 |
74db2ac712da2feafdfedc039a8ed08076a95531
|
code-flow improvements, added instructions
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/const.py",
"new_path": "envi/archs/arm/const.py",
"diff": "@@ -85,6 +85,7 @@ IF_IB = 7<<(IF_DAIB_SHFT-1) # Increment Before\nIF_DAIB_B = 5<<(IF_DAIB_SHFT-1) # Before mask\nIF_DAIB_I = 3<<(IF_DAIB_SHFT-1) # Before mask\nIF_THUMB32 = 1<<50 # thumb32\n+\nIFS_VQ = 1<<1 # Adv SIMD: operation uses saturating arithmetic\nIFS_VR = 1<<2 # Adv SIMD: operation performs rounding\nIFS_VD = 1<<3 # Adv SIMD: operation doubles the result\n@@ -473,6 +474,9 @@ instrnames = [\n'INS_VQRSHRUN',\n'INS_VSHLL',\n'INS_VCVT',\n+ 'INS_LDRB',\n+ 'INS_STRB',\n+ 'INS_SMUL',\n]\nins_index = 85\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -1313,7 +1313,7 @@ def p_coproc_load(opval, va):\nelse:\niflags = 0\n#check for index. Non-index is option\n- print \"punwl: 0x%x\" % punwl\n+ #print \"punwl: 0x%x\" % punwl\nif (punwl & 0x1a) != 8:\nolist = (\nArmCoprocOper(cp_num),\n@@ -1544,7 +1544,7 @@ def p_uncond(opval, va, psize = 4):\n)\nopcode = INS_BLX\n- return (opcode, mnem, olist, 0, 0)\n+ return (opcode, mnem, olist, envi.IF_CALL, 0)\nelse:\nraise envi.InvalidInstruction(\nmesg=\"p_uncond (ontop=2): invalid instruction\",\n@@ -2088,6 +2088,8 @@ def _do_adv_simd_32(val, va, u):\nimm = (val >> 16) & 0x3f\n+ #### REMOVE WHEN COMPLETE WITH DECODING\n+ shift_amount = 0\nif enctype == 0: # VSHR used as test\nlimm = (l<<6) | imm\n@@ -3606,7 +3608,7 @@ class ArmRegListOper(ArmOperand):\nreturn True\ndef involvesPC(self):\n- return self.val & 0x80 == 0x80\n+ return self.val & 0x8000 == 0x8000\ndef isDeref(self):\nreturn False\n@@ -3969,7 +3971,7 @@ class ArmDisasm:\n# Begin the table lookup sequence with the first 3 non-cond bits\nencfam = (opval >> 25) & 0x7\n- print \"encode family = %s (0x%x)\" % (encfam, opval)\n+ #print \"encode family = %s (0x%x)\" % (encfam, opval)\nif cond == COND_EXTENDED:\nenc = IENC_UNCOND\n@@ -3978,7 +3980,7 @@ class ArmDisasm:\nenc,nexttab = inittable[encfam]\nif nexttab != None: # we have to sub-parse...\nfor mask,val,penc in nexttab:\n- print \"penc\", penc\n+ #print \"penc\", penc\nif (opval & mask) == val:\nenc = penc\nbreak\n@@ -3988,7 +3990,7 @@ class ArmDisasm:\nraise envi.InvalidInstruction(mesg=\"No encoding found!\",\nbytez=bytez[offset:offset+4], va=va)\n- print \"ienc_parser index, routine: %d, %s\" % (enc, ienc_parsers[enc])\n+ #print \"ienc_parser index, routine: %d, %s\" % (enc, ienc_parsers[enc])\nopcode, mnem, olist, flags, simdflags = ienc_parsers[enc](opval, va+8)\nreturn opcode, mnem, olist, flags, simdflags\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -420,10 +420,14 @@ def rm_reglist(va, value):\noper0.oflags |= OF_W\nreturn oper0,oper1\n-def pop_reglist(va, value):\n+def pop_reglist_32(va, value, val2):\n+ flags = 0\nreglist = (value & 0xff) | ((value & 0x100)<<7)\noper0 = ArmRegListOper(reglist)\n- return (oper0,)\n+ if reglist & 0x8000:\n+ flags |= envi.IF_NOFALL\n+\n+ return None, None, (oper0,), flags, 0\ndef push_reglist(va, value):\nreglist = (value & 0xff) | ((value & 0x100)<<6)\n@@ -604,7 +608,7 @@ def dp_mod_imm_32(va, val1, val2):\noper1 = ArmRegOper(Rn)\noper2 = ArmImmOper(const)\nopers = (oper1, oper2)\n- return 0, mnem, opers, flags\n+ return 0, None, opers, flags, 0\noper0 = ArmRegOper(Rd)\noper1 = ArmRegOper(Rn)\n@@ -698,6 +702,35 @@ def strex_32(va, val1, val2):\nflags = 0\nreturn None, None, opers, flags, 0\n+def ldr_32(va, val1, val2):\n+ rn = val1 & 0xf\n+ rt = (val2 >> 12) & 0xf\n+ imm12 = val2 & 0xfff\n+\n+ oper0 = ArmRegOper(rt, va=va)\n+ oper1 = ArmImmOffsetOper(rn, imm12, va=va)\n+\n+ opers = (oper0, oper1)\n+ return None, None, opers, None, 0\n+\n+def ldr_puw_32(va, val1, val2):\n+ b11 = (val2>>11) & 1\n+ if not b11:\n+ raise Exception(\"ldr_puw_32 parsing non-ldrb\")\n+\n+ rn = val1 & 0xf\n+ rt = (val2 >> 12) & 0xf\n+ imm8 = val2 & 0xff\n+\n+ puw = (val2>>8) & 0x7\n+ pubwl = ((puw&1) | ((puw&0x6)<<1)) << 1\n+\n+ oper0 = ArmRegOper(rt, va=va)\n+ oper1 = ArmImmOffsetOper(rn, imm8, va=va, pubwl=pubwl)\n+\n+ opers = (oper0, oper1)\n+ return None, None, opers, None, 0\n+\ndef ldrex_32(va, val1, val2):\nrn = val1 & 0xf\nrt = (val2 >> 12) & 0xf\n@@ -744,6 +777,21 @@ def strexn_32(va, val1, val2):\nflags = 0\nreturn 0, mnem, opers, flags, 0\n+def smul_32(va, val1, val2):\n+ rn = val1 & 0xf\n+ rm = val2 & 0xf\n+ rd = (val2 >> 8) & 0xf\n+\n+ nm = (val2 >> 4) & 0x3\n+ mnem = ('smulbb','smulbt','smultb','smultt')[nm]\n+\n+ opers = (\n+ ArmRegOper(rd, va=va),\n+ ArmRegOper(rn, va=va),\n+ ArmRegOper(rm, va=va),\n+ )\n+ return None, mnem, opers, None, 0\n+\ndef tb_ldrex_32(va, val1, val2):\nop3 = (val2 >> 4) & 0xf\n@@ -1558,7 +1606,7 @@ thumb_base = [\n('1011101011', (63,'revsh', rn_rdm, 0)), # REVSH Rd, Rn\n('101100000', (INS_ADD,'add', sp_sp_imm7, 0)), # ADD<c> SP,SP,#<imm>\n('101100001', (INS_SUB,'sub', sp_sp_imm7, 0)), # SUB<c> SP,SP,#<imm>\n- ('1011110', (66,'pop', pop_reglist, 0)), # POP<c> <registers>\n+ ('1011110', (66,'pop', pop_reglist_32, IF_THUMB32)), # POP<c> <registers>\n('10111110', (67,'bkpt', imm8, 0)), # BKPT <blahblah>\n# Load / Store Mu64iple\n('11000', (68,'stm', rm_reglist, IF_IA|IF_W)), # LDMIA Rd!, reg_list\n@@ -1751,6 +1799,10 @@ thumb2_extension = [\n('11110111101', (85,'usat', dp_bin_imm_32, IF_W | IF_THUMB32)), # usat16 if val2=0000xxxx00xxxxxx\n('11110111110', (85,'ubfx', dp_bin_imm_32, IF_W | IF_THUMB32)),\n('11110111111', (85,'branchmisc', branch_misc, IF_THUMB32)),\n+ ('111110001001', (INS_LDRB, 'ldrb', ldr_32, IF_THUMB32)),\n+ ('111110001000', (INS_STRB, 'strb', ldr_32, IF_THUMB32)),\n+ ('111110000000', (INS_STRB, 'strb', ldr_puw_32, IF_THUMB32)),\n+ ('111110110001', (INS_SMUL, 'smul', smul_32, IF_THUMB32)),\n#('11111', (85,'branchmisc', branch_misc, IF_THUMB32)),\n#('11111', (85,'SOMETHING WICKED THIS WAY', dp_bin_imm_32, IF_THUMB32)),\n@@ -1783,8 +1835,6 @@ thumb2_extension = [\n('11110111110', (85,'rsb', dp_bin_imm_32, IF_W | IF_THUMB32)),\n('11110111111', (85,'', dp_bin_imm_32, IF_W | IF_THUMB32)),\n'''\n-'''\n-'''\nthumb_table = list(thumb_base)\nthumb_table.extend(thumb1_extension)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
code-flow improvements, added instructions
|
718,770 |
21.01.2017 03:05:07
| 18,000 |
e25929d9f11b4c4ba626cef58234fd76faf0a0c8
|
more code-flow improvements, added instructions
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/const.py",
"new_path": "envi/archs/arm/const.py",
"diff": "@@ -477,6 +477,12 @@ instrnames = [\n'INS_LDRB',\n'INS_STRB',\n'INS_SMUL',\n+ 'INS_UADD16',\n+ 'INS_UADD8',\n+ 'INS_USUB16',\n+ 'INS_USUB8',\n+ 'INS_UASX',\n+ 'INS_USAX',\n]\nins_index = 85\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -1537,7 +1537,7 @@ def p_uncond(opval, va, psize = 4):\n#blx\nmnem = \"blx\"\nh = (opval>>23) & 2\n- imm_offset = e_bits.signed(opval, 3) + h\n+ imm_offset = (e_bits.signed(opval, 3) << 2) | h\nolist = (\nArmPcOffsetOper(imm_offset, va),\n@@ -2090,6 +2090,8 @@ def _do_adv_simd_32(val, va, u):\n#### REMOVE WHEN COMPLETE WITH DECODING\nshift_amount = 0\n+ simdflags = 0\n+ ####\nif enctype == 0: # VSHR used as test\nlimm = (l<<6) | imm\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -617,11 +617,14 @@ def dp_mod_imm_32(va, val1, val2):\nreturn None, None, opers, flags, 0\n+def pdp_32(va, val1, val2):\n+ return None, None, None, None, None\n+\ndef dp_bin_imm_32(va, val1, val2):\nif val2 & 0x8000:\nreturn branch_misc(va, val1,val2)\n- flags = 0\n+ flags = IF_THUMB32\n# FIXME: decoding incorrectly\nRd = (val2 >> 8) & 0xf\n@@ -1802,6 +1805,17 @@ thumb2_extension = [\n('111110001001', (INS_LDRB, 'ldrb', ldr_32, IF_THUMB32)),\n('111110001000', (INS_STRB, 'strb', ldr_32, IF_THUMB32)),\n('111110000000', (INS_STRB, 'strb', ldr_puw_32, IF_THUMB32)),\n+ ('111110101001', (INS_UADD16, 'uadd16', pdp_32, IF_THUMB32)), # FIXME: overlapping with saturating instructions\n+ ('111110101010', (INS_UASX, 'uasx', pdp_32, IF_THUMB32)),\n+ ('111110101110', (INS_USAX, 'usax', pdp_32, IF_THUMB32)),\n+ ('111110101101', (INS_USUB16, 'usub16', pdp_32, IF_THUMB32)),\n+ ('111110101000', (INS_UADD8, 'uadd8', pdp_32, IF_THUMB32)),\n+ ('111110101100', (INS_USUB8, 'usub8', pdp_32, IF_THUMB32)),\n+ ('111110101001', (INS_UADD16, 'uadd16', pdp_32, IF_THUMB32)),\n+ ('111110101001', (INS_UADD16, 'uadd16', pdp_32, IF_THUMB32)),\n+ ('111110101001', (INS_UADD16, 'uadd16', pdp_32, IF_THUMB32)),\n+ ('111110101001', (INS_UADD16, 'uadd16', pdp_32, IF_THUMB32)),\n+ ('111110101001', (INS_UADD16, 'uadd16', pdp_32, IF_THUMB32)),\n('111110110001', (INS_SMUL, 'smul', smul_32, IF_THUMB32)),\n#('11111', (85,'branchmisc', branch_misc, IF_THUMB32)),\n#('11111', (85,'SOMETHING WICKED THIS WAY', dp_bin_imm_32, IF_THUMB32)),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
more code-flow improvements, added instructions
|
718,770 |
21.01.2017 03:45:50
| 18,000 |
3646d06280accac693c7144343d4e4e25dc5432a
|
have to rework thumb16 parsers to allow handing back instruction flags, else we can't hand back IF_NOFALL, etc...
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -37,7 +37,7 @@ class simpleops:\noval = shmaskval(value, shval, mask)\noper = OperType[otype]((value >> shval) & mask, va=va)\nret.append( oper )\n- return ret\n+ return (ret), None\n#imm5_rm_rd = simpleops((O_REG, 0, 0x7), (O_REG, 3, 0x7), (O_IMM, 6, 0x1f))\nrm_rn_rd = simpleops((O_REG, 0, 0x7), (O_REG, 3, 0x7), (O_REG, 6, 0x7))\n@@ -59,7 +59,7 @@ def d1_rm4_rd3(va, value):\nrdbit = shmaskval(value, 4, 0x8)\nrd = shmaskval(value, 0, 0x7) + rdbit\nrm = shmaskval(value, 3, 0xf)\n- return ArmRegOper(rd, va=va),ArmRegOper(rm, va=va)\n+ return (ArmRegOper(rd, va=va),ArmRegOper(rm, va=va)), None\ndef rm_rn_rt(va, value):\nrt = shmaskval(value, 0, 0x7) # target\n@@ -67,7 +67,7 @@ def rm_rn_rt(va, value):\nrm = shmaskval(value, 6, 0x7) # offset\noper0 = ArmRegOper(rt, va=va)\noper1 = ArmRegOffsetOper(rn, rm, va, pubwl=0x18)\n- return oper0,oper1\n+ return (oper0,oper1), None\ndef imm54_rn_rt(va, value):\nimm = shmaskval(value, 4, 0x7c)\n@@ -75,7 +75,7 @@ def imm54_rn_rt(va, value):\nrt = shmaskval(value, 0, 0x7)\noper0 = ArmRegOper(rt, va=va)\noper1 = ArmImmOffsetOper(rn, imm, (va&0xfffffffc)+4, pubwl=0x18)\n- return oper0,oper1\n+ return (oper0,oper1), None\ndef imm55_rn_rt(va, value):\nimm = shmaskval(value, 5, 0x3e)\n@@ -83,7 +83,7 @@ def imm55_rn_rt(va, value):\nrt = shmaskval(value, 0, 0x7)\noper0 = ArmRegOper(rt, va=va)\noper1 = ArmImmOffsetOper(rn, imm, (va&0xfffffffc)+4, pubwl=0x18)\n- return oper0,oper1\n+ return (oper0,oper1), None\ndef imm56_rn_rt(va, value):\nimm = shmaskval(value, 6, 0x1f)\n@@ -91,7 +91,7 @@ def imm56_rn_rt(va, value):\nrt = shmaskval(value, 0, 0x7)\noper0 = ArmRegOper(rt, va=va)\noper1 = ArmImmOffsetOper(rn, imm, (va&0xfffffffc)+4, pubwl=0x18)\n- return oper0,oper1\n+ return (oper0,oper1), None\ndef rd_sp_imm8(va, value): # add\nrd = shmaskval(value, 8, 0x7)\n@@ -99,7 +99,7 @@ def rd_sp_imm8(va, value): # add\noper0 = ArmRegOper(rd, va=va)\n# pre-compute PC relative addr\noper1 = ArmImmOffsetOper(REG_SP, imm, (va&0xfffffffc)+4, pubwl=0x18)\n- return oper0,oper1\n+ return (oper0,oper1), None\ndef rd_pc_imm8(va, value): # add\nrd = shmaskval(value, 8, 0x7)\n@@ -107,14 +107,14 @@ def rd_pc_imm8(va, value): # add\noper0 = ArmRegOper(rd, va=va)\n# pre-compute PC relative addr\noper1 = ArmImmOper((va&0xfffffffc) + 4 + imm)\n- return oper0,oper1\n+ return (oper0,oper1), None\ndef rt_pc_imm8(va, value): # ldr\nrt = shmaskval(value, 8, 0x7)\nimm = e_bits.signed((value & 0xff), 1) << 2\noper0 = ArmRegOper(rt, va=va)\noper1 = ArmImmOffsetOper(REG_PC, imm, (va&0xfffffffc))\n- return oper0,oper1\n+ return (oper0,oper1), None\nbanked_regs = (\n@@ -392,12 +392,12 @@ def branch_misc(va, val, val2): # bl and misc control\ndef pc_imm11(va, value): # b\nimm = e_bits.signed(((value & 0x7ff)<<1), 3)\noper0 = ArmPcOffsetOper(imm, va=va)\n- return oper0,\n+ return (oper0,), None\ndef pc_imm8(va, value): # b\nimm = e_bits.signed(shmaskval(value, 0, 0xff), 1) * 2\noper0 = ArmPcOffsetOper(imm, va=va)\n- return oper0,\n+ return (oper0,), None\ndef ldmia(va, value):\nrd = shmaskval(value, 8, 0x7)\n@@ -405,14 +405,14 @@ def ldmia(va, value):\noper0 = ArmRegOper(rd, va=va)\noper1 = ArmRegListOper(reg_list)\noper0.oflags |= OF_W\n- return oper0,oper1\n+ return (oper0,oper1), None\ndef sp_sp_imm7(va, value):\nimm = shmaskval(value, 0, 0x7f)\no0 = ArmRegOper(REG_SP)\no1 = ArmRegOper(REG_SP)\no2 = ArmImmOper(imm*4)\n- return o0,o1,o2\n+ return (o0,o1,o2), None\ndef rm_reglist(va, value):\nrm = shmaskval(value, 8, 0x7)\n@@ -420,21 +420,21 @@ def rm_reglist(va, value):\noper0 = ArmRegOper(rm, va=va)\noper1 = ArmRegListOper(reglist)\noper0.oflags |= OF_W\n- return oper0,oper1\n+ return (oper0,oper1), None\n-def pop_reglist_32(va, value, val2):\n+def pop_reglist(va, value):\nflags = 0\nreglist = (value & 0xff) | ((value & 0x100)<<7)\noper0 = ArmRegListOper(reglist)\nif reglist & 0x8000:\nflags |= envi.IF_NOFALL\n- return None, None, (oper0,), flags, 0\n+ return (oper0,), flags\ndef push_reglist(va, value):\nreglist = (value & 0xff) | ((value & 0x100)<<6)\noper0 = ArmRegListOper(reglist)\n- return (oper0,)\n+ return (oper0,), None\ndef imm5_rm_rd(va, value):\nrd = value & 0x7\n@@ -445,7 +445,7 @@ def imm5_rm_rd(va, value):\noper0 = ArmRegOper(rd, va)\noper1 = ArmRegShiftImmOper(rm, stype, imm5, va)\n- return (oper0, oper1,)\n+ return (oper0, oper1,), None\ndef i_imm5_rn(va, value):\n@@ -453,7 +453,7 @@ def i_imm5_rn(va, value):\nrn = value & 0x7\noper0 = ArmRegOper(rn, va)\noper1 = ArmPcOffsetOper(imm5, va)\n- return (oper0, oper1,)\n+ return (oper0, oper1,), None\ndef ldm16(va, value):\nraise Exception(\"32bit wrapping of 16bit instruction... and it's not implemented\")\n@@ -1611,7 +1611,7 @@ thumb_base = [\n('1011101011', (63,'revsh', rn_rdm, 0)), # REVSH Rd, Rn\n('101100000', (INS_ADD,'add', sp_sp_imm7, 0)), # ADD<c> SP,SP,#<imm>\n('101100001', (INS_SUB,'sub', sp_sp_imm7, 0)), # SUB<c> SP,SP,#<imm>\n- ('1011110', (66,'pop', pop_reglist_32, IF_THUMB32)), # POP<c> <registers>\n+ ('1011110', (66,'pop', pop_reglist, 0)), # POP<c> <registers>\n('10111110', (67,'bkpt', imm8, 0)), # BKPT <blahblah>\n# Load / Store Mu64iple\n('11000', (68,'stm', rm_reglist, IF_IA|IF_W)), # LDMIA Rd!, reg_list\n@@ -1932,7 +1932,10 @@ class ThumbDisasm:\n# print \"OPLEN: \", oplen\nelse:\n- olist = opermkr(va+4, val)\n+ olist, nflags = opermkr(va+4, val)\n+ if nflags != None:\n+ flags = nflags\n+ print \"FLAGS: \", repr(olist), repr(flags)\noplen = 2\n# print \"OPLEN (16bit): \", oplen\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
have to rework thumb16 parsers to allow handing back instruction flags, else we can't hand back IF_NOFALL, etc...
|
718,770 |
23.01.2017 11:10:35
| 18,000 |
6d9440b01c854d3c23929260e1e19153cb11d01a
|
fix: Thumb CMP decode T2
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -578,8 +578,11 @@ dp_secondary = (\n'cmn', #add\nNone, # adc\nNone, # sbc\n+ None,\n+ None,\n'cmp', #sub\n- None\n+ None,\n+ None,\n)\ndef dp_mod_imm_32(va, val1, val2):\nif val2 & 0x8000:\n@@ -604,13 +607,14 @@ def dp_mod_imm_32(va, val1, val2):\nif Rd==15 and S:\n#raise Exception(\"dp_mod_imm_32 - FIXME: secondary dp encoding\")\ndpop = (val1>>5) & 0xf\n- if dp_secondary[dpop] == None:\n+ mnem = dp_secondary[dpop]\n+ if mnem == None:\nraise Exception(\"dp_mod_imm_32: Rd==15, S, but dpop doesn't have a secondary! va:%x, %x%x\" % (va, val1, val2))\noper1 = ArmRegOper(Rn)\noper2 = ArmImmOper(const)\nopers = (oper1, oper2)\n- return 0, None, opers, flags, 0\n+ return 0, mnem, opers, flags, 0\noper0 = ArmRegOper(Rd)\noper1 = ArmRegOper(Rn)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
fix: Thumb CMP decode T2
|
718,770 |
23.01.2017 16:31:56
| 18,000 |
65366e73c59f45ec9e9dca88ec5a6cd48d28c0f6
|
further improvements to arm/thumb
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/const.py",
"new_path": "envi/archs/arm/const.py",
"diff": "@@ -65,7 +65,7 @@ ARCH_REVS['thumbee'] = REV_THUMBEE\nARCH_REVSLEN = len(ARCH_REVS)\n#IFLAGS - keep bottom 8-bits for cross-platform flags like envi.IF_NOFALL and envi.IF_BRFALL\n-IF_PSR_S = 1<<32 # This DP instruciton can update CPSR\n+IF_PSR_S = 1<<32 # This DP instruciton can update CPSR (as in, add vs. adds)\nIF_B = 1<<33 # Byte\nIF_H = 1<<35 # HalfWord\nIF_S = 1<<36 # Signed #(not to be confused with IF_PSR_S which is the \"update status\" flag.\n@@ -483,6 +483,12 @@ instrnames = [\n'INS_USUB8',\n'INS_UASX',\n'INS_USAX',\n+ 'INS_NOP',\n+ 'INS_YIELD',\n+ 'INS_WFE',\n+ 'INS_WFI',\n+ 'INS_SEV',\n+ 'INS_CPS',\n]\nins_index = 85\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -152,12 +152,22 @@ banked_regs = (\n( REG_OFFSET_HYP + 13,),\n)\n+cpsh_mnems = {\n+ 0: (INS_NOP, 'nop',),\n+ 1: (INS_YIELD, 'yielD',),\n+ 2: (INS_WFE, 'wfe',),\n+ 3: (INS_WFI, 'wfi',),\n+ 4: (INS_SEV, 'sev',),\n+ }\n+\ndef branch_misc(va, val, val2): # bl and misc control\nop = (val >> 4) & 0b1111111\nop1 = (val2 >> 12) & 0b111\nop2 = (val2 >> 8) & 0b1111\nimm8 = val2 & 0b1111\n+ print hex(va), hex(val), hex(val2), bin(op), bin(op1), bin(op2)\n+\nif (op1 & 0b101 == 0):\nif not (op & 0b111000) == 0b111000: # T3 encoding - conditional\ncond = (val>>6) & 0xf\n@@ -236,7 +246,7 @@ def branch_misc(va, val, val2): # bl and misc control\nArmRegOper(REG_LR),\nArmImmOper(imm8),\n)\n- return None, 'sub', opers, IF_S, 0\n+ return None, 'sub', opers, IF_PSR_S, 0\nreturn None, 'eret', tuple(), IF_RET, 0 # should this have some other flag?\nprint \"TEST ME: branch_misc subsection 3\"\n@@ -272,7 +282,44 @@ def branch_misc(va, val, val2): # bl and misc control\nraise Exception(\"FIXME: MSR(register) p B9-1968\")\nelif op == 0b0111010:\n- raise Exception(\"FIXME: Change processor state ad hints p A6-234\")\n+ flags = 0\n+\n+ op1 = (val2>>8) & 7\n+ op2 = val2 & 0xff\n+ if op1:\n+ opcode = INS_CPS\n+ mnem = 'cps'\n+\n+ imod = (val2>>9) & 3 # enable = 0b10, disable = 0b11\n+ m = (val2>>8) & 1 # change mode\n+ aif = (val2>>5) & 7\n+ mode = val2 & 0x1f\n+\n+ if (mode and m==0):\n+ raise Exception(\"CPS with invalid flags set: UNPREDICTABLE (mode and not m)\")\n+\n+ if ((imod & 2) and not (aif)) or \\\n+ (not (imod & 2) and (aif)):\n+ raise Exception(\"CPS with invalid flags set: UNPREDICTABLE imod enable but not a/i/f\")\n+\n+ if not (imod or m):\n+ # hint\n+ mnem = \"CPS Hint... no clue yet. fix me\"\n+\n+ if imod & 2:\n+ opers = [\n+ ArmCPSFlagsOper(aif) # if mode is set...\n+ ]\n+ else:\n+ opers = []\n+ if m:\n+ opers.append(ArmImmOper(mode))\n+\n+ else:\n+ opcode, mnem = cpsh_mnems.get(op2, (INS_DEBUGHINT, 'dbg'))\n+\n+ #raise Exception(\"FIXME: Change processor state ad hints p A6-234\")\n+ return opcode, mnem, opers, flags, 0\nelif op == 0b0111011:\nraise Exception(\"FIXME: Misc control instrs p A6-235\")\n@@ -287,7 +334,7 @@ def branch_misc(va, val, val2): # bl and misc control\nArmRegOper(REG_LR),\nArmImmOper(imm8),\n)\n- return None, 'sub', opers, IF_S, 0\n+ return None, 'sub', opers, IF_PSR_S, 0\nelif op == 0b0111110:\nRd = (val2 >> 8) & 0xf\n@@ -600,7 +647,7 @@ def dp_mod_imm_32(va, val1, val2):\nconst = val2 & 0xff\nif S:\n- flags |= IF_S\n+ flags |= IF_PSR_S\nconst,carry = ThumbExpandImm_C(imm4, const, 0)\n@@ -622,8 +669,41 @@ def dp_mod_imm_32(va, val1, val2):\nopers = (oper0, oper1, oper2)\nreturn None, None, opers, flags, 0\n+def shift_or_ext_32(va, val1, val2):\n+ if (val2 & 0xf000) != 0xf000:\n+ raise Exception(\"pdp_32 needs to hand off for val2 & 0xf000 != 0xf000 at va 0x%x: val1:%.4x val2:%.4x\" % (va, val1, val2))\n+\n+ op2 = (val2>>4) & 0xf\n+ if (op2):\n+ raise Exception(\"Implement Me: Extended and Add stuff\")\n+\n+ else:\n+ # lsl/lsr/asr/ror\n+ flags = 0\n+ op1 = (val1>>4) & 0xf\n+ opcode, mnem, nothing = mov_ris_ops[op1>>1]\n+\n+ rn = (val1 & 0xf)\n+ rd = (val2 >> 8) & 0xf\n+ rm = (val2 & 0xf)\n+\n+ opers = (\n+ ArmRegOper(rd),\n+ ArmRegOper(rn),\n+ ArmRegOper(rm),\n+ )\n+\n+ if (op1 & 1):\n+ flags |= IF_PSR_S\n+ return opcode, mnem, opers, flags, 0\n+\n+\ndef pdp_32(va, val1, val2):\n+ # saturated instructions\n+ raise Exception(\"Implement Me: pdp32: Saturated Instrs\")\n+ pass\n+\nreturn None, None, None, None, None\ndef dp_bin_imm_32(va, val1, val2):\n@@ -850,7 +930,7 @@ def mov_reg_imm_shift_32(va, val1, val2):\nelse:\nopcode, mnem, opcnt = mov_ris_ops[optype]\nif s:\n- flags = IF_S\n+ flags = IF_PSR_S\nelse:\nflags = 0\n@@ -947,7 +1027,7 @@ def dp_shift_32(va, val1, val2):\nopers = (oper0, oper1, oper2)\nif s:\n- flags = IF_S\n+ flags = IF_PSR_S\nreturn opcode, mnem, opers, flags, 0\n@@ -985,7 +1065,7 @@ def dp_mod_imm_32_deprecated(va, val1, val2):\nopers = (oper0, oper1, oper2)\nif s:\n- flags = IF_S\n+ flags = IF_PSR_S\nelse:\nflags = 0\n@@ -1811,6 +1891,10 @@ thumb2_extension = [\n('111110001001', (INS_LDRB, 'ldrb', ldr_32, IF_THUMB32)),\n('111110001000', (INS_STRB, 'strb', ldr_32, IF_THUMB32)),\n('111110000000', (INS_STRB, 'strb', ldr_puw_32, IF_THUMB32)),\n+ ('11111010001', (INS_LSL, 'lsl', shift_or_ext_32, IF_THUMB32)),\n+ ('11111010010', (INS_LSR, 'lsr', shift_or_ext_32, IF_THUMB32)),\n+ ('11111010011', (INS_ASR, 'asr', shift_or_ext_32, IF_THUMB32)),\n+ ('11111010100', (INS_ROR, 'ror', shift_or_ext_32, IF_THUMB32)),\n('111110101001', (INS_UADD16, 'uadd16', pdp_32, IF_THUMB32)), # FIXME: overlapping with saturating instructions\n('111110101010', (INS_UASX, 'uasx', pdp_32, IF_THUMB32)),\n('111110101110', (INS_USAX, 'usax', pdp_32, IF_THUMB32)),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
further improvements to arm/thumb
|
718,770 |
23.01.2017 16:38:30
| 18,000 |
870df665fef470bcb0f05077e0bc9c349f72d055
|
codeflow pointer reads
|
[
{
"change_type": "MODIFY",
"old_path": "envi/codeflow.py",
"new_path": "envi/codeflow.py",
"diff": "@@ -177,10 +177,11 @@ class CodeFlowContext(object):\ntry:\n# Handle a table branch by adding more branches...\n+ ptrfmt = ('<P', '>P')[self._mem.getEndian()]\nif bflags & envi.BR_TABLE:\nif self._cf_exptable:\nptrbase = bva\n- bdest = self._mem.readMemoryFormat(ptrbase, '<P')[0]\n+ bdest = self._mem.readMemoryFormat(ptrbase, ptrfmt)[0]\ntabdone = {}\nwhile self._mem.isValidPointer(bdest):\n@@ -192,7 +193,7 @@ class CodeFlowContext(object):\nbranches.append((bdest, envi.BR_COND))\nptrbase += self._mem.psize\n- bdest = self._mem.readMemoryFormat(ptrbase, '<P')[0]\n+ bdest = self._mem.readMemoryFormat(ptrbase, ptrfmt)[0]\ncontinue\nif bflags & envi.BR_DEREF:\n@@ -204,7 +205,7 @@ class CodeFlowContext(object):\nif self._cf_noret.get( bva ):\nself.addNoFlow( va, va + len(op) )\n- bva = self._mem.readMemoryFormat(bva, '<P')[0]\n+ bva = self._mem.readMemoryFormat(bva, ptrfmt)[0]\nif not self._mem.probeMemory(bva, 1, e_mem.MM_EXEC):\ncontinue\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
codeflow pointer reads
|
718,770 |
23.01.2017 16:51:31
| 18,000 |
137920007ced41c8a81d5b1fd61d48d1a62c1457
|
big endianness spread throughout the memory ecosystem.
|
[
{
"change_type": "MODIFY",
"old_path": "envi/__init__.py",
"new_path": "envi/__init__.py",
"diff": "@@ -743,33 +743,23 @@ class Emulator(e_reg.RegisterContext, e_mem.MemoryObject):\n\"\"\"\nReturns the value of the bytes at the \"addr\" address, given the size (currently, power of 2 only)\n\"\"\"\n- #FIXME: Handle endianness\nbytes = self.readMemory(addr, size)\nif bytes == None:\nreturn None\nif len(bytes) != size:\nraise Exception(\"Read Gave Wrong Length At 0x%.8x (va: 0x%.8x wanted %d got %d)\" % (self.getProgramCounter(),addr, size, len(bytes)))\n- if size == 1:\n- return struct.unpack(\"B\", bytes)[0]\n- elif size == 2:\n- return struct.unpack(\">H\", bytes)[0]\n- elif size == 4:\n- return struct.unpack(\">L\", bytes)[0]\n- elif size == 8:\n- return struct.unpack(\">Q\", bytes)[0]\n+\n+ fmttbl = e_bits.fmt_chars[self.getEndian()]\n+ return struct.unpack(fmttbl[size], bytes)[0]\ndef writeMemValue(self, addr, value, size):\n#FIXME change this (and all uses of it) to passing in format...\n#FIXME: Remove byte check and possibly half-word check. (possibly all but word?)\n- #FIXME: Handle endianness\n- if size == 1:\n- bytes = struct.pack(\"B\",value & 0xff)\n- elif size == 2:\n- bytes = struct.pack(\">H\",value & 0xffff)\n- elif size == 4:\n- bytes = struct.pack(\">L\", value & 0xffffffff)\n- elif size == 8:\n- bytes = struct.pack(\">Q\", value & 0xffffffffffffffff)\n+ mask = e_bits.umaxes[size]\n+ fmttbl = e_bits.fmt_chars[self.getEndian()]\n+\n+ bytes = struct.pack(fmttbl[size], value & mask)\n+\nself.writeMemory(addr, bytes)\ndef readMemSignedValue(self, addr, size):\n@@ -778,12 +768,8 @@ class Emulator(e_reg.RegisterContext, e_mem.MemoryObject):\nbytes = self.readMemory(addr, size)\nif bytes == None:\nreturn None\n- if size == 1:\n- return struct.unpack(\"b\", bytes)[0]\n- elif size == 2:\n- return struct.unpack(\">h\", bytes)[0]\n- elif size == 4:\n- return struct.unpack(\">l\", bytes)[0]\n+ fmttbl = e_bits.fmt_schars[self.getEndian()]\n+ return struct.unpack(fmttbl[size], bytes)[0]\ndef integerSubtraction(self, op, sidx=0, midx=1):\n\"\"\"\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/bits.py",
"new_path": "envi/bits.py",
"diff": "@@ -137,8 +137,18 @@ def is_aux_carry(src, dst):\ndef is_aux_carry_sub(src, dst):\nreturn src & 0xf > dst & 0xf\n+# set of format lists which make size, endianness, and signedness fast and easy\nle_fmt_chars = (None,\"B\",\"<H\",None,\"<I\",None,None,None,\"<Q\")\nbe_fmt_chars = (None,\"B\",\">H\",None,\">I\",None,None,None,\">Q\")\n+\n+fmt_chars = (le_fmt_chars, be_fmt_chars)\n+\n+le_fmt_schars = (None,\"b\",\"<h\",None,\"<i\",None,None,None,\"<q\")\n+be_fmt_schars = (None,\"b\",\">h\",None,\">i\",None,None,None,\">q\")\n+\n+fmt_schars = (le_fmt_schars, be_fmt_schars)\n+\n+\ndef parsebytes(bytes, offset, size, sign=False, bigend=False):\n\"\"\"\nMostly for pulling immediates out of strings...\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/memory.py",
"new_path": "envi/memory.py",
"diff": "@@ -3,6 +3,7 @@ import struct\nimport collections\nimport envi\n+import envi.bits as e_bits\n\"\"\"\nA module containing memory utilities and the definition of the\n@@ -164,17 +165,13 @@ class IMemory:\nbytes = self.readMemory(addr, size)\nif bytes == None:\nreturn None\n+\n#FIXME change this (and all uses of it) to passing in format...\nif len(bytes) != size:\nraise Exception(\"Read Gave Wrong Length At 0x%.8x (va: 0x%.8x wanted %d got %d)\" % (self.getProgramCounter(),addr, size, len(bytes)))\n- if size == 1:\n- return struct.unpack(\"B\", bytes)[0]\n- elif size == 2:\n- return struct.unpack(\"<H\", bytes)[0]\n- elif size == 4:\n- return struct.unpack(\"<I\", bytes)[0]\n- elif size == 8:\n- return struct.unpack(\"<Q\", bytes)[0]\n+\n+ fmttbl = (e_bits.le_fmt_chars, e_bits.be_fmt_chars)[self.getEndian()]\n+ return struct.unpack(fmttbl[size], bytes)[0]\ndef readMemoryPtr(self, va):\n'''\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/tools/graphutil.py",
"new_path": "vivisect/tools/graphutil.py",
"diff": "@@ -468,7 +468,12 @@ def buildFunctionGraph(vw, fva, revloop=False, g=None):\ng.addNode(nid=cbva, cbva=cbva, cbsize=cbsize, color=bcolor)\n# Grab the location for the last instruction in the block\n- lva, lsize, ltype, linfo = vw.getLocation(cbva+cbsize-1)\n+ nextva = cbva+cbsize-1\n+ loc = vw.getLocation(nextva)\n+ if loc == None:\n+ raise Exception(\"buildFunctionGraph: Attempt to get location at 0x%x\" % nextva)\n+\n+ lva, lsize, ltype, linfo = loc\nfor xrfrom, xrto, xrtype, xrflags in vw.getXrefsFrom(lva, vivisect.REF_CODE):\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
big endianness spread throughout the memory ecosystem.
|
718,770 |
23.01.2017 16:59:37
| 18,000 |
4f6283e6ebd4b2f1b14d155bb9368a46c465618f
|
add a helper to location errors in buildFunctionGraph
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/tools/graphutil.py",
"new_path": "vivisect/tools/graphutil.py",
"diff": "@@ -468,7 +468,12 @@ def buildFunctionGraph(vw, fva, revloop=False, g=None):\ng.addNode(nid=cbva, cbva=cbva, cbsize=cbsize, color=bcolor)\n# Grab the location for the last instruction in the block\n- lva, lsize, ltype, linfo = vw.getLocation(cbva+cbsize-1)\n+ nextva = cbva+cbsize-1\n+ loc = vw.getLocation(nextva)\n+ if loc == None:\n+ raise Exception(\"buildFunctionGraph: Attempt to get location at 0x%x\" % nextva)\n+\n+ lva, lsize, ltype, linfo = loc\nfor xrfrom, xrto, xrtype, xrflags in vw.getXrefsFrom(lva, vivisect.REF_CODE):\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
add a helper to location errors in buildFunctionGraph
|
718,770 |
25.01.2017 09:35:02
| 18,000 |
345c455d69987a2d6567b89cec8964bdd64bd8f9
|
cps and other bug fixes, added emulation, unittesting
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/const.py",
"new_path": "envi/archs/arm/const.py",
"diff": "@@ -75,6 +75,10 @@ IF_T = 1<<39 # Translate for strbt - denotes ldr/str command runs in\nIF_W = 1<<40 # Write Back for STM/LDM (!)\nIF_UM = 1<<41 # User Mode Registers for STM/LDM (^) (obviously no R15)\nIF_PSR_S_SIL = 1<<42 # Flag for Silent S. Related to IF_PSR_S and will prevent S from being rendered. TST, TEQ, CMN, CMP commands.\n+IF_IE = 1<<43 # Interrupt Enable flag (used for CPS instruction)\n+IF_ID = 1<<44 # Interrupt Disable flag (used for CPS instruction)\n+\n+IF_THUMB32 = 1<<50 # thumb32\nIF_DAIB_SHFT = 56 # shift-bits to get DAIB bits down to 0. this chops off the \"is DAIB present\" bit that the following store.\nIF_DAIB_MASK = 7<<(IF_DAIB_SHFT-1)\n@@ -84,7 +88,6 @@ IF_DB = 5<<(IF_DAIB_SHFT-1) # Decrement Before\nIF_IB = 7<<(IF_DAIB_SHFT-1) # Increment Before\nIF_DAIB_B = 5<<(IF_DAIB_SHFT-1) # Before mask\nIF_DAIB_I = 3<<(IF_DAIB_SHFT-1) # Before mask\n-IF_THUMB32 = 1<<50 # thumb32\nIFS_VQ = 1<<1 # Adv SIMD: operation uses saturating arithmetic\nIFS_VR = 1<<2 # Adv SIMD: operation performs rounding\n@@ -489,6 +492,8 @@ instrnames = [\n'INS_WFI',\n'INS_SEV',\n'INS_CPS',\n+ 'INS_CBZ',\n+ 'INS_CBNZ',\n]\nins_index = 85\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -1401,7 +1401,6 @@ def p_swint(opval, va):\nopcode = IENC_SWINT << 16 + 1\nreturn (opcode, \"svc\", olist, 0, 0)\n-cps_mnem = (\"cps\",\"cps FAIL-bad encoding\",\"cpsie\",\"cpsid\")\nmcrr2_mnem = (\"mcrr2\", \"mrrc2\")\nldc2_mnem = (\"stc2\", \"ldc2\",)\nmcr2_mnem = (\"mcr2\", \"mrc2\")\n@@ -1418,23 +1417,33 @@ def p_uncond(opval, va, psize = 4):\nif optop == 0:\nif opval & 0xfff10020 == 0xf1000000:\n#cps\n+ iflags = 0\n+ mnem = 'cps'\n+ opcode = INS_CPS\n+\nimod = (opval>>18)&3\nmmod = (opval>>17)&1\n- aif = (opval>>5)&7\n+ aif = (opval>>6)&7\nmode = opval&0x1f\n- mnem = cps_mnem[imod]\nif imod & 2:\nolist = [\nArmCPSFlagsOper(aif) # if mode is set...\n]\n+\n+ if imod & 1: # interrupt disable\n+ iflags |= IF_ID\n+\n+ else: # interrupt enable\n+ iflags |= IF_IE\n+\nelse:\nolist = []\n+\nif mmod:\nolist.append(ArmImmOper(mode))\n- opcode = IENC_UNCOND_CPS + imod\n- return (opcode, mnem, olist, 0, 0)\n+ return (opcode, mnem, olist, iflags, 0)\nelif (opval & 0xffff00f0) == 0xf1010000:\n#setend\ne = (opval>>9) & 1\n@@ -2614,11 +2623,11 @@ class ArmOpcode(envi.Opcode):\nif self.prefixes != COND_AL:\nflags |= envi.BR_COND\n- if self.opcode in ( INS_B, INS_BX, INS_BL, INS_BLX, INS_BCC ):\n+ if self.opcode in ( INS_B, INS_BX, INS_BL, INS_BLX, INS_BCC, INS_CBZ, INS_CBNZ ):\noper = self.opers[0]\n# check for location being ODD\n- operval = oper.getOperValue(self)\n+ operval = oper.getOperValue(self, emu)\nif operval == None:\n# probably a branch to a register. just return.\nreturn ret\n@@ -2671,6 +2680,10 @@ class ArmOpcode(envi.Opcode):\nmnem += 'h'\nif self.iflags & IF_T: # removed el\nmnem += 't'\n+ if self.iflags & IF_IE:\n+ mnem += 'ie'\n+ elif self.iflags & IF_ID:\n+ mnem += 'id'\nif self.simdflags:\nif self.simdflags & IFS_S32F64:\n@@ -2777,6 +2790,10 @@ class ArmOpcode(envi.Opcode):\nmnem += 'h'\nif self.iflags & IF_T: #removed el\nmnem += 't'\n+ if self.iflags & IF_IE:\n+ mnem += 'ie'\n+ elif self.iflags & IF_ID:\n+ mnem += 'id'\nif self.simdflags:\nif self.simdflags & IFS_S32F64:\n@@ -3896,7 +3913,15 @@ class ArmBarrierOption(ArmOperand):\ndef repr(self, op):\nreturn self.retOption()\n+class ArmCPSFlagsOper(ArmOperand):\n+ def __init__(self, flags):\n+ self.flags = flags\n+\n+ def repr(self, op):\n+ flags = [AIF_FLAGS[x] for x in range(3) if self.flags & (1<<x)]\n+ return ','.join(flags)\n+AIF_FLAGS = ('a','i','f')[::-1]\nENDIAN_LSB = 0\nENDIAN_MSB = 1\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/emu.py",
"new_path": "envi/archs/arm/emu.py",
"diff": "@@ -1033,6 +1033,12 @@ class ArmEmulator(ArmModule, ArmRegisterContext, envi.Emulator):\nif regval:\nreturn imm32\n+ def i_tb(self, op):\n+ # TBB and TBH both come here.\n+ tblbase = op.getOperValue(0)\n+ off = op.getOperValue(1)\n+ return tblbase + (2*off)\n+\ndef i_umull(self, op):\nprint(\"FIXME: 0x%x: %s - in emu\" % (op.va, op))\ndef i_umlal(self, op):\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -154,7 +154,7 @@ banked_regs = (\ncpsh_mnems = {\n0: (INS_NOP, 'nop',),\n- 1: (INS_YIELD, 'yielD',),\n+ 1: (INS_YIELD, 'yield',),\n2: (INS_WFE, 'wfe',),\n3: (INS_WFI, 'wfi',),\n4: (INS_SEV, 'sev',),\n@@ -304,12 +304,14 @@ def branch_misc(va, val, val2): # bl and misc control\nif not (imod or m):\n# hint\n- mnem = \"CPS Hint... no clue yet. fix me\"\n+ mnem = \"CPS Hint... fix me\"\nif imod & 2:\nopers = [\nArmCPSFlagsOper(aif) # if mode is set...\n]\n+ flags |= (IF_IE, IF_ID)[imod&1]\n+\nelse:\nopers = []\nif m:\n@@ -505,6 +507,16 @@ def i_imm5_rn(va, value):\ndef ldm16(va, value):\nraise Exception(\"32bit wrapping of 16bit instruction... and it's not implemented\")\n+def cps16(va, value):\n+ im = (value>>4) & 1\n+ aif = value & 0x7\n+\n+ opers = (\n+ ArmCPSFlagsOper(aif),\n+ )\n+ return opers, (IF_IE, IF_ID)[im]\n+\n+\ndef thumb32_01(va, val, val2):\nop = (val2>>15)&1\nop2 = (val>>4) & 0x7f\n@@ -899,10 +911,11 @@ def tb_ldrex_32(va, val1, val2):\nelse: # tbb/tbh\nmnem = 'tb'\nopcode = INS_TB\n+ isH = op3 & 1\n+ flags |= envi.IF_BRANCH\n- oper0 = ArmRegOper(rn, va=va)\n- oper1 = ArmRegOper(rm, va=va)\n- opers = (oper0, oper1)\n+ oper0 = ArmScaledOffsetOper(rn, rm, S_LSL, isH, va, pubwl=0x18)\n+ opers = (oper0,)\nreturn opcode, mnem, opers, flags, 0\n@@ -1685,11 +1698,11 @@ thumb_base = [\n('1011001011', (561,'uxtb', rm_rd, 0)), # UXTB<c> <Rd>, <Rm>\n('1011010', (56,'push', push_reglist, 0)), # PUSH <reglist>\n('10110110010', (57,'setend', sh4_imm1, 0)), # SETEND <endian_specifier>\n- ('10110110011', (58,'cps', simpleops(),0)), # CPS<effect> <iflags> FIXME\n- ('10110001', (59,'cbz', i_imm5_rn, 0)), # CBZ{<q>} <Rn>, <label> # label must be positive, even offset from PC\n- ('10111001', (60,'cbnz', i_imm5_rn, 0)), # CBNZ{<q>} <Rn>, <label> # label must be positive, even offset from PC\n- ('10110011', (59,'cbz', i_imm5_rn, 0)), # CBZ{<q>} <Rn>, <label> # label must be positive, even offset from PC\n- ('10111011', (60,'cbnz', i_imm5_rn, 0)), # CBNZ{<q>} <Rn>, <label> # label must be positive, even offset from PC\n+ ('10110110011', (58,'cps', cps16,0)), # CPS<effect> <iflags>\n+ ('10110001', (INS_CBZ,'cbz', i_imm5_rn, envi.IF_COND | envi.IF_BRANCH)), # CBZ{<q>} <Rn>, <label> # label must be positive, even offset from PC\n+ ('10111001', (INS_CBNZ,'cbnz', i_imm5_rn, envi.IF_COND | envi.IF_BRANCH)), # CBNZ{<q>} <Rn>, <label> # label must be positive, even offset from PC\n+ ('10110011', (INS_CBZ,'cbz', i_imm5_rn, envi.IF_COND | envi.IF_BRANCH)), # CBZ{<q>} <Rn>, <label> # label must be positive, even offset from PC\n+ ('10111011', (INS_CBNZ,'cbnz', i_imm5_rn, envi.IF_COND | envi.IF_BRANCH)), # CBNZ{<q>} <Rn>, <label> # label must be positive, even offset from PC\n('1011101000', (61,'rev', rn_rdm, 0)), # REV Rd, Rn\n('1011101001', (62,'rev16', rn_rdm, 0)), # REV16 Rd, Rn\n('1011101011', (63,'revsh', rn_rdm, 0)), # REVSH Rd, Rn\n@@ -1841,6 +1854,7 @@ thumb2_extension = [\n('11101101', (85,'coproc simd', coproc_simd_32, IF_THUMB32)), # FIXME: not fully implemented\n('11101110', (85,'coproc simd', coproc_simd_32, IF_THUMB32)), # FIXME: not fully implemented\n('11101111', (85,'adv simd', adv_simd_32, IF_THUMB32)), # FIXME: not fully implemented\n+ ('1111110', (85,'coproc simd', coproc_simd_32, IF_THUMB32)), # FIXME: not fully implemented\n('11111110', (85,'coproc simd', coproc_simd_32, IF_THUMB32)), # FIXME: not fully implemented\n('11111111', (85,'adv simd', adv_simd_32, IF_THUMB32)), # FIXME: not fully implemented\n@@ -1889,6 +1903,7 @@ thumb2_extension = [\n('11110111110', (85,'ubfx', dp_bin_imm_32, IF_W | IF_THUMB32)),\n('11110111111', (85,'branchmisc', branch_misc, IF_THUMB32)),\n('111110001001', (INS_LDRB, 'ldrb', ldr_32, IF_THUMB32)),\n+ ('111110001100', (INS_STR, 'str', ldr_32, IF_THUMB32)),\n('111110001000', (INS_STRB, 'strb', ldr_32, IF_THUMB32)),\n('111110000000', (INS_STRB, 'strb', ldr_puw_32, IF_THUMB32)),\n('11111010001', (INS_LSL, 'lsl', shift_or_ext_32, IF_THUMB32)),\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_arm.py",
"new_path": "envi/tests/test_arch_arm.py",
"diff": "@@ -505,7 +505,7 @@ instrs = [\n(REV_ALL_ARM, '001000ea', 0x4560, 'b 0x00008568', 0, ()),\n(REV_ALL_ARM, 'ff4cc3e3', 0x4560, 'bic r4, r3, #0xff00', 0, ()),\n(REV_ALL_ARM, '001000eb', 0x4560, 'bl 0x00008568', 0, ()),\n- (REV_ALL_ARM, '001000fa', 0x4560, 'blx 0x00005568', 0, ()),\n+ (REV_ALL_ARM, '001000fa', 0x4560, 'blx 0x00008568', 0, ()),\n(REV_ALL_ARM, '273764ee', 0x4560, 'cdp p7, 6, cr3, cr4, cr7, 1', 0, ()),\n(REV_ALL_ARM, '473b34ee', 0x4560, 'cdp p11, 3, cr3, cr4, cr7, 2', 0, ()),\n(REV_ALL_ARM, 'ff0c74e3', 0x4560, 'cmn r4, #0xff00', 0, ()),\n@@ -1221,7 +1221,19 @@ instrs = [\n(REV_ALL_ARM, '3544f3f3', 0x4560, 'vsri.32 d20, d21, #0x0d', 0, ()),\n(REV_ALL_ARM, 'f3ff3544', 0x4561, 'vsri.32 d20, d21, #0x0d', 0, ()),\n(REV_ALL_ARM, 'f3ff3546', 0x4561, 'vqshlu.s32 d20, d21, #0x13', 0, ()), # from ODAWEB\n+ #\n+ (REV_ALL_ARM, '800008f1', 0x4560, 'cpsie i', IF_IE, ()),\n+ (REV_ALL_ARM, '00010cf1', 0x4560, 'cpsid a', IF_ID, ()),\n+ (REV_ALL_ARM, '1a010ef1', 0x4560, 'cpsid a, #0x1a', IF_ID, ()),\n+ (REV_ALL_ARM, '1a0002f1', 0x4560, 'cps #0x1a', 0, ()),\n# Following commands are THUMB commands\n+ (REV_ALL_ARM, '62b6', 0x4561, 'cpsie i', IF_IE, ()),\n+ (REV_ALL_ARM, '72b6', 0x4561, 'cpsid i', IF_IE, ()),\n+ (REV_ALL_ARM, 'aff34084', 0x4561, 'cpsie i', IF_IE, ()),\n+ (REV_ALL_ARM, 'aff38086', 0x4561, 'cpsid a', IF_ID, ()),\n+ (REV_ALL_ARM, 'aff39a87', 0x4561, 'cpsid a, #0x1a', IF_ID, ()),\n+ (REV_ALL_ARM, 'aff31a81', 0x4561, 'cps #0x1a', 0, ()),\n+\n]\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
cps and other bug fixes, added emulation, unittesting
|
718,770 |
25.01.2017 12:25:45
| 18,000 |
2be8930c5340bbc0cb5da79a74739d14b5c7bd6f
|
mega blx bug (ARM Unconditional encoding requires switch to THUMB, even though the address specified is even)
"swi" clean up to have all encodings translated to UAL 'svc'
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -1411,7 +1411,7 @@ def p_uncond(opval, va, psize = 4):\n# FIXME THIS IS HORKED\nopcode = IENC_SWINT << 16 + 2\nimmval = opval & 0x00ffffff\n- return (opcode, 'swi', (ArmImmOper(immval),), 0, 0)\n+ return (opcode, 'svc', (ArmImmOper(immval),), 0, 0)\noptop = ( opval >> 26 ) & 0x3\nif optop == 0:\n@@ -1546,7 +1546,7 @@ def p_uncond(opval, va, psize = 4):\n#blx\nmnem = \"blx\"\nh = (opval>>23) & 2\n- imm_offset = (e_bits.signed(opval, 3) << 2) | h\n+ imm_offset = (e_bits.signed(opval, 3) << 2) | h | 1 #this encoding forces THUMB\nolist = (\nArmPcOffsetOper(imm_offset, va),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
mega blx bug (ARM Unconditional encoding requires switch to THUMB, even though the address specified is even)
"swi" clean up to have all encodings translated to UAL 'svc'
|
718,770 |
25.01.2017 12:26:24
| 18,000 |
076aa652fb96657431ac62fb135a71188e8d8cdd
|
clean up debug message
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -166,8 +166,6 @@ def branch_misc(va, val, val2): # bl and misc control\nop2 = (val2 >> 8) & 0b1111\nimm8 = val2 & 0b1111\n- print hex(va), hex(val), hex(val2), bin(op), bin(op1), bin(op2)\n-\nif (op1 & 0b101 == 0):\nif not (op & 0b111000) == 0b111000: # T3 encoding - conditional\ncond = (val>>6) & 0xf\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
clean up debug message
|
718,770 |
26.01.2017 08:51:16
| 18,000 |
7b03d27ceb4e9af3a37d2add16a6d8f3da35a910
|
thumb misc control instructions
a little clean up
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/const.py",
"new_path": "envi/archs/arm/const.py",
"diff": "@@ -388,23 +388,6 @@ INS_BLX = IENC_UNCOND_BLX\nINS_SWI = IENC_SWINT\n-# FIXME: must fit these into the numbering scheme\n-INS_TB = 85\n-INS_LDREX = 85\n-INS_ORN = 85\n-INS_PKH = 85\n-INS_LSL = 85\n-INS_LSR = 85\n-INS_ASR = 85\n-INS_ROR = 85\n-INS_RRX = 85\n-#New commands for ARMV7 - need to be fitted too.\n-INS_DBG = 85\n-INS_BF = 85\n-INS_CLREX = IENC_UNCOND_PLD #FIXME\n-INS_DMB = IENC_UNCOND_PLD #FIXME\n-INS_DSB = IENC_UNCOND_PLD #FIXME\n-INS_ISB = IENC_UNCOND_PLD #FIXME\n#Opcodes still needed - put here as todo with others\n#dbg, movt, movw\n@@ -494,6 +477,24 @@ instrnames = [\n'INS_CPS',\n'INS_CBZ',\n'INS_CBNZ',\n+ 'INS_STRH',\n+ 'INS_LEAVEX',\n+ 'INS_ENTERX',\n+ 'INS_TB',\n+ 'INS_LDREX',\n+ 'INS_ORN',\n+ 'INS_PKH',\n+ 'INS_LSL',\n+ 'INS_LSR',\n+ 'INS_ASR',\n+ 'INS_ROR',\n+ 'INS_RRX',\n+ 'INS_DBG',\n+ 'INS_BF',\n+ 'INS_CLREX',\n+ 'INS_DMB',\n+ 'INS_DSB',\n+ 'INS_ISB',\n]\nins_index = 85\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -405,7 +405,7 @@ def p_misc1(opval, va): #\nArmRegOper(Rm, va=va),\n)\nelif opval & 0x0ff000f0 == 0x01200030:\n- #opcode = (IENC_MISC << 16) + 6\n+ # blx\nopcode = INS_BLX\nmnem = 'blx'\nRm = opval & 0xf\n@@ -1544,6 +1544,7 @@ def p_uncond(opval, va, psize = 4):\nelif (opval & 0xfe000000) == 0xfa000000:\n#blx\n+ opcode = INS_BLX\nmnem = \"blx\"\nh = (opval>>23) & 2\nimm_offset = (e_bits.signed(opval, 3) << 2) | h | 1 #this encoding forces THUMB\n@@ -1552,7 +1553,6 @@ def p_uncond(opval, va, psize = 4):\nArmPcOffsetOper(imm_offset, va),\n)\n- opcode = INS_BLX\nreturn (opcode, mnem, olist, envi.IF_CALL, 0)\nelse:\nraise envi.InvalidInstruction(\n@@ -3838,6 +3838,7 @@ class ArmCoprocRegOper(ArmOperand):\nclass ArmCoprocOption(ArmImmOffsetOper):\ndef __init__(self, base_reg, offset, va, pubwl=8):\n+ ArmImmOffsetOper.__init__(self, base_reg, offset, va, pubwl)\nself.base_reg = base_reg\nself.offset = offset\nself.pubwl = pubwl\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -160,6 +160,18 @@ cpsh_mnems = {\n4: (INS_SEV, 'sev',),\n}\n+misc_ctl_instrs = (\n+ (INS_LEAVEX, 'leavex', False),\n+ (INS_ENTERX, 'enterx', False),\n+ (INS_CLREX, 'clrex', False),\n+ None,\n+ (INS_DSB, 'dsb', True),\n+ (INS_DMB, 'dmb', True),\n+ (INS_ISB, 'isb', True),\n+ None,\n+)\n+\n+\ndef branch_misc(va, val, val2): # bl and misc control\nop = (val >> 4) & 0b1111111\nop1 = (val2 >> 12) & 0b111\n@@ -167,7 +179,7 @@ def branch_misc(va, val, val2): # bl and misc control\nimm8 = val2 & 0b1111\nif (op1 & 0b101 == 0):\n- if not (op & 0b111000) == 0b111000: # T3 encoding - conditional\n+ if not (op & 0b0111000) == 0b0111000: # T3 encoding - conditional\ncond = (val>>6) & 0xf\nopcode, mnem, nflags = bcc_ops.get(cond)\nflags = envi.IF_BRANCH | nflags\n@@ -188,6 +200,21 @@ def branch_misc(va, val, val2): # bl and misc control\noper0 = ArmPcOffsetOper(e_bits.signed(imm,4), va=va)\nreturn opcode, mnem, (oper0, ), flags, 0\n+ if op & 0b111 == 0b011:\n+ # miscellaneous control instructions\n+ opcode, mnem, barrier = misc_ctl_instrs[op]\n+\n+ if barrier:\n+ option = val2 & 0xf\n+ opers = (\n+ ArmBarrierOption(option),\n+ )\n+\n+ else:\n+ opers = ()\n+\n+ return opcode, mnem, opers, None, 0\n+\nif imm8 & 0b100000: # xx1xxxxx\nif (op & 0b1111110) == 0b0111000: # MSR (banked)\nR = (val >> 4) & 1\n@@ -407,11 +434,11 @@ def branch_misc(va, val, val2): # bl and misc control\nbytez=struct.pack(\"<H\", val)+struct.pack(\"<H\", val2), va=va-4)\nelif op1 & 0b100:\n- # bl/blx\n- x = (val2>>12) & 1\n+ # bl/lx\n+ notx = (val2>>12) & 1\ns = (val>>10) & 1\n- mnem = ('blx','bl')[x]\n- opcode = (INS_BLX,INS_BL)[x]\n+ mnem = ('blx','bl')[notx]\n+ opcode = (INS_BLX,INS_BL)[notx]\nflags = envi.IF_CALL | IF_W\n# need next two bytes\n@@ -917,6 +944,7 @@ def tb_ldrex_32(va, val1, val2):\nreturn opcode, mnem, opers, flags, 0\n+\nmov_ris_ops = (\n(INS_LSL, 'lsl',3),\n(INS_LSR, 'lsr',3),\n@@ -1877,31 +1905,35 @@ thumb2_extension = [\n('11110101011', (85,'sbc', dp_mod_imm_32, IF_THUMB32)),\n('11110101101', (85,'sub', dp_mod_imm_32, IF_THUMB32)), # cmp if rd=1111 and s=1\n('11110101110', (85,'rsb', dp_mod_imm_32, IF_THUMB32)),\n- ('1111001000', (85,'add', dp_bin_imm_32, IF_W | IF_THUMB32)), # adr if rn=1111\n- ('1111001001', (85,'mov', dp_bin_imm_32, IF_W | IF_THUMB32)),\n- ('1111001010', (85,'sub', dp_bin_imm_32, IF_W | IF_THUMB32)), # adr if rn=1111\n- ('1111001011', (85,'movt', dp_bin_imm_32, IF_W | IF_THUMB32)),\n- ('11110011000', (85,'ssat', dp_bin_imm_32, IF_W | IF_THUMB32)),\n- ('11110011001', (85,'ssat16', dp_bin_imm_32, IF_W | IF_THUMB32)),\n- ('11110011010', (85,'sbfx', dp_bin_imm_32, IF_W | IF_THUMB32)),\n- ('11110011011', (85,'bfi', dp_bin_imm_32, IF_W | IF_THUMB32)), # bfc if rn=1111\n- ('11110011100', (85,'usat', dp_bin_imm_32, IF_W | IF_THUMB32)),\n- ('11110011101', (85,'usat', dp_bin_imm_32, IF_W | IF_THUMB32)), # usat16 if val2=0000xxxx00xxxxxx\n- ('1111001111', (85,'ubfx', dp_bin_imm_32, IF_W | IF_THUMB32)),\n- ('1111011000', (85,'add', dp_bin_imm_32, IF_W | IF_THUMB32)), # adr if rn=1111\n- ('1111011001', (85,'mov', dp_bin_imm_32, IF_W | IF_THUMB32)),\n- ('1111011010', (85,'sub', dp_bin_imm_32, IF_W | IF_THUMB32)), # adr if rn=1111\n- ('1111011011', (85,'movt', dp_bin_imm_32, IF_W | IF_THUMB32)),\n- ('11110111000', (85,'ssat', dp_bin_imm_32, IF_W | IF_THUMB32)),\n- ('11110111001', (85,'ssat16', dp_bin_imm_32, IF_W | IF_THUMB32)),\n- ('11110111010', (85,'sbfx', dp_bin_imm_32, IF_W | IF_THUMB32)),\n- ('11110111011', (85,'bfi', dp_bin_imm_32, IF_W | IF_THUMB32)), # bfc if rn=1111\n- ('11110111100', (85,'usat', dp_bin_imm_32, IF_W | IF_THUMB32)),\n- ('11110111101', (85,'usat', dp_bin_imm_32, IF_W | IF_THUMB32)), # usat16 if val2=0000xxxx00xxxxxx\n- ('11110111110', (85,'ubfx', dp_bin_imm_32, IF_W | IF_THUMB32)),\n+ ('1111001000', (85,'add', dp_bin_imm_32, IF_THUMB32)), # adr if rn=1111\n+ ('1111001001', (85,'mov', dp_bin_imm_32, IF_THUMB32)),\n+ ('1111001010', (85,'sub', dp_bin_imm_32, IF_THUMB32)), # adr if rn=1111\n+ ('1111001011', (85,'movt', dp_bin_imm_32, IF_THUMB32)),\n+ ('11110011000', (85,'ssat', dp_bin_imm_32, IF_THUMB32)),\n+ ('11110011001', (85,'ssat16', dp_bin_imm_32, IF_THUMB32)),\n+ ('11110011010', (85,'sbfx', dp_bin_imm_32, IF_THUMB32)),\n+ ('11110011011', (85,'bfi', dp_bin_imm_32, IF_THUMB32)), # bfc if rn=1111\n+ ('11110011100', (85,'usat', dp_bin_imm_32, IF_THUMB32)),\n+ ('111100111010', (85,'usat', dp_bin_imm_32, IF_THUMB32)), # usat16 if val2=0000xxxx00xxxxxx\n+ ('111100111011', (85,'usat', dp_bin_imm_32, IF_THUMB32)), # usat16 if val2=0000xxxx00xxxxxx\n+ ('1111001111', (85,'ubfx', dp_bin_imm_32, IF_THUMB32)),\n+ ('1111011000', (85,'add', dp_bin_imm_32, IF_THUMB32)), # adr if rn=1111\n+ ('1111011001', (85,'mov', dp_bin_imm_32, IF_THUMB32)),\n+ ('1111011010', (85,'sub', dp_bin_imm_32, IF_THUMB32)), # adr if rn=1111\n+ ('1111011011', (85,'movt', dp_bin_imm_32, IF_THUMB32)),\n+ ('11110111000', (85,'ssat', dp_bin_imm_32, IF_THUMB32)),\n+ ('11110111001', (85,'ssat16', dp_bin_imm_32, IF_THUMB32)),\n+ ('11110111010', (85,'sbfx', dp_bin_imm_32, IF_THUMB32)),\n+ ('11110111011', (85,'bfi', dp_bin_imm_32, IF_THUMB32)), # bfc if rn=1111\n+ ('11110111100', (85,'usat', dp_bin_imm_32, IF_THUMB32)),\n+ ('11110111101', (85,'usat', dp_bin_imm_32, IF_THUMB32)), # usat16 if val2=0000xxxx00xxxxxx\n+ ('11110111110', (85,'ubfx', dp_bin_imm_32, IF_THUMB32)),\n('11110111111', (85,'branchmisc', branch_misc, IF_THUMB32)),\n+ ('111110000010', (INS_STRH, 'strh', ldr_puw_32, IF_THUMB32)),\n+ ('111110000100', (INS_STR, 'str', ldr_puw_32, IF_THUMB32)), # T4 encoding\n('111110001001', (INS_LDRB, 'ldrb', ldr_32, IF_THUMB32)),\n- ('111110001100', (INS_STR, 'str', ldr_32, IF_THUMB32)),\n+ ('111110001010', (INS_STRH, 'strh', ldr_32, IF_THUMB32)),\n+ ('111110001100', (INS_STR, 'str', ldr_puw_32, IF_THUMB32)),\n('111110001000', (INS_STRB, 'strb', ldr_32, IF_THUMB32)),\n('111110000000', (INS_STRB, 'strb', ldr_puw_32, IF_THUMB32)),\n('11111010001', (INS_LSL, 'lsl', shift_or_ext_32, IF_THUMB32)),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
thumb misc control instructions
a little clean up
|
718,770 |
26.01.2017 13:50:48
| 18,000 |
806645fd4fd25e630e53b7833fa8c5131b4cf344
|
arm/thumb decoding improvements
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/const.py",
"new_path": "envi/archs/arm/const.py",
"diff": "@@ -460,8 +460,8 @@ instrnames = [\n'INS_VQRSHRUN',\n'INS_VSHLL',\n'INS_VCVT',\n- 'INS_LDRB',\n- 'INS_STRB',\n+ #'INS_LDRB',\n+ #'INS_STRB',\n'INS_SMUL',\n'INS_UADD16',\n'INS_UADD8',\n@@ -478,6 +478,7 @@ instrnames = [\n'INS_CBZ',\n'INS_CBNZ',\n'INS_STRH',\n+ #'INS_LDRH',\n'INS_LEAVEX',\n'INS_ENTERX',\n'INS_TB',\n@@ -495,6 +496,10 @@ instrnames = [\n'INS_DMB',\n'INS_DSB',\n'INS_ISB',\n+ #'INS_LDRSB',\n+ 'INS_PLD',\n+ 'INS_PLI',\n+ 'INS_IT',\n]\nins_index = 85\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -3089,7 +3089,7 @@ class ArmImmFPOper(ArmImmOper):\nclass ArmScaledOffsetOper(ArmOperand):\n''' scaled offset operand. see \"addressing mode 2 - load and store word or unsigned byte - scaled register *\" '''\n- def __init__(self, base_reg, offset_reg, shtype, shval, va, pubwl=0, psize=4):\n+ def __init__(self, base_reg, offset_reg, shtype, shval, va, pubwl=PUxWL_DFLT, psize=4):\nif shval == 0:\nif shtype == S_ROR:\nshtype = S_RRX\n@@ -3224,7 +3224,7 @@ class ArmScaledOffsetOper(ArmOperand):\nclass ArmRegOffsetOper(ArmOperand):\n''' register offset operand. see \"addressing mode 2 - load and store word or unsigned byte - register *\"\ndereference address mode using the combination of two register values '''\n- def __init__(self, base_reg, offset_reg, va, pubwl=0, psize=4, force_tsize=None):\n+ def __init__(self, base_reg, offset_reg, va, pubwl=PUxWL_DFLT, psize=4, force_tsize=None):\nself.base_reg = base_reg\nself.offset_reg = offset_reg\nself.pubwl = pubwl\n@@ -3922,6 +3922,7 @@ class ArmCPSFlagsOper(ArmOperand):\nflags = [AIF_FLAGS[x] for x in range(3) if self.flags & (1<<x)]\nreturn ','.join(flags)\n+\nAIF_FLAGS = ('a','i','f')[::-1]\nENDIAN_LSB = 0\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "-\nimport envi.bits as e_bits\nimport envi.bintree as e_btree\n@@ -14,6 +13,9 @@ armd = ArmDisasm()\n#binary('11111'),\n#]\n+#FIXME: check to make sure ldrb/ldrh are handled consistently, wrt: IF_B and IF_H. emulation would like all the same.\n+\n+\nO_REG = 0\nO_IMM = 1\n@@ -541,6 +543,63 @@ def cps16(va, value):\n)\nreturn opers, (IF_IE, IF_ID)[im]\n+def itblock(va, val):\n+ mask = val & 0xf\n+ firstcond = (val>>4) & 0xf\n+ return (ThumbITOper(mask, firstcond),), None\n+\n+class ThumbITOper(ArmOperand):\n+ def __init__(self, mask, firstcond):\n+ self.mask = mask\n+ self.firstcond = firstcond\n+\n+ def repr(self, op):\n+ mask = self.mask\n+ cond = self.firstcond\n+\n+ fcond = cond_codes.get(cond)\n+\n+ itbytes = []\n+\n+ go = 0\n+ cond0 = cond & 1\n+ for idx in range(4):\n+ mbit = (mask>>idx) & 1\n+ if go:\n+ if mbit == cond0:\n+ itbytes.append('t')\n+ else:\n+ itbytes.append('e')\n+\n+ if mbit:\n+ go = 1\n+ nextfew = ''.join(itbytes)\n+ return \"%s %s\" % (nextfew, fcond)\n+\n+ def render(self, mcanv, op, idx):\n+ mask = self.mask\n+ cond = self.firstcond\n+\n+ fcond = cond_codes.get(cond)\n+\n+ itbytes = []\n+\n+ go = 0\n+ cond0 = cond & 1\n+ for idx in range(4):\n+ mbit = (mask>>idx) & 1\n+ if go:\n+ if mbit == cond0:\n+ itbytes.append('t')\n+ else:\n+ itbytes.append('e')\n+\n+ if mbit:\n+ go = 1\n+\n+ nextfew = ''.join(itbytes)\n+ mcanv.addText(\"%s %s\" % (nextfew, fcond))\n+\ndef thumb32_01(va, val, val2):\nop = (val2>>15)&1\n@@ -743,32 +802,55 @@ def pdp_32(va, val1, val2):\nreturn None, None, None, None, None\n-def dp_bin_imm_32(va, val1, val2):\n+def ubfx_32(va, val1, val2):\n+ rd = (val2>>8) & 0xf\n+ rn = val1 & 0xf\n+ imm3 = (val2>>12) & 0x7\n+ imm2 = (val2>>6) & 0x3\n+ widthm1 = val2 & 0x1f\n+ lsbit = (imm3 << 2) | imm2\n+\n+ opers = (\n+ ArmRegOper(rd),\n+ ArmRegOper(rn),\n+ ArmImmOper(lsbit),\n+ ArmImmOper(widthm1 + 1),\n+ )\n+ return None, None, opers, None, 0\n+\n+def dp_bin_imm_32(va, val1, val2): # p232\n+ flags = IF_THUMB32\nif val2 & 0x8000:\nreturn branch_misc(va, val1,val2)\n- flags = IF_THUMB32\n- # FIXME: decoding incorrectly\nRd = (val2 >> 8) & 0xf\n- Rn = val1 & 0xf\nimm4 = val1 & 0xf\ni = (val1 >> 10) & 1\nimm3 = (val2 >> 12) & 0x7\nconst = val2 & 0xff\n- if Rn==15 and (val1 & 0b111110000) in (0,0b1010): # add/sub\n- # adr\n- return None, 'adr', opers, None, 0\n-\n+ op = (val1>>4) & 0x1f\nconst |= (imm4 << 12) | (i << 11) | (imm3 << 8)\noper0 = ArmRegOper(Rd)\n- oper1 = ArmRegOper(Rd)\noper2 = ArmImmOper(const)\n- opers = (oper0, oper1, oper2)\n+ opers = [oper0, oper2]\n+\n+ if op in (0b00100, 0b01100): # movw, movt\n+ return None, None, opers, 0, 0\n+\n+ Rn = val1 & 0xf\n+ if Rn==15 and op in (0,0b1010): # add/sub\n+ # adr\n+ return None, 'adr', opers, None, 0\n+\n+ oper1 = ArmRegOper(Rn)\n+ opers.insert(1, oper1)\n+\nreturn None, None, opers, flags, 0\n+\ndef ldm_reg_mode_32(va, val1, val2):\nrn = val1 & 0xf\nmode = val2 & 0xf\n@@ -839,10 +921,84 @@ def ldr_32(va, val1, val2):\nopers = (oper0, oper1)\nreturn None, None, opers, None, 0\n+ldrb_instrs = (\n+ (INS_LDR, 'ldr', IF_B|IF_THUMB32),\n+ (INS_LDR, 'ldr', IF_B|IF_S|IF_THUMB32),\n+ )\n+memh_instrs = (\n+ (INS_PLD, 'pld', IF_THUMB32),\n+ (INS_PLI, 'pli', IF_THUMB32),\n+ )\n+\n+def ldrb_memhints_32(va, val1, val2):\n+ op1 = (val1>>7) & 3\n+ op2 = (val2>>6) & 0x3f\n+ rn = val1 & 0xf\n+ rt = (val2>>12) & 0xf\n+\n+ Sbit = op1>>1\n+\n+\n+ if rn == 0xf:\n+ if rt == 0xf:\n+ # PLD(literal)\n+ opcode, mnem, flags = memh_instrs[Sbit]\n+ rm = val2 & 0xf\n+ imm2 = (val2>>4) & 3\n+ opers = (\n+ ArmScaledOffsetOper(rn, rm, S_LSL, imm2, va),\n+ )\n+ else:\n+ # LDRB (literal)\n+ opcode, mnem, flags = ldrb_instrs[Sbit]\n+ imm12 = val2 & 0xfff\n+ opers = (\n+ ArmRegOper(rt),\n+ ArmPcOffsetOper(imm12, va),\n+ )\n+\n+ else:\n+ if op1&1:\n+ # ldrb (immediate):T2, ldrsb:T1\n+ opcode, mnem, flags = ldrb_instrs[Sbit]\n+ imm12 = val2 & 0xfff\n+ opers = (\n+ ArmRegOper(rt),\n+ ArmImmOffsetOper(rn, imm12, va),\n+ )\n+\n+ elif not op1 and not op2:\n+ if rt == 0xf:\n+ # pld/pldw (p526)\n+ opcode, mnem, flags = memh_instrs[Sbit]\n+ rm = val2 & 0xf\n+ imm2 = (val2>>4) & 3\n+ opers = (\n+ ArmScaledOffsetOper(rn, rm, S_LSL, imm2, va),\n+ )\n+\n+ else:\n+ # LDRB (register)\n+ opcode, mnem, flags = ldrb_instrs[Sbit]\n+ rm = val2 & 0xf\n+ imm2 = (val2>>4) & 3\n+ opers = (\n+ ArmRegOper(rt),\n+ ArmScaledOffsetOper(rn, rm, S_LSL, imm2, va),\n+ )\n+\n+ else:\n+ raise envi.InvalidInstruction(\n+ mesg=\"ldrb_memhints_32: fall 1\", va=va)\n+\n+\n+ return opcode, mnem, opers, flags, 0\n+\n+\ndef ldr_puw_32(va, val1, val2):\n- b11 = (val2>>11) & 1\n- if not b11:\n- raise Exception(\"ldr_puw_32 parsing non-ldrb\")\n+ #b11 = (val2>>11) & 1\n+ #if not b11:\n+ # raise Exception(\"ldr_puw_32 parsing non-ldrb\")\nrn = val1 & 0xf\nrt = (val2 >> 12) & 0xf\n@@ -1030,7 +1186,7 @@ dp_shift_alt2= ((INS_AND, 'and', 3),\n(INS_RSB, 'rsb', 3),\n)\ndef dp_shift_32(va, val1, val2):\n- flags = 0\n+ flags = IF_THUMB32\nop = (val1 >> 5) & 0xf\nrn = val1 & 0xf\nrd = (val2 >> 8) & 0xf\n@@ -1247,7 +1403,6 @@ def coproc_simd_32(va, val1, val2):\n# adv simd fp (a7-272)\ntmop1 = op1 & 0b11011\n- # FIXME: DO WE WANT ALL adv_simd to be decoded in the adv_simd_32 function? or individual functions? not here.\nif op1 & 0b11110 == 0b00100:\n# 64 bit transverse between ARM core and extension registers (a7-277)\nraise envi.InvalidInstruction( #FIXME!!!!\n@@ -1262,7 +1417,8 @@ def coproc_simd_32(va, val1, val2):\nl = op1 & 1 # vldm or vstm\nindiv = (op1 & 0b10010) == 0b10000\n# writeback should be handled by operand\n- imm32 = (val2 & 0xff) << 2\n+ imm8 = (val2 & 0xff) >>1\n+ imm32 = imm8 <<3\n# size = 0/1 for 32-bit and 64-bit accordingly\nsize = (val2>>8) & 1 # TODO: Check next three bits must be 0b101\n@@ -1278,7 +1434,7 @@ def coproc_simd_32(va, val1, val2):\nif (op1 & 0b11011) in (0b01011, 0b10010) and Rn == REG_SP:\nmnem = ('vpush', 'vpop')[l]\nopers = (\n- ArmExtRegListOper(d, imm32, size),\n+ ArmExtRegListOper(d>>size, imm8, size),\n)\nelse:\n@@ -1308,7 +1464,7 @@ def coproc_simd_32(va, val1, val2):\nelse:\nopers = (\nArmRegOper(Rn, va=va, oflags=oflags),\n- ArmExtRegListOper(d, imm32, size),\n+ ArmExtRegListOper(d, imm32>>size, size),\n)\nelif op1 & 0b110000 == 0b100000:\n@@ -1631,6 +1787,8 @@ def _adv_simd_32(va, val1, val2):\nreturn opcode, mnem, opers, 0, simdflags\n+\n+\nbcc_ops = {\n0b0000: (INS_BCC,'beq', envi.IF_COND),\n0b0001: (INS_BCC,'bn', envi.IF_COND),\n@@ -1756,29 +1914,14 @@ thumb_base = [\n('11011101', (INS_BCC,'ble', pc_imm8, envi.IF_BRANCH|envi.IF_COND)),\n('11011110', (INS_B,'b', pc_imm8, envi.IF_BRANCH|envi.IF_NOFALL)),\n('11011111', (INS_BCC,'bfukt', pc_imm8, envi.IF_BRANCH|0)),\n- # Software Interru2t\n+ # Software Interrupt\n('11011111', (INS_SWI,'svc', imm8, 0)), # SWI <blahblah>\n- ('1011111100000000', (89,'nopHint', imm8, 0)), #unnecessary instruction\n- ('1011111100010000', (90,'yieldHint', imm8, 0)), #unnecessary instruction\n- ('1011111100100000', (91,'wfrHint', imm8, 0)), #unnecessary instruction\n- ('1011111100110000', (92,'wfiHint', imm8, 0)), #unnecessary instruction\n- ('1011111101000000', (93,'sevHint', imm8, 0)), #unnecessary instruction\n- ('101111110000', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111110001', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111110010', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111110011', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111110100', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111110101', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111110110', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111110111', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111111000', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111111001', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111111010', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111111011', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111111100', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111111101', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111111110', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n- ('101111111111', (94,'if-then-Hint', imm8, 0)), #unnecessary instruction\n+ ('1011111100000000', (89,'nopHint', imm8, 0)),\n+ ('1011111100010000', (90,'yieldHint', imm8, 0)),\n+ ('1011111100100000', (91,'wfrHint', imm8, 0)),\n+ ('1011111100110000', (92,'wfiHint', imm8, 0)),\n+ ('1011111101000000', (93,'sevHint', imm8, 0)),\n+ ('10111111', (INS_IT, 'it', itblock, envi.IF_COND)),\n]\nthumb1_extension = [\n@@ -1786,7 +1929,6 @@ thumb1_extension = [\n('1111', (INS_BL, 'bl', branch_misc, envi.IF_CALL | IF_THUMB32)), # BL/BLX <addr25>\n]\n-### holy crap, this is so wrong and imcomplete....\n# FIXME: need to take into account ThumbEE\n# 32-bit Thumb instructions start with:\n# 0b11101\n@@ -1794,11 +1936,6 @@ thumb1_extension = [\n# 0b11111\nthumb2_extension = [\n('11100', (85,'ldm', ldm16, 0)), # 16-bit instructions\n- #('11101', (86,'blah32', thumb32_01, IF_THUMB32)), # can't do thumb32 in tree-fashion\n- #('11110', (86,'blah32', thumb32_10, IF_THUMB32)), # op2 is sparse and op is part of\n- #('11111', (86,'blah32', thumb32_11, IF_THUMB32)), # second halfword\n- # awww heck, let's use the tree for as much as possible.\n-\n# load/store multiple (A6-235 in ARM DDI 0406C)\n('111010000000', (85,'srs', ldm_reg_mode_32, IF_THUMB32|IF_DB)), # next bits shoud be: 110111000000000mode\n@@ -1906,7 +2043,7 @@ thumb2_extension = [\n('11110101101', (85,'sub', dp_mod_imm_32, IF_THUMB32)), # cmp if rd=1111 and s=1\n('11110101110', (85,'rsb', dp_mod_imm_32, IF_THUMB32)),\n('1111001000', (85,'add', dp_bin_imm_32, IF_THUMB32)), # adr if rn=1111\n- ('1111001001', (85,'mov', dp_bin_imm_32, IF_THUMB32)),\n+ ('1111001001', (85,'movw', dp_bin_imm_32, IF_THUMB32)),\n('1111001010', (85,'sub', dp_bin_imm_32, IF_THUMB32)), # adr if rn=1111\n('1111001011', (85,'movt', dp_bin_imm_32, IF_THUMB32)),\n('11110011000', (85,'ssat', dp_bin_imm_32, IF_THUMB32)),\n@@ -1916,9 +2053,9 @@ thumb2_extension = [\n('11110011100', (85,'usat', dp_bin_imm_32, IF_THUMB32)),\n('111100111010', (85,'usat', dp_bin_imm_32, IF_THUMB32)), # usat16 if val2=0000xxxx00xxxxxx\n('111100111011', (85,'usat', dp_bin_imm_32, IF_THUMB32)), # usat16 if val2=0000xxxx00xxxxxx\n- ('1111001111', (85,'ubfx', dp_bin_imm_32, IF_THUMB32)),\n+ ('1111001111', (85,'ubfx', ubfx_32, IF_THUMB32)),\n('1111011000', (85,'add', dp_bin_imm_32, IF_THUMB32)), # adr if rn=1111\n- ('1111011001', (85,'mov', dp_bin_imm_32, IF_THUMB32)),\n+ ('1111011001', (85,'movw', dp_bin_imm_32, IF_THUMB32)),\n('1111011010', (85,'sub', dp_bin_imm_32, IF_THUMB32)), # adr if rn=1111\n('1111011011', (85,'movt', dp_bin_imm_32, IF_THUMB32)),\n('11110111000', (85,'ssat', dp_bin_imm_32, IF_THUMB32)),\n@@ -1927,20 +2064,27 @@ thumb2_extension = [\n('11110111011', (85,'bfi', dp_bin_imm_32, IF_THUMB32)), # bfc if rn=1111\n('11110111100', (85,'usat', dp_bin_imm_32, IF_THUMB32)),\n('11110111101', (85,'usat', dp_bin_imm_32, IF_THUMB32)), # usat16 if val2=0000xxxx00xxxxxx\n- ('11110111110', (85,'ubfx', dp_bin_imm_32, IF_THUMB32)),\n+ ('11110111110', (85,'ubfx', ubfx_32, IF_THUMB32)),\n('11110111111', (85,'branchmisc', branch_misc, IF_THUMB32)),\n- ('111110000010', (INS_STRH, 'strh', ldr_puw_32, IF_THUMB32)),\n+ ('111110000001', (None, 'ldrb_memhints32', ldrb_memhints_32, IF_THUMB32)),\n+ ('111110000010', (INS_STR, 'str', ldr_puw_32, IF_H | IF_THUMB32)),\n('111110000100', (INS_STR, 'str', ldr_puw_32, IF_THUMB32)), # T4 encoding\n- ('111110001001', (INS_LDRB, 'ldrb', ldr_32, IF_THUMB32)),\n- ('111110001010', (INS_STRH, 'strh', ldr_32, IF_THUMB32)),\n+ ('111110000101', (INS_LDR, 'ldr', ldr_puw_32, IF_THUMB32)), # T4 encoding\n+ ('111110001001', (None, 'ldrb_memhints32', ldrb_memhints_32, IF_THUMB32)),\n+ ('111110010001', (None, 'ldrb_memhints32', ldrb_memhints_32, IF_THUMB32)),\n+ ('111110011001', (None, 'ldrb_memhints32', ldrb_memhints_32, IF_THUMB32)),\n+ #('111110001001', (INS_LDRB, 'ldrb', ldr_32, IF_THUMB32)),\n+ ('111110001010', (INS_STR, 'str', ldr_32, IF_H | IF_THUMB32)),\n+ ('111110001011', (INS_LDR, 'ldr', ldr_32, IF_H | IF_THUMB32)),\n('111110001100', (INS_STR, 'str', ldr_puw_32, IF_THUMB32)),\n- ('111110001000', (INS_STRB, 'strb', ldr_32, IF_THUMB32)),\n- ('111110000000', (INS_STRB, 'strb', ldr_puw_32, IF_THUMB32)),\n- ('11111010001', (INS_LSL, 'lsl', shift_or_ext_32, IF_THUMB32)),\n+ ('111110001101', (INS_LDR, 'ldr', ldr_32, IF_THUMB32)), # T3\n+ ('111110001000', (INS_STR, 'str', ldr_32, IF_B | IF_THUMB32)),\n+ ('111110000000', (INS_STR, 'str', ldr_puw_32, IF_B | IF_THUMB32)),\n+ ('11111010001', (INS_LSL, 'lsl', shift_or_ext_32, IF_THUMB32)), # FIXME: overlapping with saturating instructions\n('11111010010', (INS_LSR, 'lsr', shift_or_ext_32, IF_THUMB32)),\n('11111010011', (INS_ASR, 'asr', shift_or_ext_32, IF_THUMB32)),\n('11111010100', (INS_ROR, 'ror', shift_or_ext_32, IF_THUMB32)),\n- ('111110101001', (INS_UADD16, 'uadd16', pdp_32, IF_THUMB32)), # FIXME: overlapping with saturating instructions\n+ ('111110101001', (INS_UADD16, 'uadd16', pdp_32, IF_THUMB32)), # or these?\n('111110101010', (INS_UASX, 'uasx', pdp_32, IF_THUMB32)),\n('111110101110', (INS_USAX, 'usax', pdp_32, IF_THUMB32)),\n('111110101101', (INS_USUB16, 'usub16', pdp_32, IF_THUMB32)),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
arm/thumb decoding improvements
|
718,770 |
26.01.2017 17:32:42
| 18,000 |
b8733ad7291b6a48712e38585027707f45e57286
|
starting the mods for ARM Emulation helpers
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/arm/emulation.py",
"new_path": "vivisect/analysis/arm/emulation.py",
"diff": "@@ -6,7 +6,10 @@ import vivisect.impemu.monitor as viv_monitor\nimport envi\nimport envi.archs.arm as e_arm\n+\n+from envi.archs.arm.regs import *\nfrom envi.registers import RMETA_NMASK\n+from envi.archs.arm.const import *\nfrom vivisect.const import *\n@@ -16,6 +19,7 @@ class AnalysisMonitor(viv_monitor.AnalysisMonitor):\nviv_monitor.AnalysisMonitor.__init__(self, vw, fva)\nself.retbytes = None\nself.badop = vw.arch.archParseOpcode(\"\\x00\\x00\\x00\\x00\\x00\")\n+ self.last_lr_pc = 0\ndef prehook(self, emu, op, starteip):\n@@ -28,6 +32,29 @@ class AnalysisMonitor(viv_monitor.AnalysisMonitor):\nif len(op.opers):\nif hasattr(op.opers, 'imm'):\nself.retbytes = op.opers[0].imm\n+\n+ if op.opcode == INS_TB:\n+ analyzeTB(emu, op, starteip, self)\n+\n+ if op.opcode == INS_MOV:\n+ if len(op.opers) >= 2:\n+ oper0 = op.opers[0]\n+ oper1 = op.opers[1]\n+\n+ if isinstance(oper0, e_arm.ArmRegOper) and oper0.reg == REG_LR:\n+ if isinstance(oper1, e_arm.ArmRegOper) and oper1.reg == REG_PC:\n+ self.last_lr_pc = starteip\n+\n+ if op.opcode == INS_BX:\n+ if starteip - self.last_lr_pc <= 4:\n+ # this is a call. the compiler updated lr\n+ print \"CALL by mov lr, pc; bx <foo> at 0x%x\" % starteip\n+\n+\n+\n+def analyzeTB(emu, op, starteip, amon):\n+ print \"TB at 0x%x\" % starteip\n+\nargnames = {\n0: ('r0', 0),\n1: ('r1', 1),\n@@ -87,6 +114,9 @@ def analyzeFunction(vw, fva):\nargc = len(callargs)\ncc = emu.getCallingConvention(callconv)\n+ if cc == None:\n+ return\n+\nstcount = cc.getNumStackArgs(emu, argc)\nstackidx = argc - stcount\nbaseoff = cc.getStackArgOffset(emu, argc)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
starting the mods for ARM Emulation helpers
|
718,770 |
26.01.2017 17:33:02
| 18,000 |
b7c576e8c083a26cda399f7f4813c7d5f14a0909
|
adding default calling conventions for BLOBs
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/parsers/blob.py",
"new_path": "vivisect/parsers/blob.py",
"diff": "@@ -3,6 +3,13 @@ import vivisect\nimport vivisect.parsers as v_parsers\nfrom vivisect.const import *\n+\n+archcalls = {\n+ 'i386':'cdecl',\n+ 'amd64':'sysvamd64call',\n+ 'arm':'armcall',\n+ }\n+\ndef parseFd(vw, fd, filename=None):\nfd.seek(0)\narch = vw.config.viv.parsers.blob.arch\n@@ -18,6 +25,7 @@ def parseFd(vw, fd, filename=None):\nvw.setMeta('Format','blob')\nvw.setMeta('bigend', bigend)\n+ vw.setMeta('DefaultCall', archcalls.get(arch,'unknown'))\nbytez = fd.read()\nvw.addMemoryMap(baseaddr, 7, filename, bytez)\n@@ -40,6 +48,7 @@ def parseFile(vw, filename):\nvw.setMeta('Format','blob')\nvw.setMeta('bigend', bigend)\n+ vw.setMeta('DefaultCall', archcalls.get(arch,'unknown'))\nfname = vw.addFile(filename, baseaddr, v_parsers.md5File(filename))\nbytez = file(filename, \"rb\").read()\n@@ -54,4 +63,5 @@ def parseMemory(vw, memobj, baseaddr):\nbytes = memobj.readMemory(va, size)\nfname = vw.addFile(fname, baseaddr, v_parsers.md5Bytes(bytes))\nvw.addMemoryMap(va, perms, fname, bytes)\n+ vw.setMeta('DefaultCall', archcalls.get(arch,'unknown'))\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
adding default calling conventions for BLOBs
|
718,770 |
26.01.2017 17:33:43
| 18,000 |
4d674a46c23c7fc7e3fe483b6b06303db6ab60c8
|
adding ARM emulation and disabling pointer discovery for BLOBs
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/__init__.py",
"new_path": "vivisect/analysis/__init__.py",
"diff": "@@ -137,10 +137,14 @@ def addAnalysisModules(vw):\nvw.addAnalysisModule(\"vivisect.analysis.generic.funcentries\")\nvw.addAnalysisModule(\"vivisect.analysis.generic.relocations\")\n- vw.addAnalysisModule(\"vivisect.analysis.generic.pointertables\")\n+ #vw.addAnalysisModule(\"vivisect.analysis.generic.pointertables\")\nvw.addAnalysisModule(\"vivisect.analysis.generic.emucode\")\nvw.addFuncAnalysisModule(\"vivisect.analysis.generic.codeblocks\")\n+\n+ if arch == 'arm':\n+ vw.addFuncAnalysisModule(\"vivisect.analysis.arm.emulation\")\n+\nvw.addFuncAnalysisModule(\"vivisect.analysis.generic.impapi\")\nvw.addFuncAnalysisModule(\"vivisect.analysis.generic.thunks\")\n@@ -151,6 +155,9 @@ def addAnalysisModules(vw):\n#vw.addAnalysisModule(\"vivisect.analysis.generic.pointertables\")\nvw.addAnalysisModule(\"vivisect.analysis.generic.emucode\")\n+ if arch == 'arm':\n+ vw.addFuncAnalysisModule(\"vivisect.analysis.arm.emulation\")\n+\nvw.addFuncAnalysisModule(\"vivisect.analysis.generic.codeblocks\")\nvw.addFuncAnalysisModule(\"vivisect.analysis.generic.impapi\")\nvw.addFuncAnalysisModule(\"vivisect.analysis.generic.thunks\")\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
adding ARM emulation and disabling pointer discovery for BLOBs
|
718,770 |
29.01.2017 23:01:02
| 18,000 |
43a5b78cb60c181b9e423d6f23de2c52fc1c2e6f
|
more good decodes
vector register name issue
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/const.py",
"new_path": "envi/archs/arm/const.py",
"diff": "@@ -500,6 +500,19 @@ instrnames = [\n'INS_PLD',\n'INS_PLI',\n'INS_IT',\n+ 'INS_MLA',\n+ 'INS_SXTAH',\n+ 'INS_SXTH',\n+ 'INS_SXTAB16',\n+ 'INS_SXTAB',\n+ 'INS_SXTB16',\n+ 'INS_SXTB',\n+ 'INS_UXTAH',\n+ 'INS_UXTH',\n+ 'INS_UXTAB16',\n+ 'INS_UXTAB',\n+ 'INS_UXTB16',\n+ 'INS_UXTB',\n]\nins_index = 85\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -600,7 +600,6 @@ class ThumbITOper(ArmOperand):\nnextfew = ''.join(itbytes)\nmcanv.addText(\"%s %s\" % (nextfew, fcond))\n-\ndef thumb32_01(va, val, val2):\nop = (val2>>15)&1\nop2 = (val>>4) & 0x7f\n@@ -765,13 +764,72 @@ def dp_mod_imm_32(va, val1, val2):\nopers = (oper0, oper1, oper2)\nreturn None, None, opers, flags, 0\n+sxt_mnem = (\n+ (INS_SXTAH, 'sxtah',),\n+ (INS_UXTAH, 'uxtah',),\n+ (INS_SXTAB16, 'sxtab16',),\n+ (INS_UXTAB16, 'uxtab16',),\n+ (INS_SXTAB, 'sxtab',),\n+ (INS_UXTAB, 'uxtab',),\n+ )\n+\n+sxt_mnem_2 = (\n+ (INS_SXTH, 'sxth',),\n+ (INS_UXTH, 'uxth',),\n+ (INS_SXTB16, 'sxtb16',),\n+ (INS_UXTB16, 'uxtb16',),\n+ (INS_SXTB, 'sxtb',),\n+ (INS_UXTB, 'uxtb',),\n+ )\n+\ndef shift_or_ext_32(va, val1, val2):\nif (val2 & 0xf000) != 0xf000:\n- raise Exception(\"pdp_32 needs to hand off for val2 & 0xf000 != 0xf000 at va 0x%x: val1:%.4x val2:%.4x\" % (va, val1, val2))\n+ raise InvalidInstruction(mesg=\"shift_or_ext_32 needs to hand off for val2 & 0xf000 != 0xf000 at va 0x%x: val1:%.4x val2:%.4x\" % (va, val1, val2), va=va)\n+\nop2 = (val2>>4) & 0xf\n+ rn = (val1 & 0xf)\n+ rd = (val2 >> 8) & 0xf\n+ rm = (val2 & 0xf)\n+\nif (op2):\n- raise Exception(\"Implement Me: Extended and Add stuff\")\n+ if op1 > 6:\n+ raise InvalidInstruction(\n+ mesg=\"shift_or_ext_32 parsing an unsupported instruction encoding\",\n+ bytez=struct.pack(\"<H\", val1)+struct.pack(\"<H\", val2), va=va)\n+\n+ rotate = (val2>>4) & 0x3\n+\n+ if rn == 0xf:\n+ # sxth and the like\n+ opcode, mnem, = sxt_mnem_2[op1]\n+ if rotate == 0:\n+ opers = (\n+ ArmRegOper(rd),\n+ ArmRegOper(rm),\n+ )\n+ else:\n+ opers = (\n+ ArmRegOper(rd),\n+ ArmRegOper(rm),\n+ ArmImmOper(rotate),\n+ )\n+ else:\n+ # sxtah and the like\n+ opcode, mnem, = sxt_mnem[op1]\n+ if rotate == 0:\n+ opers = (\n+ ArmRegOper(rd),\n+ ArmRegOper(rm),\n+ )\n+ else:\n+ opers = (\n+ ArmRegOper(rd),\n+ ArmRegOper(rn),\n+ ArmRegOper(rm),\n+ ArmImmOper(rotate),\n+ )\n+\nelse:\n# lsl/lsr/asr/ror\n@@ -779,10 +837,6 @@ def shift_or_ext_32(va, val1, val2):\nop1 = (val1>>4) & 0xf\nopcode, mnem, nothing = mov_ris_ops[op1>>1]\n- rn = (val1 & 0xf)\n- rd = (val2 >> 8) & 0xf\n- rm = (val2 & 0xf)\n-\nopers = (\nArmRegOper(rd),\nArmRegOper(rn),\n@@ -1059,6 +1113,24 @@ def strexn_32(va, val1, val2):\nflags = 0\nreturn 0, mnem, opers, flags, 0\n+def mla_32(va, val1, val2):\n+ rn = val1 & 0xf\n+ rm = val2 & 0xf\n+ rd = (val2 >> 8) & 0xf\n+ ra = (val2 >> 12) & 0xf\n+\n+ mnem = 'mla'\n+ opcode = INS_MLA\n+\n+ opers = (\n+ ArmRegOper(rd, va=va),\n+ ArmRegOper(rn, va=va),\n+ ArmRegOper(rm, va=va),\n+ ArmRegOper(ra, va=va),\n+ )\n+\n+ return None, mnem, opers, None, 0\n+\ndef smul_32(va, val1, val2):\nrn = val1 & 0xf\nrm = val2 & 0xf\n@@ -1454,7 +1526,7 @@ def coproc_simd_32(va, val1, val2):\noflags |= OF_W # writeback flag for ArmRegOper\nif indiv:\n- rbase = ('S%d', 'D%d')[size]\n+ rbase = ('s%d', 'd%d')[size]\nVRd = rctx.getRegisterIndex(rbase % d)\nopers = (\nArmRegOper(VRd, va=va, oflags=oflags),\n@@ -1501,6 +1573,9 @@ def fp_dp(va, val1, val2):\nsz = (val2 >> 8) & 1\n+ # D and S, depending on sz\n+ rbase = (\"s%d\",\"d%d\")[sz]\n+\nif opc1sub != 0b1011:\nop = (opc1sub & 0b1000) | ((opc1sub & 0b11)<<1) | (opc3 & 1)\nmnem = ('vmla','vmls','vnmla','vnmls','vnmul','vmul','vadd','vsub','vdiv','vfnms','vfnma','vfms','vfma',)[op]\n@@ -1516,8 +1591,6 @@ def fp_dp(va, val1, val2):\nm = (Vm<<1) | M\nn = (opc2<<1) | N\n- # D and S, depending on sz\n- rbase = (\"S%d\",\"D%d\")[sz]\nsimdflags |= (IFS_F32, IFS_F64)[sz]\n# VMLA, VMLS p930\n@@ -1546,13 +1619,13 @@ def fp_dp(va, val1, val2):\nm = (M<<4) | Vm\nimm = imm4h<<4 | imm4l\nsimdflags |= IFS_F64\n- rbase = \"D%d\"\n+ rbase = \"d%d\"\nelse:\nd = (Vd<<1) | D\nm = (Vm<<1) | M\nimm = imm4h<<4 | imm4l\nsimdflags |= IFS_F32\n- rbase = \"S%d\"\n+ rbase = \"s%d\"\nif opc3 & 1 == 0:\nmnem = 'vmov'\n@@ -1623,14 +1696,14 @@ def fp_dp(va, val1, val2):\nd = (Vd<<1) | D\nm = (M<<4) | Vm\nsimdflags |= IFS_F32F64\n- rbase1 = \"S%d\"\n- rbase2 = \"D%d\"\n+ rbase1 = \"s%d\"\n+ rbase2 = \"d%d\"\nelse:\nd = (D<<4) | Vd\nm = (Vm<<1) | M\nsimdflags |= IFS_F64F32\n- rbase1 = \"D%d\"\n- rbase2 = \"S%d\"\n+ rbase1 = \"d%d\"\n+ rbase2 = \"s%d\"\nopers = (\nArmRegOper(rctx.getRegisterIndex(rbase1%d)),\n@@ -1651,13 +1724,13 @@ def fp_dp(va, val1, val2):\nif sz:\nm = (M<<4) | Vm\nsimdflags |= (IFS_U32F64, IFS_S32F64)[signed]\n- rbase1 = \"S%d\"\n- rbase2 = \"D%d\"\n+ rbase1 = \"s%d\"\n+ rbase2 = \"d%d\"\nelse:\nm = (Vm<<1) | M\nsimdflags |= (IFS_U32F32, IFS_S32F32)[signed]\n- rbase1 = \"S%d\"\n- rbase2 = \"S%d\"\n+ rbase1 = \"s%d\"\n+ rbase2 = \"s%d\"\nelse:\nmnem = 'vcvt'\n@@ -1667,13 +1740,13 @@ def fp_dp(va, val1, val2):\nif sz:\nd = (D<<4) | Vd\nsimdflags |= (IFS_F64U32, IFS_F64S32)[signed]\n- rbase1 = \"D%d\"\n- rbase2 = \"S%d\"\n+ rbase1 = \"d%d\"\n+ rbase2 = \"s%d\"\nelse:\nd = (Vd<<1) | D\nsimdflags |= (IFS_F32U32, IFS_F32S32)[signed]\n- rbase1 = \"S%d\"\n- rbase2 = \"S%d\"\n+ rbase1 = \"s%d\"\n+ rbase2 = \"s%d\"\nopers = (\nArmRegOper(rctx.getRegisterIndex(rbase1%d)),\n@@ -1714,9 +1787,9 @@ def fp_dp(va, val1, val2):\nm = (M<<4) | Vm\nif Q:\n- rbase = \"Q%d\"\n+ rbase = \"q%d\"\nelse:\n- rbase = \"D%d\"\n+ rbase = \"d%d\"\n#regs = Q + 1\n@@ -1766,7 +1839,7 @@ def _adv_simd_32(va, val1, val2):\nq = (val2 >> 2) & 0x10\n- rbase = ('D%d', 'Q%d')[q]\n+ rbase = ('d%d', 'q%d')[q]\nopers = (\nArmRegOper(rctx.getRegisterIndex(rbase%d)),\n@@ -2080,11 +2153,10 @@ thumb2_extension = [\n('111110001101', (INS_LDR, 'ldr', ldr_32, IF_THUMB32)), # T3\n('111110001000', (INS_STR, 'str', ldr_32, IF_B | IF_THUMB32)),\n('111110000000', (INS_STR, 'str', ldr_puw_32, IF_B | IF_THUMB32)),\n- ('11111010001', (INS_LSL, 'lsl', shift_or_ext_32, IF_THUMB32)), # FIXME: overlapping with saturating instructions\n- ('11111010010', (INS_LSR, 'lsr', shift_or_ext_32, IF_THUMB32)),\n- ('11111010011', (INS_ASR, 'asr', shift_or_ext_32, IF_THUMB32)),\n- ('11111010100', (INS_ROR, 'ror', shift_or_ext_32, IF_THUMB32)),\n- ('111110101001', (INS_UADD16, 'uadd16', pdp_32, IF_THUMB32)), # or these?\n+ # data-processing (register)\n+ ('111110100', (None, 'shift_or_extend', shift_or_ext_32, IF_THUMB32)),\n+ #('111110101', (None, 'parallel_misc', parallel_misc_32, IF_THUMB32)),\n+ ('111110101001', (INS_UADD16, 'uadd16', pdp_32, IF_THUMB32)),\n('111110101010', (INS_UASX, 'uasx', pdp_32, IF_THUMB32)),\n('111110101110', (INS_USAX, 'usax', pdp_32, IF_THUMB32)),\n('111110101101', (INS_USUB16, 'usub16', pdp_32, IF_THUMB32)),\n@@ -2095,6 +2167,7 @@ thumb2_extension = [\n('111110101001', (INS_UADD16, 'uadd16', pdp_32, IF_THUMB32)),\n('111110101001', (INS_UADD16, 'uadd16', pdp_32, IF_THUMB32)),\n('111110101001', (INS_UADD16, 'uadd16', pdp_32, IF_THUMB32)),\n+ ('111110110000', (INS_MLA, 'mla', mla_32, IF_THUMB32)),\n('111110110001', (INS_SMUL, 'smul', smul_32, IF_THUMB32)),\n#('11111', (85,'branchmisc', branch_misc, IF_THUMB32)),\n#('11111', (85,'SOMETHING WICKED THIS WAY', dp_bin_imm_32, IF_THUMB32)),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
more good decodes
vector register name issue
|
718,770 |
30.01.2017 00:10:09
| 18,000 |
ac78ae33cae414b13a2a31989cd34f58a5193406
|
update to allow Architecture to fix up Function/XREF VA's before placing them (so called Thumb functions are correctly named, placed, and referenced)
|
[
{
"change_type": "MODIFY",
"old_path": "envi/__init__.py",
"new_path": "envi/__init__.py",
"diff": "@@ -155,6 +155,12 @@ class ArchitectureModule:\nallr = [rname for rname in regctx.getRegisterNames()]\nreturn [ ('all', allr), ]\n+ def archModifyFuncAddr(self, va, arch):\n+ return None, None\n+\n+ def archModifyXrefAddr(self, va):\n+ return None\n+\ndef getEmulator(self):\n\"\"\"\nReturn a default instance of an emulator for the given arch.\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/__init__.py",
"new_path": "envi/archs/arm/__init__.py",
"diff": "@@ -55,6 +55,19 @@ class ArmModule(envi.ArchitectureModule):\nself._arch_dis.setEndian(endian)\nself._arch_thumb_dis.setEndian(endian)\n+ def archModifyFuncAddr(self, va, arch):\n+ if va & 1:\n+ print \"THUMB function address being fixed\"\n+ return va & -2, envi.ARCH_THUMB\n+ return None, None\n+\n+ def archModifyXrefAddr(self, va):\n+ if va & 1:\n+ print \"THUMB function address being fixed\"\n+ return va & -2\n+ return None\n+\n+\nclass ThumbModule(envi.ArchitectureModule):\n'''\nThis architecture module will *not* shift to ARM mode. Evar.\n@@ -99,4 +112,16 @@ class ThumbModule(envi.ArchitectureModule):\nself._endian = endian\nself._arch_dis.setEndian(endian)\n+ def archModifyFuncAddr(self, va, arch):\n+ if va & 1:\n+ print \"THUMB function address being fixed\"\n+ return va & -2, envi.ARCH_THUMB\n+ return None, None\n+\n+ def archModifyXrefAddr(self, va):\n+ if va & 1:\n+ print \"THUMB function address being fixed\"\n+ return va & -2\n+ return None\n+\nfrom envi.archs.arm.emu import *\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/codeflow.py",
"new_path": "envi/codeflow.py",
"diff": "@@ -273,6 +273,7 @@ class CodeFlowContext(object):\n# Finally, notify the callback of a new function\nself._cb_function(va, {'CallsFrom':calls_from})\n+\ndef addDynamicBranchHandler(self, cb):\n'''\nAdd a callback handler for dynamic branches the code-flow resolver\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/__init__.py",
"new_path": "vivisect/__init__.py",
"diff": "@@ -1475,6 +1475,11 @@ class VivWorkspace(e_mem.MemoryObject, viv_base.VivWorkspaceCore):\n(see REF_ macros). This will *not* trigger any analysis.\nCallers are expected to do their own xref analysis (ie, makeCode() etc)\n\"\"\"\n+ # Architecture gets to decide on actual final VA (ARM/THUMB/etc...)\n+ modva = self.arch.archModifyXrefAddr(tova)\n+ if modva != None:\n+ tova = modva\n+\nref = (fromva,tova,reftype,rflags)\nif ref in self.getXrefsFrom(fromva):\nreturn\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/base.py",
"new_path": "vivisect/base.py",
"diff": "@@ -706,3 +706,31 @@ class VivCodeFlowContext(e_codeflow.CodeFlowContext):\nreturn True\n+ def addEntryPoint(self, va, arch=envi.ARCH_DEFAULT):\n+ '''\n+ Analyze the given procedure entry point and flow downward\n+ to find all subsequent code blocks and procedure edges.\n+\n+ Example:\n+ cf.addEntryPoint( 0x77c70308 )\n+ ... callbacks flow along ...\n+ '''\n+ # Architecture gets to decide on actual final VA and Architecture (ARM/THUMB/etc...)\n+ modva, modarch = self._mem.arch.archModifyFuncAddr(va, arch)\n+ if modva != None:\n+ va = modva\n+ if modarch != None:\n+ arch = modarch\n+\n+ # Check if this is already a known function.\n+ if self._funcs.get(va) != None:\n+ return\n+\n+ # Add this function to known functions\n+ self._funcs[va] = True\n+ calls_from = self.addCodeFlow(va, arch=arch)\n+ self._fcalls[va] = calls_from\n+\n+ # Finally, notify the callback of a new function\n+ self._cb_function(va, {'CallsFrom':calls_from})\n+\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
update to allow Architecture to fix up Function/XREF VA's before placing them (so called Thumb functions are correctly named, placed, and referenced)
|
718,770 |
30.01.2017 12:54:42
| 18,000 |
a96e5d184c6ca79455b6ed4f9867e12e4e4189bb
|
BugFix: B.W now correctly has IF_NOFALL
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -410,7 +410,7 @@ def branch_misc(va, val, val2): # bl and misc control\nelif op1 & 0b101 == 1: # T4 encoding\nopcode = INS_B\n- flags = envi.IF_BRANCH | IF_W\n+ flags = envi.IF_BRANCH | IF_THUMB32 | envi.IF_NOFALL\n# need next two bytes\nS = (val>>10)&1\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
BugFix: B.W now correctly has IF_NOFALL
|
718,770 |
06.02.2017 12:01:10
| 18,000 |
ee3f8273150eb1424536dc1935b2a40c4c928b8f
|
bugfix: miscellaneous control instructions: op val reset
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -204,6 +204,7 @@ def branch_misc(va, val, val2): # bl and misc control\nif op & 0b111 == 0b011:\n# miscellaneous control instructions\n+ op = (val2>>4) & 0xf\nopcode, mnem, barrier = misc_ctl_instrs[op]\nif barrier:\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
bugfix: miscellaneous control instructions: op val reset
|
718,770 |
08.02.2017 17:04:12
| 18,000 |
65832221b2bf0170d62588c8f76772c672a1ca5a
|
decode fixes
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -3914,6 +3914,9 @@ class ArmBarrierOption(ArmOperand):\ndef repr(self, op):\nreturn self.retOption()\n+ def getOperValue(self, idx, emu=None):\n+ return None\n+\nclass ArmCPSFlagsOper(ArmOperand):\ndef __init__(self, flags):\nself.flags = flags\n@@ -3922,6 +3925,9 @@ class ArmCPSFlagsOper(ArmOperand):\nflags = [AIF_FLAGS[x] for x in range(3) if self.flags & (1<<x)]\nreturn ','.join(flags)\n+ def getOperValue(self, idx, emu=None):\n+ return None\n+\nAIF_FLAGS = ('a','i','f')[::-1]\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -601,6 +601,9 @@ class ThumbITOper(ArmOperand):\nnextfew = ''.join(itbytes)\nmcanv.addText(\"%s %s\" % (nextfew, fcond))\n+ def getOperValue(self, idx, emu=None):\n+ return None\n+\ndef thumb32_01(va, val, val2):\nop = (val2>>15)&1\nop2 = (val>>4) & 0x7f\n@@ -1092,6 +1095,7 @@ def ldrd_imm_32(va, val1, val2):\noper2 = ArmImmOffsetOper(rn, imm8<<2, va=va, pubwl=pubwl)\nopers = (oper0, oper1, oper2)\n+ flags = 0\nreturn None, None, opers, flags, 0\ndef strexn_32(va, val1, val2):\n@@ -2286,7 +2290,7 @@ class ThumbDisasm:\nolist, nflags = opermkr(va+4, val)\nif nflags != None:\nflags = nflags\n- print \"FLAGS: \", repr(olist), repr(flags)\n+ #print \"FLAGS: \", repr(olist), repr(flags)\noplen = 2\n# print \"OPLEN (16bit): \", oplen\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
decode fixes
|
718,770 |
09.02.2017 16:10:28
| 18,000 |
2db6c94506ddd02a3773eb10d71e897e91df9b44
|
did it the visi way ;)
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/base.py",
"new_path": "vivisect/base.py",
"diff": "@@ -247,8 +247,7 @@ class VivWorkspaceCore(object,viv_impapi.ImportApi):\ndef _handleDELFUNCTION(self, einfo):\nself.funcmeta.pop(einfo)\n- if self.func_args.has_key(einfo):\n- self.func_args.pop(einfo)\n+ self.func_args.pop(einfo, None)\nself.codeblocks_by_funcva.pop(einfo)\nnode = self._call_graph.getNode(einfo)\nself._call_graph.delNode(node)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
did it the visi way ;)
|
718,770 |
14.02.2017 22:30:49
| 18,000 |
5a9e1804c39365dda8ffff0545fce1cf74e2ba71
|
ARM/THUMB decode/emulation improvements
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/emu.py",
"new_path": "envi/archs/arm/emu.py",
"diff": "@@ -211,7 +211,7 @@ class ArmEmulator(ArmModule, ArmRegisterContext, envi.Emulator):\npc = self.getProgramCounter()\nx = pc+op.size\n- # should we set this to the odd address or even during thumb? (debugger)\n+ # should we set this to the odd address or even during thumb? (debugger). ANS: Even. All addresses are Even. Track Mode elsewhere.\nself.setProgramCounter(x)\nfinally:\nself.setMeta('forrealz', False)\n@@ -1033,6 +1033,50 @@ class ArmEmulator(ArmModule, ArmRegisterContext, envi.Emulator):\nif regval:\nreturn imm32\n+ def i_smulbb(self, op):\n+ oper1 = op.getOperValue(1) & 0xffff\n+ oper2 = op.getOperValue(2) & 0xffff\n+\n+ s1 = e_bits.signed(oper1 & 0xffff, 2)\n+ s2 = e_bits.signed(oper2 & 0xffff, 2)\n+\n+ result = s1 * s2\n+\n+ op.setOperValue(0, result)\n+\n+ def i_smultb(self, op):\n+ oper1 = op.getOperValue(1) & 0xffff\n+ oper2 = op.getOperValue(2) & 0xffff\n+\n+ s1 = e_bits.signed(oper1 >> 16, 2)\n+ s2 = e_bits.signed(oper2 & 0xffff, 2)\n+\n+ result = s1 * s2\n+\n+ op.setOperValue(0, result)\n+\n+ def i_smulbt(self, op):\n+ oper1 = op.getOperValue(1) & 0xffff\n+ oper2 = op.getOperValue(2) & 0xffff\n+\n+ s1 = e_bits.signed(oper1 & 0xffff, 2)\n+ s2 = e_bits.signed(oper2 >> 16, 2)\n+\n+ result = s1 * s2\n+\n+ op.setOperValue(0, result)\n+\n+ def i_smultt(self, op):\n+ oper1 = op.getOperValue(1) & 0xffff\n+ oper2 = op.getOperValue(2) & 0xffff\n+\n+ s1 = e_bits.signed(oper1 >>16, 2)\n+ s2 = e_bits.signed(oper2 >>16, 2)\n+\n+ result = s1 * s2\n+\n+ op.setOperValue(0, result)\n+\ndef i_tb(self, op):\n# TBB and TBH both come here.\ntblbase = op.getOperValue(0)\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -454,7 +454,7 @@ def branch_misc(va, val, val2): # bl and misc control\nif s:\nimm |= 0xff000000\n- oper0 = ArmPcOffsetOper(e_bits.signed(imm,4), va=va)\n+ oper0 = ArmPcOffsetOper(e_bits.signed(imm,4), va=va&0xfffffffc)\nreturn opcode, mnem, (oper0, ), flags, 0\n@@ -504,7 +504,7 @@ def pop_reglist(va, value):\nreglist = (value & 0xff) | ((value & 0x100)<<7)\noper0 = ArmRegListOper(reglist)\nif reglist & 0x8000:\n- flags |= envi.IF_NOFALL\n+ flags |= envi.IF_NOFALL | envi.IF_RET\nreturn (oper0,), flags\n@@ -947,6 +947,18 @@ def ldm_32(va, val1, val2):\nreturn None, None, opers, None, 0\ndef pop_32(va, val1, val2):\n+ if val2 & 0x2000:\n+ raise InvalidInstruction(\"LDM instruction with stack indicated: 0x%x: 0x%x, 0x%x\" % (va, val1, val2))\n+ # PC not ok on some instructions...\n+ oper0 = ArmRegListOper(val2)\n+ opers = (oper0, )\n+ flags = IF_THUMB32\n+ if val2 & 0x8000:\n+ flags |= envi.IF_NOFALL | envi.IF_RET\n+\n+ return None, None, opers, flags, 0\n+\n+def push_32(va, val1, val2):\nif val2 & 0x2000:\nraise InvalidInstruction(\"LDM instruction with stack indicated: 0x%x: 0x%x, 0x%x\" % (va, val1, val2))\n# PC not ok on some instructions...\n@@ -1928,7 +1940,7 @@ thumb_base = [\n('010001010', (30,'cmp', d1_rm4_rd3, 0)), # CMP<c> <Rn>,<Rm>\n('010001011', (31,'cmp', d1_rm4_rd3, 0)), # CMP<c> <Rn>,<Rm>\n('01000110', (34,'mov', d1_rm4_rd3, 0)), # MOV<c> <Rd>,<Rm>\n- ('010001110', (35,'bx', rm4_shift3, envi.IF_NOFALL)), # BX<c> <Rm>\n+ ('010001110', (35,'bx', rm4_shift3, envi.IF_NOFALL)), # BX<c> <Rm> # FIXME: check for IF_RET\n('010001111', (36,'blx', rm4_shift3, envi.IF_CALL)), # BLX<c> <Rm>\n# Load from Litera7 Pool\n('01001', (37,'ldr', rt_pc_imm8, 0)), # LDR<c> <Rt>,<label>\n@@ -2036,7 +2048,7 @@ thumb2_extension = [\n('11101001001010', (85,'stm', ldm_32, IF_THUMB32|IF_W|IF_DB)), # not 101101\n('111010010010111', (85,'stm', ldm_32, IF_THUMB32|IF_W|IF_DB)), # not 101101\n('1110100100101100',(85,'stm', ldm_32, IF_THUMB32|IF_W|IF_DB)), # not 101101\n- ('1110100100101101',(85,'push', pop_32, IF_THUMB32|IF_W)), # 101101 - push\n+ ('1110100100101101',(85,'push', push_32, IF_THUMB32|IF_W)), # 101101 - push\n('111010010011', (85,'ldm', ldm_32, IF_THUMB32|IF_W|IF_DB)), # ldmdb/ldmea\n('111010011000', (85,'srs', ldm_reg_mode_32, IF_THUMB32|IF_IA)),\n@@ -2146,6 +2158,7 @@ thumb2_extension = [\n('11110111111', (85,'branchmisc', branch_misc, IF_THUMB32)),\n('111110000001', (None, 'ldrb_memhints32', ldrb_memhints_32, IF_THUMB32)),\n('111110000010', (INS_STR, 'str', ldr_puw_32, IF_H | IF_THUMB32)),\n+ ('111110000011', (INS_LDR, 'ldr', ldr_puw_32, IF_H | IF_THUMB32)),\n('111110000100', (INS_STR, 'str', ldr_puw_32, IF_THUMB32)), # T4 encoding\n('111110000101', (INS_LDR, 'ldr', ldr_puw_32, IF_THUMB32)), # T4 encoding\n('111110001001', (None, 'ldrb_memhints32', ldrb_memhints_32, IF_THUMB32)),\n@@ -2283,6 +2296,7 @@ class ThumbDisasm:\nopcode = nopcode\nif nflags != None:\nflags = nflags\n+ #print \"FLAGS: \", repr(olist), repr(flags)\noplen = 4\n# print \"OPLEN: \", oplen\n@@ -2310,7 +2324,7 @@ class ThumbDisasm:\nflags |= envi.IF_NOFALL\nop = ThumbOpcode(va, opcode, mnem, 0xe, oplen, olist, flags, simdflags)\n- #print hex(va), oplen, len(op), op.size\n+ #print hex(va), oplen, len(op), op.size, hex(op.iflags)\nreturn op\nclass Thumb16Disasm ( ThumbDisasm ):\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
ARM/THUMB decode/emulation improvements
|
718,770 |
14.02.2017 22:55:31
| 18,000 |
c38a3a0b4d17b13b7beb0339a443be61a886d83c
|
move badops into the envi architecture where it belongs.
|
[
{
"change_type": "MODIFY",
"old_path": "envi/__init__.py",
"new_path": "envi/__init__.py",
"diff": "@@ -78,6 +78,7 @@ class ArchitectureModule:\nself._arch_id = getArchByName(archname)\nself._arch_name = archname\nself._arch_maxinst = maxinst\n+ self._arch_badopbytes = ['\\x00\\x00\\x00\\x00\\x00']\ndef getArchId(self):\n'''\n@@ -139,6 +140,22 @@ class ArchitectureModule:\nallr = [rname for rname in regctx.getRegisterNames()]\nreturn [ ('all', allr), ]\n+ def archGetBadOps(self, byteslist=None):\n+ '''\n+ Returns a list of opcodes which are indicators of wrong disassembly.\n+ byteslist is None to use the architecture default, or can be a custom list.\n+ '''\n+ if byteslist == None:\n+ byteslist = self._arch_badopbytes\n+\n+ badops = []\n+ for badbytes in byteslist:\n+ try:\n+ self.badops.append(self.archParseOpcode(badbytes))\n+ except:\n+ pass\n+\n+ return badops\ndef getEmulator(self):\n\"\"\"\nReturn a default instance of an emulator for the given arch.\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/amd64/emulation.py",
"new_path": "vivisect/analysis/amd64/emulation.py",
"diff": "@@ -20,11 +20,11 @@ class AnalysisMonitor(viv_monitor.AnalysisMonitor):\nviv_monitor.AnalysisMonitor.__init__(self, vw, fva)\nself.addDynamicBranchHandler(vag_switch.analyzeJmp)\nself.retbytes = None\n- self.badop = vw.arch.archParseOpcode(\"\\x00\\x00\\x00\\x00\\x00\")\n+ self.badops = vw.arch.archGetBadOps()\ndef prehook(self, emu, op, starteip):\n- if op == self.badop:\n+ if op in self.badops:\nraise Exception(\"Hit known BADOP at 0x%.8x %s\" % (starteip, repr(op) ))\nviv_monitor.AnalysisMonitor.prehook(self, emu, op, starteip)\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/generic/emucode.py",
"new_path": "vivisect/analysis/generic/emucode.py",
"diff": "@@ -26,10 +26,7 @@ class watcher(viv_imp_monitor.EmulationMonitor):\nself.lastop = None\nself.badcode = False\n- try:\n- self.badops = [vw.arch.archParseOpcode(\"\\x00\\x00\\x00\\x00\\x00\")]\n- except:\n- self.badops = []\n+ self.badops = vw.arch.archGetBadOps()\ndef logAnomaly(self, emu, eip, msg):\nself.badcode = True\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/analysis/i386/calling.py",
"new_path": "vivisect/analysis/i386/calling.py",
"diff": "@@ -44,10 +44,10 @@ class AnalysisMonitor(viv_imp_monitor.AnalysisMonitor):\ndef __init__(self, vw, fva):\nviv_imp_monitor.AnalysisMonitor.__init__(self, vw, fva)\nself.retbytes = None\n- self.badop = vw.arch.archParseOpcode(\"\\x00\\x00\\x00\\x00\\x00\")\n+ self.badops = vw.arch.archGetBadOps()\ndef prehook(self, emu, op, starteip):\n- if op == self.badop:\n+ if op in self.badops:\nraise Exception(\"Hit known BADOP at 0x%.8x %s\" % (starteip, repr(op) ))\nviv_imp_monitor.AnalysisMonitor.prehook(self, emu, op, starteip)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
move badops into the envi architecture where it belongs.
|
718,770 |
22.02.2017 14:34:24
| 18,000 |
8d91598fda80acae6dfeca12299eaaaafb9a694a
|
ARM/THUMB using architecture-dependent BadOps
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/__init__.py",
"new_path": "envi/archs/arm/__init__.py",
"diff": "@@ -29,6 +29,11 @@ class ArmModule(envi.ArchitectureModule):\ndef archGetNopInstr(self):\nreturn '\\x00'\n+ def archGetBadOps(self):\n+ oplist = [ self.archParseOpcode(badop,0,0) for badop in self._arch_badopbytes ]\n+ oplist.extend([ self.archParseOpcode(badop,0,1) for badop in self._arch_badopbytes ])\n+ return oplist\n+\ndef getPointerSize(self):\nreturn 4\n@@ -90,6 +95,11 @@ class ThumbModule(envi.ArchitectureModule):\ndef archGetNopInstr(self):\nreturn '\\x00'\n+ def archGetBadOps(self):\n+ oplist = [ self.archParseOpcode(badop,0,0) for badop in self._arch_badopbytes ]\n+ oplist.extend([ self.archParseOpcode(badop,0,1) for badop in self._arch_badopbytes ])\n+ return oplist\n+\ndef getPointerSize(self):\nreturn 4\n"
},
{
"change_type": "MODIFY",
"old_path": "vivisect/impemu/emulator.py",
"new_path": "vivisect/impemu/emulator.py",
"diff": "@@ -360,8 +360,10 @@ class WorkspaceEmulator:\nif op.iflags & envi.IF_RET:\nvg_path.setNodeProp(self.curpath, 'cleanret', True)\nbreak\n+\nexcept envi.UnsupportedInstruction, e:\nif self.strictops:\n+ print \"STRICTOPS: BREAK!\"\nbreak\nelse:\nprint 'runFunction continuing after unsupported instruction: 0x%08x %s' % (e.op.va, e.op.mnem)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
ARM/THUMB using architecture-dependent BadOps
|
718,770 |
22.02.2017 14:35:37
| 18,000 |
938fdab5e6e2752d4efdf13f86def3e4a5f24175
|
more vector instructions decoded
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/const.py",
"new_path": "envi/archs/arm/const.py",
"diff": "@@ -96,40 +96,44 @@ IFS_VH = 1<<4 # Adv SIMD: operation halves the result\nIFS_SYS_MODE = 1<<8 # instruction is encoded to be executed in SYSTEM mode, not USER mode\nIFS_SFUI_START = 9\n-IFS_F32 = 1<<9 # F64 SIMD\n-IFS_F64 = 1<<10 # F64 SIMD\n-IFS_F32S32 = 1<<11 # F64 SIMD\n-IFS_F64S32 = 1<<12 # F64 SIMD\n-IFS_F32U32 = 1<<13 # F64 SIMD\n-IFS_F64U32 = 1<<14 # F64 SIMD\n-IFS_F3264 = 1<<15 # F64 SIMD\n-IFS_F6432 = 1<<16 # F64 SIMD\n-IFS_F3216 = 1<<17 # F64 SIMD\n-IFS_F1632 = 1<<18 # F64 SIMD\n-IFS_S32F64 = 1<<19 # F64 SIMD\n-IFS_S32F32 = 1<<20 # F64 SIMD\n-IFS_U32F64 = 1<<21 # F64 SIMD\n-IFS_U32F32 = 1<<22 # F64 SIMD\n-IFS_S8 = 1<<23 # F64 SIMD\n-IFS_S16 = 1<<24 # F64 SIMD\n-IFS_S32 = 1<<25 # F64 SIMD\n-IFS_S64 = 1<<26 # F64 SIMD\n-IFS_U8 = 1<<27 # F64 SIMD\n-IFS_U16 = 1<<28 # F64 SIMD\n-IFS_U32 = 1<<29 # F64 SIMD\n-IFS_U64 = 1<<30 # F64 SIMD\n-IFS_I8 = 1<<81 # F64 SIMD\n-IFS_I16 = 1<<32 # F64 SIMD\n-IFS_I32 = 1<<33 # F64 SIMD\n-IFS_I64 = 1<<34 # F64 SIMD\n-IFS_8 = 1<<35 # F64 SIMD\n-IFS_16 = 1<<36 # F64 SIMD\n-IFS_32 = 1<<37 # F64 SIMD\n-IFS_64 = 1<<38 # F64 SIMD\n+IFS_F32 = 1<<9\n+IFS_F64 = 1<<10\n+IFS_F32S32 = 1<<11\n+IFS_F64S32 = 1<<12\n+IFS_F32U32 = 1<<13\n+IFS_F64U32 = 1<<14\n+IFS_F3264 = 1<<15\n+IFS_F6432 = 1<<16\n+IFS_F3216 = 1<<17\n+IFS_F1632 = 1<<18\n+IFS_S32F64 = 1<<19\n+IFS_S32F32 = 1<<20\n+IFS_U32F64 = 1<<21\n+IFS_U32F32 = 1<<22\n+IFS_S8 = 1<<23\n+IFS_S16 = 1<<24\n+IFS_S32 = 1<<25\n+IFS_S64 = 1<<26\n+IFS_U8 = 1<<27\n+IFS_U16 = 1<<28\n+IFS_U32 = 1<<29\n+IFS_U64 = 1<<30\n+IFS_I8 = 1<<31\n+IFS_I16 = 1<<32\n+IFS_I32 = 1<<33\n+IFS_I64 = 1<<34\n+IFS_8 = 1<<35\n+IFS_16 = 1<<36\n+IFS_32 = 1<<37\n+IFS_64 = 1<<38\nIFS_F8 = 1<<39\nIFS_F16 = 1<<40\nIFS_F32 = 1<<41\nIFS_F64 = 1<<42\n+IFS_P8 = 1<<43\n+IFS_P16 = 1<<44\n+IFS_P32 = 1<<45\n+IFS_P64 = 1<<46\nIFS_SFUI_STOP = 39\n@@ -400,122 +404,139 @@ INS_STR = instrenc(IENC_LOAD_IMM_OFF, 1)\nno_update_Rd = (INS_TST, INS_TEQ, INS_CMP, INS_CMN, )\ninstrnames = [\n- 'INS_VHADD',\n- 'INS_VQADD',\n- 'INS_VRHADD',\n- 'INS_VAND',\n- 'INS_VBIC',\n- 'INS_VORR',\n- 'INS_VORN',\n- 'INS_VEOR',\n- 'INS_VBIF',\n- 'INS_VBIT',\n- 'INS_VBSL',\n- 'INS_VHSUB',\n- 'INS_VQSUB',\n- 'INS_VCGT',\n- 'INS_VCGE',\n- 'INS_VCEQ',\n- 'INS_VSHL',\n- 'INS_VQSHL',\n- 'INS_VRSHL',\n- 'INS_VQRSHL',\n- 'INS_VMAX',\n- 'INS_VMIN',\n- 'INS_VABD',\n- 'INS_VABA',\n- 'INS_VADD',\n- 'INS_VSUB',\n- 'INS_VTST',\n- 'INS_VMLA',\n- 'INS_VMLS',\n- 'INS_VMUL',\n- 'INS_VPMAX',\n- 'INS_VPMIN',\n- 'INS_VQMULH',\n- 'INS_VQDMULH',\n- 'INS_VQRDMULH',\n- 'INS_VPADD',\n- 'INS_VPSUB',\n- 'INS_VFMA',\n- 'INS_VFMS',\n- 'INS_VACGE',\n- 'INS_VACGT',\n- 'INS_VRECPS',\n- 'INS_VRSQRTS',\n- 'INS_VMOV',\n- 'INS_VMVN',\n- 'INS_VSHR',\n- 'INS_VSRA',\n- 'INS_VRSHR',\n- 'INS_VRSRA',\n- 'INS_VSLI',\n- 'INS_VSRI',\n- 'INS_VQSHLU',\n- 'INS_VSHRN',\n- 'INS_VRSHRN',\n- 'INS_VQSHRN',\n- 'INS_VQSHRUN',\n- 'INS_VQRSHRN',\n- 'INS_VQRSHRUN',\n- 'INS_VSHLL',\n- 'INS_VCVT',\n- #'INS_LDRB',\n- #'INS_STRB',\n- 'INS_SMUL',\n- 'INS_UADD16',\n- 'INS_UADD8',\n- 'INS_USUB16',\n- 'INS_USUB8',\n- 'INS_UASX',\n- 'INS_USAX',\n- 'INS_NOP',\n- 'INS_YIELD',\n- 'INS_WFE',\n- 'INS_WFI',\n- 'INS_SEV',\n- 'INS_CPS',\n- 'INS_CBZ',\n- 'INS_CBNZ',\n- 'INS_STRH',\n- #'INS_LDRH',\n- 'INS_LEAVEX',\n- 'INS_ENTERX',\n- 'INS_TB',\n- 'INS_LDREX',\n- 'INS_ORN',\n- 'INS_PKH',\n- 'INS_LSL',\n- 'INS_LSR',\n- 'INS_ASR',\n- 'INS_ROR',\n- 'INS_RRX',\n- 'INS_DBG',\n- 'INS_BF',\n- 'INS_CLREX',\n- 'INS_DMB',\n- 'INS_DSB',\n- 'INS_ISB',\n- #'INS_LDRSB',\n- 'INS_PLD',\n- 'INS_PLI',\n- 'INS_IT',\n- 'INS_MLA',\n- 'INS_SXTAH',\n- 'INS_SXTH',\n- 'INS_SXTAB16',\n- 'INS_SXTAB',\n- 'INS_SXTB16',\n- 'INS_SXTB',\n- 'INS_UXTAH',\n- 'INS_UXTH',\n- 'INS_UXTAB16',\n- 'INS_UXTAB',\n- 'INS_UXTB16',\n- 'INS_UXTB',\n+ 'VHADD',\n+ 'VQADD',\n+ 'VRHADD',\n+ 'VAND',\n+ 'VBIC',\n+ 'VORR',\n+ 'VORN',\n+ 'VEOR',\n+ 'VBIF',\n+ 'VBIT',\n+ 'VBSL',\n+ 'VHSUB',\n+ 'VQSUB',\n+ 'VCGT',\n+ 'VCGE',\n+ 'VCEQ',\n+ 'VSHL',\n+ 'VQSHL',\n+ 'VRSHL',\n+ 'VQRSHL',\n+ 'VMAX',\n+ 'VMIN',\n+ 'VABD',\n+ 'VABA',\n+ 'VADD',\n+ 'VSUB',\n+ 'VTST',\n+ 'VMLA',\n+ 'VMLS',\n+ 'VMUL',\n+ 'VPMAX',\n+ 'VPMIN',\n+ 'VQMULH',\n+ 'VQDMULH',\n+ 'VQRDMULH',\n+ 'VPADD',\n+ 'VPSUB',\n+ 'VFMA',\n+ 'VFMS',\n+ 'VACGE',\n+ 'VACGT',\n+ 'VRECPS',\n+ 'VRSQRTS',\n+ 'VMOV',\n+ 'VMVN',\n+ 'VSHR',\n+ 'VSRA',\n+ 'VRSHR',\n+ 'VRSRA',\n+ 'VSLI',\n+ 'VSRI',\n+ 'VQSHLU',\n+ 'VSHRN',\n+ 'VRSHRN',\n+ 'VQSHRN',\n+ 'VQSHRUN',\n+ 'VQRSHRN',\n+ 'VQRSHRUN',\n+ 'VSHLL',\n+ 'VCVT',\n+ #'LDRB',\n+ #'STRB',\n+ 'SMUL',\n+ 'UADD16',\n+ 'UADD8',\n+ 'USUB16',\n+ 'USUB8',\n+ 'UASX',\n+ 'USAX',\n+ 'NOP',\n+ 'YIELD',\n+ 'WFE',\n+ 'WFI',\n+ 'SEV',\n+ 'CPS',\n+ 'CBZ',\n+ 'CBNZ',\n+ 'STRH',\n+ #'LDRH',\n+ 'LEAVEX',\n+ 'ENTERX',\n+ 'TB',\n+ 'LDREX',\n+ 'ORN',\n+ 'PKH',\n+ 'LSL',\n+ 'LSR',\n+ 'ASR',\n+ 'ROR',\n+ 'RRX',\n+ 'DBG',\n+ 'BF',\n+ 'CLREX',\n+ 'DMB',\n+ 'DSB',\n+ 'ISB',\n+ #'LDRSB',\n+ 'PLD',\n+ 'PLI',\n+ 'IT',\n+ 'MLA',\n+ 'SXTAH',\n+ 'SXTH',\n+ 'SXTAB16',\n+ 'SXTAB',\n+ 'SXTB16',\n+ 'SXTB',\n+ 'UXTAH',\n+ 'UXTH',\n+ 'UXTAB16',\n+ 'UXTAB',\n+ 'UXTB16',\n+ 'UXTB',\n+ 'VADDL',\n+ 'VADDW',\n+ 'VSUBL',\n+ 'VSUBW',\n+ 'VADDHN',\n+ 'VRADDHN',\n+ 'VSUBHN',\n+ 'VRSUBHN',\n+ 'VABAL',\n+ 'VABDL',\n+ 'VMLAL',\n+ 'VMLSL',\n+ 'VQDMLAL',\n+ 'VQDMLSL',\n+ 'VMULL',\n+ 'VQDMULL',\n+\n]\nins_index = 85\nfor instr in instrnames:\n- globals()[instr] = ins_index\n+ globals()['INS_' + instr] = ins_index\nins_index += 1\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -2006,6 +2006,56 @@ adv_simd_1modimm = (\n('vector UNDEF', None, 0, None),\n)\n+adv_simd_3diffregs = (\n+ # a=0, u=0\n+ ('vaddl', INS_VADDL, 0, 1, 0, 0),\n+ ('vaddl', INS_VADDL, 4, 1, 0, 0),\n+ ('vaddw', INS_VADDW, 0, 1, 1, 0),\n+ ('vaddw', INS_VADDW, 4, 1, 1, 0),\n+ ('vsubl', INS_VSUBL, 0, 1, 0, 0),\n+ ('vsubl', INS_VSUBL, 4, 1, 0, 0),\n+ ('vsubw', INS_VSUBW, 0, 1, 1, 0),\n+ ('vsubw', INS_VSUBW, 4, 1, 1, 0),\n+ # a=4, u=0/1\n+ ('vaddhn', INS_VADDHN, 8, 0, 1, 1),\n+ ('vraddhn', INS_VRADDHN, 8, 0, 1, 1),\n+ # a=5, u=0/1\n+ ('vaba', INS_VABA, 0, 1, 0, 0),\n+ ('vabal', INS_VABAL, 4, 1, 0, 0),\n+ # a=6\n+ ('vsubhn', INS_VSUBHN, 8, 0, 1, 1),\n+ ('vrsubhn', INS_VRSUBHN, 8,0, 1, 1),\n+ # a=7\n+ ('vabd', INS_VABD, 0, 1, 0, 0),\n+ ('vabdl', INS_VABDL, 4, 1, 0, 0),\n+ # a=8\n+ ('vmlal', INS_VMLAL, 0, 1, 0, 0),\n+ ('vmlal', INS_VMLAL, 4, 1, 0, 0),\n+ # a=9\n+ ('vqdmlal', INS_VQDMLAL, 0, 1, 0, 0),\n+ ('ERROR_vqdmlal', INS_VQDMLAL, 4, 1, 0, 0),\n+ # a=0xa\n+ ('vmlsl', INS_VMLSL, 0, 1, 0, 0),\n+ ('vmlsl', INS_VMLSL, 4, 1, 0, 0),\n+ # a=0xb\n+ ('vqdmlsl', INS_VQDMLSL, 0, 1, 0, 0), # FIXME: TESTME thumb: 0xef9349a5, 0xefe34ba5\n+ ('ERROR_vqdmlsl', INS_VQDMLSL, 0, 1, 0, 0),\n+ # a=0xc\n+ ('vmull', INS_VMULL, 0, 1, 0, 0),\n+ ('vmull', INS_VMULL, 4, 1, 0, 0),\n+ # a=0xd\n+ ('vqdmull', INS_VQDMULL, 0, 1, 0, 0),\n+ ('ERROR_vqdmull', INS_VQDMULL, 0, 1, 0, 0),\n+ # a=0xe\n+ ('vmull', INS_VMULL, 12,1, 0, 0),\n+ ('vmull', INS_VMULL, 12,1, 0, 0),\n+ )\n+\n+adv_simd_dts = (IFS_S8, IFS_S16, IFS_S32, IFS_S64,\n+ IFS_U8, IFS_U16, IFS_U32, IFS_U64,\n+ IFS_I8, IFS_I16, IFS_I32, IFS_I64,\n+ IFS_P8, IFS_P16, IFS_P32, IFS_P64)\n+\ndef adv_simd_32(val, va):\nu = (val>>24) & 1\nreturn _do_adv_simd_32(val, va, u)\n@@ -2020,11 +2070,15 @@ def _do_adv_simd_32(val, va, u):\n# shared\nq = (val >> 6) & 0x1\n- rbase = ('d%d', 'q%d')[q]\nd = (val >> 18) & 0x10\nd |= ((val >> 12) & 0xf)\n- d >>= q\n+\n+ n = (val >> 3) & 0x10\n+ n |= ((val >> 16) & 0xf)\n+\n+ m = (val >> 1) & 0x10\n+ m |= (val & 0xf)\nif not (a & 0x10):\n# three registers of the same length\n@@ -2032,15 +2086,12 @@ def _do_adv_simd_32(val, va, u):\nb = (val>>4) & 1\nc = (val>>20) & 3\n+ rbase = ('d%d', 'q%d')[q]\nindex = c | (u<<2) | (b<<3) | (a<<4)\nmnem, opcode, simdflags, handler = adv_simd_3_regs[index]\n- n = (val >> 3) & 0x10\n- n |= ((val >> 16) & 0xf)\n+ d >>= q\nn >>= q\n-\n- m = (val >> 1) & 0x10\n- m |= (val & 0xf)\nm >>= q\nopers = (\n@@ -2065,14 +2116,16 @@ def _do_adv_simd_32(val, va, u):\n# one register and modified immediate\nop = (c>>1) & 1\ncmode = b\n- index = (op<<4) | cmode\n+ rbase = ('d%d', 'q%d')[q]\n+ index = (op<<4) | cmode\nmnem, opcode, simdflags, handler = adv_simd_1modimm[index]\nabcdefgh = (u<<7) | ((val>>12) & 0x70) | (val & 0xf)\ndt, val = adv_simd_modifiers[index](abcdefgh)\n+ d >>= q\nopers = (\nArmRegOper(rctx.getRegisterIndex(rbase%d)),\nArmImmOper(val),\n@@ -2087,12 +2140,10 @@ def _do_adv_simd_32(val, va, u):\nb = (val>>6) & 1\nl = (val>>7) & 1\n+ rbase = ('d%d', 'q%d')[q]\nindex = (a<<3) | (u<<2) | (b<<1) | l\n-\nmnem, opcode, enctype = adv_2regs[index]\n- m = (val>>1) & 0x10 # bit 5 but wants to be bit 4\n- m |= (val & 0xf)\nm >>= q\nimm = (val >> 16) & 0x3f\n@@ -2170,11 +2221,66 @@ def _do_adv_simd_32(val, va, u):\nsimdflags = adv_2_vqshl_typesize.get(esize)[uop]\nelif enctype == 3:\n- raise Exception('adv_simd 2 reg shift imm, enctype:3 NOT IMPLEMENTED!')\n+ limm = (l<<6) | imm\n+ if limm & 0b1000000:\n+ esize = 64\n+ elements = 1\n+ shift_amount = 64-imm\n+ elif limm & 0b0100000:\n+ esize = 32\n+ elements = 2\n+ shift_amount = 64-imm\n+ elif limm & 0b0010000:\n+ esize = 16\n+ elements = 4\n+ shift_amount = 32-imm\n+ elif limm & 0b0001000:\n+ esize = 8\n+ elements = 8\n+ shift_amount = 16-imm\n+\n+ simdflags = { 8: IFS_I8, 16: IFS_I16, 32: IFS_I32, 64: IFS_I64 }[esize]\n+\nelif enctype == 4:\n- pass\n- elif enctype == 5:\n- pass\n+ limm = (l<<6) | imm\n+\n+ if not (limm & 0b111):\n+ raise Exception(\"MUST MAKE THIS DO vmovl ENCODING\")\n+\n+ op = a & 1\n+\n+ if limm & 0b1000000:\n+ esize = 64\n+ elements = 1\n+ shift_amount = imm\n+ elif limm & 0b0100000:\n+ esize = 32\n+ elements = 2\n+ shift_amount = imm - 32\n+ elif limm & 0b0010000:\n+ esize = 16\n+ elements = 4\n+ shift_amount = imm - 16\n+ elif limm & 0b0001000:\n+ esize = 8\n+ elements = 8\n+ shift_amount = imm - 8\n+\n+ uop = (u<<1) | op\n+ simdflags = adv_2_vqshl_typesize.get(esize)[uop]\n+\n+ elif enctype == 5: # VCVT\n+ limm = (l<<6) | imm\n+\n+ if not (limm & 0b111000):\n+ raise Exception(\"VCVT but should be decoding as oneRegModImm\")\n+\n+ op = a & 1\n+ uop = (u<<1) | op\n+ simdflags = (IF_F32_S32, IF_S32_F32, IF_F32_U32, IF_U32_F32)[uop]\n+\n+ # fbits\n+ shift_amount = imm + 64\nopers = (\nArmRegOper(rctx.getRegisterIndex(rbase%d)),\n@@ -2184,13 +2290,41 @@ def _do_adv_simd_32(val, va, u):\nreturn opcode, mnem, opers, 0, simdflags\n-################################ FIXME: CONTINUE WORKING AdvSIMD HERE #######################3\n- elif (a < 0x16):\n- print \"AdvSIMD: HIT a<0x16\"\n+ elif ((a & 0x16) < 0x16):\nif (c & 0x5) == 0:\n# three registers of different lengths\n- pass\n+ a = (val >> 8) & 0xf\n+ b = (val >> 20) & 0x3\n+ size = b\n+ idx = (a<<1) | u\n+\n+ mnem, opcode, flagoff, dt, nt, mt = adv_simd_3diffregs[idx]\n+\n+ op = a & 1\n+\n+ d >>= dt\n+ n >>= nt\n+ m >>= mt\n+\n+ rbase = ('d%d', 'q%d')\n+ dbase = rbase[dt]\n+ mbase = rbase[mt]\n+ nbase = rbase[nt]\n+\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex(dbase%d)),\n+ ArmRegOper(rctx.getRegisterIndex(nbase%n)),\n+ ArmRegOper(rctx.getRegisterIndex(mbase%m)),\n+ )\n+\n+ szu = size + flagoff\n+ simdflags = adv_simd_dts[szu]\n+\n+ return opcode, mnem, opers, 0, simdflags\n+\n+\n+################################ FIXME: CONTINUE WORKING AdvSIMD HERE #######################3\nelif (c & 0x5) == 0x4:\n# two registers and a scalar\npass\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_arm.py",
"new_path": "envi/tests/test_arch_arm.py",
"diff": "@@ -1234,6 +1234,9 @@ instrs = [\n(REV_ALL_ARM, 'aff39a87', 0x4561, 'cpsid a, #0x1a', IF_ID, ()),\n(REV_ALL_ARM, 'aff31a81', 0x4561, 'cps #0x1a', 0, ()),\n+ (REV_ALL_ARM, 'efe34ba5', 0x4561, 'vqdmlsl.s32 q10, d19, d21', 0, ()),\n+ (REV_ALL_ARM, 'ef9349a5', 0x4561, 'vqdmlal.s16 q2, d19, d21', 0, ()),\n+\n]\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
more vector instructions decoded
|
718,770 |
22.02.2017 14:36:47
| 18,000 |
451e8c54122d421d8bb6adb736351d175f67c14c
|
emulating more arm instrs
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/emu.py",
"new_path": "envi/archs/arm/emu.py",
"diff": "@@ -699,6 +699,10 @@ class ArmEmulator(ArmModule, ArmRegisterContext, envi.Emulator):\nval = self.getOperValue(op, 1) << 16\nself.setOperValue(op, 0, val)\n+ def i_movw(self, op):\n+ val = self.getOperValue(op, 1)\n+ self.setOperValue(op, 0, val)\n+\n'''def i_adr(self, op):\nval = self.getOperValue(op, 1)\nself.setOperValue(op, 0, val)\n@@ -1083,6 +1087,17 @@ class ArmEmulator(ArmModule, ArmRegisterContext, envi.Emulator):\noff = op.getOperValue(1)\nreturn tblbase + (2*off)\n+ def i_ubfx(self, op):\n+ src = self.getOperValue(op, 1)\n+ lsb = self.getOperValue(op, 2)\n+ width = self.getOperValue(op, 3)\n+ mask = (1 << width) - 1\n+\n+ val = (src>>lsb) & mask\n+\n+ self.setOperValue(op, 0, val)\n+\n+\ndef i_umull(self, op):\nprint(\"FIXME: 0x%x: %s - in emu\" % (op.va, op))\ndef i_umlal(self, op):\n@@ -1094,6 +1109,9 @@ class ArmEmulator(ArmModule, ArmRegisterContext, envi.Emulator):\ndef i_umull(self, op):\nprint(\"FIXME: 0x%x: %s - in emu\" % (op.va, op))\n+\n+\n+\ndef i_pld2(self, op):\nprint(\"FIXME: 0x%x: %s - in emu\" % (op.va, op))\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
emulating more arm instrs
|
718,770 |
24.02.2017 17:47:29
| 18,000 |
d65d5b7d96b4361b3c60097c445269e03c1364b2
|
vector decoding improvements. almost done!
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/const.py",
"new_path": "envi/archs/arm/const.py",
"diff": "@@ -533,7 +533,24 @@ instrnames = [\n'VQDMLSL',\n'VMULL',\n'VQDMULL',\n-\n+ 'VEXT',\n+ 'VREV16',\n+ 'VREV32',\n+ 'VREV64',\n+ 'VPADDL',\n+ 'VCLS',\n+ 'VCLZ',\n+ 'VCNT',\n+ 'VPADAL',\n+ 'VQABS',\n+ 'VQNEG',\n+ 'VCLE',\n+ 'VCLT',\n+ 'VABS',\n+ 'VNEG',\n+ 'VDUP',\n+ 'VTBL',\n+ 'VTBX',\n]\nins_index = 85\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -2049,12 +2049,153 @@ adv_simd_3diffregs = (\n# a=0xe\n('vmull', INS_VMULL, 12,1, 0, 0),\n('vmull', INS_VMULL, 12,1, 0, 0),\n+ # a=0xf - nothing...\n+ ('ERROR', 0, 0,0,0,0),\n+ ('ERROR', 0, 0,0,0,0),\n)\nadv_simd_dts = (IFS_S8, IFS_S16, IFS_S32, IFS_S64,\nIFS_U8, IFS_U16, IFS_U32, IFS_U64,\nIFS_I8, IFS_I16, IFS_I32, IFS_I64,\n- IFS_P8, IFS_P16, IFS_P32, IFS_P64)\n+ IFS_P8, IFS_P16, IFS_P32, IFS_P64,\n+ IFS_F8, IFS_F16, IFS_F32, IFS_F64,\n+ IFS_8, IFS_16, IFS_32, IFS_64,\n+ 0,0,0,0)\n+\n+adv_simd_2regs_scalar = (\n+ # a=0\n+ ('vmla', INS_VMLA, 8, 0,0,0), # enc t1/a1\n+ ('vmla', INS_VMLA, 8, 1,1,0),\n+ # a=1\n+ ('vmla', INS_VMLA, 16, 0,0,0), # enc t1/a1 fp\n+ ('vmla', INS_VMLA, 16, 1,1,0), # fp\n+ # a=2\n+ ('vmlal', INS_VMLAL, 0, 1,0,0), # enc t2/a2\n+ ('vmlal', INS_VMLAL, 4, 1,0,0),\n+ # a=3\n+ ('vqdmlal', INS_VQDMLAL, 0, 1,0,0),\n+ #('vqdmlal', INS_VQDMLAL, 0, 1,0,0), # not defined\n+ (),\n+ # a=4\n+ ('vmls', INS_VMLS, 8, 0,0,0), # enc t1/a1\n+ ('vmls', INS_VMLS, 8, 1,1,0),\n+ # a=5\n+ ('vmls', INS_VMLS, 16, 0,0,0), # enc t1/a1\n+ ('vmls', INS_VMLS, 16, 1,1,0),\n+ # a=6\n+ ('vmlsl', INS_VMLSL, 0, 1,0,0), # enc t2/a2\n+ ('vmlsl', INS_VMLSL, 4, 1,0,0),\n+ # a=7\n+ ('vqdmlsl', INS_VQDMLSL, 0, 1,0,0),\n+ #('vqdmlsl', INS_VQDMLSL, 0, 1,0,0), # not defined\n+ (),\n+ # a=8\n+ ('vmul', INS_VMUL, 8, 0,0,0), # enc t1/a1\n+ ('vmul', INS_VMUL, 8, 1,1,0),\n+ # a=9\n+ ('vmul', INS_VMUL, 16, 0,0,0),\n+ ('vmul', INS_VMUL, 16, 1,1,0),\n+ # a=0xa\n+ ('vmull', INS_VMULL, 0, 1,0,0),\n+ ('vmull', INS_VMULL, 4, 1,0,0),\n+ # a=0xb\n+ ('vqdmull', INS_VQDMULL, 0, 1,0,0), # enc t2/a2\n+ #('vqdmull', INS_VQDMULL, 0, 1,0,0), # not defined\n+ (),\n+ # a=0xc\n+ ('vqdmulh', INS_VQDMULH, 0, 0,0,0), # enc t2/a2\n+ ('vqdmulh', INS_VQDMULH, 0, 1,1,0),\n+ # a=0xd\n+ ('vqrdmulh', INS_VQRDMULH, 0, 0,0,0), # enc t2/a2\n+ ('vqrdmulh', INS_VQRDMULH, 0, 1,1,0),\n+ # a=0xe\n+ # a=0xf\n+)\n+\n+adv_simd_2regs_misc = (\n+ # a=0 b=000xx\n+ ('vrev64', INS_VREV64, 20, 0,0),\n+ ('vrev64', INS_VREV64, 20, 1,1),\n+ ('vrev32', INS_VREV32, 20, 0,0),\n+ ('vrev32', INS_VREV32, 20, 1,1),\n+ # a=0 b=001xx\n+ ('vrev16', INS_VREV16, 20, 0,0),\n+ ('vrev16', INS_VREV16, 20, 1,1),\n+ ('error', INS_VREV16, 0, 0,0),\n+ ('error', INS_VREV16, 0, 1,1),\n+ # a=0 b=010xx\n+ ('vpaddl', INS_VPADDL, 0, 0,0),\n+ ('vpaddl', INS_VPADDL, 0, 1,1),\n+ ('vpaddl', INS_VPADDL, 4, 0,0),\n+ ('vpaddl', INS_VPADDL, 4, 1,1),\n+ # a=0 b=011xx\n+ ('error', INS_VPADDL, 0, 0,0),\n+ ('error', INS_VPADDL, 0, 0,0),\n+ ('error', INS_VPADDL, 0, 0,0),\n+ ('error', INS_VPADDL, 0, 0,0),\n+ # a=0 b=100xx\n+ ('vcls', INS_VCLS, 0, 0,0),\n+ ('vcls', INS_VCLS, 0, 1,1),\n+ ('vclz', INS_VCLZ, 8, 0,0),\n+ ('vclz', INS_VCLZ, 8, 1,1),\n+ # a=0 b=1010x\n+ ('vcnt', INS_VCNT, 20, 0,0),\n+ ('vcnt', INS_VCNT, 20, 1,1),\n+ ('vmvn', INS_VMVN, 24, 0,0),\n+ ('vmvn', INS_VMVN, 24, 1,1),\n+ # a=0 b=110xx\n+ ('vpadal', INS_VPADAL, 0, 0,0),\n+ ('vpadal', INS_VPADAL, 0, 1,1),\n+ ('vpadal', INS_VPADAL, 4, 0,0),\n+ ('vpadal', INS_VPADAL, 4, 1,1),\n+ # a=0 b=1110x\n+ ('vqabs', INS_VQABS, 0, 0,0),\n+ ('vqabs', INS_VQABS, 0, 1,1),\n+ # a=0 b=1111x\n+ ('vqneg', INS_VQNEG, 0, 0,0),\n+ ('vqneg', INS_VQNEG, 0, 1,1),\n+ # a=1 b=000xx\n+ ('vcgt', INS_VCGT, 0, 0,0),\n+ ('vcgt', INS_VCGT, 0, 1,1),\n+ ('vcge', INS_VCGE, 0, 0,0),\n+ ('vcge', INS_VCGE, 0, 1,1),\n+ # a=1 b=001xx\n+ ('vceq', INS_VCEQ, 0, 0,0),\n+ ('vceq', INS_VCEQ, 0, 1,1),\n+ ('vcle', INS_VCLE, 0, 0,0),\n+ ('vcle', INS_VCLE, 0, 1,1),\n+ # a=1 b=010xx\n+ ('vclt', INS_VCLT, 0, 0,0),\n+ ('vclt', INS_VCLT, 0, 1,1),\n+ ('error', INS_VCLE, 0, 0,0),\n+ ('error', INS_VCLE, 0, 1,1),\n+ # a=1 b=011xx\n+ ('vabs', INS_VABS, 0, 0,0),\n+ ('vabs', INS_VABS, 0, 1,1),\n+ ('vneg', INS_VNEG, 0, 0,0),\n+ ('vneg', INS_VNEG, 0, 1,1),\n+ # a=1 b=100xx\n+ ('vcgt', INS_VCGT, 16, 0,0),\n+ ('vcgt', INS_VCGT, 16, 1,1),\n+ ('vcge', INS_VCGE, 16, 0,0),\n+ ('vcge', INS_VCGE, 16, 1,1),\n+ # a=1 b=101xx\n+ ('vceq', INS_VCEQ, 16, 0,0),\n+ ('vceq', INS_VCEQ, 16, 1,1),\n+ ('vcle', INS_VCLE, 16, 0,0),\n+ ('vcle', INS_VCLE, 16, 1,1),\n+ # a=1 b=110xx\n+ ('vclt', INS_VCLT, 16, 0,0),\n+ ('vclt', INS_VCLT, 16, 1,1),\n+ ('error', INS_VCLE, 16, 0,0),\n+ ('error', INS_VCLE, 16, 1,1),\n+ # a=1 b=111xx\n+ ('vabs', INS_VABS, 16, 0,0),\n+ ('vabs', INS_VABS, 16, 1,1),\n+ ('vneg', INS_VNEG, 16, 0,0),\n+ ('vneg', INS_VNEG, 16, 1,1),\n+\n+)\ndef adv_simd_32(val, va):\nu = (val>>24) & 1\n@@ -2277,7 +2418,7 @@ def _do_adv_simd_32(val, va, u):\nop = a & 1\nuop = (u<<1) | op\n- simdflags = (IF_F32_S32, IF_S32_F32, IF_F32_U32, IF_U32_F32)[uop]\n+ simdflags = (IFS_F32S32, IFS_S32F32, IFS_F32U32, IFS_U32F32)[uop]\n# fbits\nshift_amount = imm + 64\n@@ -2291,14 +2432,12 @@ def _do_adv_simd_32(val, va, u):\nreturn opcode, mnem, opers, 0, simdflags\nelif ((a & 0x16) < 0x16):\n+ a = (val >> 8) & 0xf\n+ sz = (val >> 20) & 0x3\nif (c & 0x5) == 0:\n# three registers of different lengths\n- a = (val >> 8) & 0xf\n- b = (val >> 20) & 0x3\n- size = b\nidx = (a<<1) | u\n-\nmnem, opcode, flagoff, dt, nt, mt = adv_simd_3diffregs[idx]\nop = a & 1\n@@ -2318,32 +2457,118 @@ def _do_adv_simd_32(val, va, u):\nArmRegOper(rctx.getRegisterIndex(mbase%m)),\n)\n- szu = size + flagoff\n+ szu = sz + flagoff\nsimdflags = adv_simd_dts[szu]\nreturn opcode, mnem, opers, 0, simdflags\n-################################ FIXME: CONTINUE WORKING AdvSIMD HERE #######################3\nelif (c & 0x5) == 0x4:\n# two registers and a scalar\n- pass\n+ idx = (a<<1) | u\n+ mnem, opcode, flagoff, dt, nt, mt = adv_simd_2regs_scalar[idx]\n+\n+ if sz == 1:\n+ index = m >> 3\n+ m &= 7\n+ elif sz == 2:\n+ index = m >> 4\n+ m &= 0xf\n+\n+ d >>= dt\n+ n >>= nt\n+ m >>= mt\n+\n+ rbase = ('d%d', 'q%d')\n+ dbase = rbase[dt]\n+ mbase = rbase[mt]\n+ nbase = rbase[nt]\n+\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex(dbase%d)),\n+ ArmRegOper(rctx.getRegisterIndex(nbase%n)),\n+ ArmRegScalarOper(rctx.getRegisterIndex(mbase%m), index),\n+ )\n+\n+ szu = sz + flagoff\n+ simdflags = adv_simd_dts[szu]\n+\n+ return opcode, mnem, opers, 0, simdflags\n+\nelif (a & 0x16) == 0x16:\n- print \"AdvSIMD: HIT a & 0x16 == 0x16\"\nif u == 0:\n# vector extract VEXT\n- pass\n+ mnem = 'vext'\n+ opcode = INS_VEXT\n+\n+ imm4 = (val >> 8) & 0xf\n+\n+ rbase = ('d%d', 'q%d')[q]\n+ d >>= q\n+ n >>= q\n+ m >>= q\n+\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex(rbase%d)),\n+ ArmRegOper(rctx.getRegisterIndex(rbase%n)),\n+ ArmRegOper(rctx.getRegisterIndex(rbase%m)),\n+ ArmImmOper(imm4),\n+ )\n+\n+ simdflags = IFS_8\n+ return opcode, mnem, opers, 0, simdflags\nelse:\nif (c & 1) == 0:\nif (b & 0x8) == 0:\n# two registers, miscellaneous\n- pass\n+ a = (val>>16) & 0x3\n+ b = (val>>6) & 0x1f\n+\n+ idx = (a<<5) | b\n+ mnem, opcode, flagoff, dt, nt = adv_simd_2regs_misc[idx]\n+\n+ rbase = ('d%d', 'q%d')[q]\n+ d >>= q\n+ n >>= q\n+\n+ if a and ((b&0b1100) != 0b1100):\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex(rbase%d)),\n+ ArmRegOper(rctx.getRegisterIndex(rbase%n)),\n+ ArmImmOper(0),\n+ )\n+ else:\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex(rbase%d)),\n+ ArmRegOper(rctx.getRegisterIndex(rbase%n)),\n+ )\n+\n+ sz = (val>>8) & 0x3\n+ szu = sz + flagoff\n+ simdflags = adv_simd_dts[szu]\n+\n+ return opcode, mnem, opers, 0, simdflags\nelif (b & 0xc) == 8:\n# vector table lookup VTBL, VTBX\n- pass\n+ ln = (val>>8) & 3\n+ op = (val>>7) & 1\n+\n+ opcode, mnem = (('vtbl', INS_VTBL),('vtbx', INS_VTBX))[op]\n+\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex(rbase%d)),\n+ ArmExtRegListOper(n, ln+1, 1)\n+ ArmRegOper(rctx.getRegisterIndex(rbase%n)),\n+ )\n+\n+ simdflags = IFS_8\n+\n+ return opcode, mnem, opers, 0, simdflags\n+################################ FIXME: CONTINUE WORKING AdvSIMD HERE #######################3\n+\nelif (b == 0xc):\n# vector duplicate VDUP (scalar)\n@@ -3061,6 +3286,52 @@ class ArmRegOper(ArmOperand):\nrname += \"!\"\nreturn rname\n+class ArmRegScalarOper(ArmRegOper):\n+ def __init__(self, reg, index, va=0, oflags=0):\n+ self.index = index\n+ ArmRegOper.__init__(self, reg, va, oflags)\n+\n+ def __eq__(self, oper):\n+ if not isinstance(oper, self.__class__):\n+ return False\n+ if self.reg != oper.reg:\n+ return False\n+ if self.oflags != oper.oflags:\n+ return False\n+ if self.index != oper.index:\n+ return False\n+ return True\n+\n+ def involvesPC(self):\n+ return False\n+\n+ def isDeref(self):\n+ return False\n+\n+ def getOperValue(self, op, emu=None):\n+ if emu == None:\n+ return None\n+\n+ raise Exception(\"Scalar Accessors Not Implemented\")\n+ return emu.getRegister(self.reg)\n+\n+ def setOperValue(self, op, emu=None, val=None):\n+ if emu == None:\n+ return None\n+\n+ raise Exception(\"Scalar Accessors Not Implemented\")\n+ emu.setRegister(self.reg, val)\n+\n+ def render(self, mcanv, op, idx):\n+ rname = rctx.getRegisterName(self.reg)\n+ mcanv.addNameText(rname, typename='registers')\n+ mcanv.addNameText('[%d]' % self.index, typename='scalars')\n+\n+ def repr(self, op):\n+ rname = rctx.getRegisterName(self.reg)\n+ rname += '[%d]' % self.index\n+ return rname\n+\nclass ArmRegShiftRegOper(ArmOperand):\n''' register shift operand. see \"addressing mode 1 - data processing operands - * shift * by register\" '''\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/regs.py",
"new_path": "envi/archs/arm/regs.py",
"diff": "@@ -33,9 +33,9 @@ arm_regs = (\nMAX_REGS = 17\narm_metas = [\n- (\"R13\", REG_SP, 0, 32),\n- (\"R14\", REG_LR, 0, 32),\n- (\"R15\", REG_PC, 0, 32),\n+ (\"r13\", REG_SP, 0, 32),\n+ (\"r14\", REG_LR, 0, 32),\n+ (\"r15\", REG_PC, 0, 32),\n]\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_arm.py",
"new_path": "envi/tests/test_arch_arm.py",
"diff": "@@ -1234,8 +1234,37 @@ instrs = [\n(REV_ALL_ARM, 'aff39a87', 0x4561, 'cpsid a, #0x1a', IF_ID, ()),\n(REV_ALL_ARM, 'aff31a81', 0x4561, 'cps #0x1a', 0, ()),\n- (REV_ALL_ARM, 'efe34ba5', 0x4561, 'vqdmlsl.s32 q10, d19, d21', 0, ()),\n- (REV_ALL_ARM, 'ef9349a5', 0x4561, 'vqdmlal.s16 q2, d19, d21', 0, ()),\n+ #(REV_ALL_ARM, 'a54be3ef', 0x4561, 'vqdmlsl.s32 q10, d19, d21', 0, ()),\n+ #(REV_ALL_ARM, 'a54993ef', 0x4561, 'vqdmlal.s16 q2, d19, d21', 0, ()),\n+\n+ (REV_ALL_ARM, 'aaefe440', 0x4561, 'vmla.i32 d4, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaefe441', 0x4561, 'vmla.f32 d4, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaefe442', 0x4561, 'vmlal.s32 q2, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaefe443', 0x4561, 'vqdmlal.s32 q2, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaefe444', 0x4561, 'vmls.i32 d4, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaefe445', 0x4561, 'vmls.f32 d4, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaefe446', 0x4561, 'vmlsl.s32 q2, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaefe447', 0x4561, 'vqdmlsl.s32 q2, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaefe448', 0x4561, 'vmul.i32 d4, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaefe449', 0x4561, 'vmul.f32 d4, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaefe44a', 0x4561, 'vmull.s32 q2, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaefe44b', 0x4561, 'vqdmull.s32 q2, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaefe44c', 0x4561, 'vqdmulh.s32 d4, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaefe44d', 0x4561, 'vqrdmulh.s32 d4, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaffe440', 0x4561, 'vmla.i32 q2, q13, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaffe441', 0x4561, 'vmla.f32 q2, q13, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaffe442', 0x4561, 'vmlal.u32 q2, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaffe444', 0x4561, 'vmls.i32 q2, q13, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaffe445', 0x4561, 'vmls.f32 q2, q13, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaffe446', 0x4561, 'vmlsl.u32 q2, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaffe448', 0x4561, 'vmul.i32 q2, q13, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaffe449', 0x4561, 'vmul.f32 q2, q13, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaffe44a', 0x4561, 'vmull.u32 q2, d26, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaffe44c', 0x4561, 'vqdmulh.s32 q2, q13, d4[1]', 0, ()),\n+ (REV_ALL_ARM, 'aaffe44d', 0x4561, 'vqrdmulh.s32 q2, q13, d4[1]', 0, ()),\n+\n+ (REV_ALL_ARM, 'f4efec2f', 0x4561, 'vext.8 q9, q10, q14, #0x0f', 0, ()),\n+\n]\n@@ -1834,6 +1863,41 @@ def genAdvSIMD():\nout.extend(outthumb)\nfile('advSIMD', 'wb').write(''.join(out))\n+def genAdvSIMD():\n+ import envi.archs.arm as eaa\n+ am = eaa.ArmModule()\n+\n+ # thumb\n+ outthumb = []\n+ outarm = []\n+ armbase = 0xf2043002 # generic Adv SIMD with Vn=8, Vd=6, Vm=4 (or 4,3,2, depending)\n+ thmbase = 0xef043002 # generic Adv SIMD with Vn=8, Vd=6, Vm=4 (or 4,3,2, depending)\n+ # thumb dp, arm dp (with both 0/1 for U)\n+ #for option in (0xf000000, 0x2000000, 0x3000000, 0x1f000000):\n+ for u in range(2):\n+ for A in range(32): # three registers of same length\n+ for B in range(16): # three registers of same length\n+ for C in range(16):\n+ try:\n+ armval = armbase | (u<<24) | (A<<19) | (B<<8) | (C<<4)\n+ thmval = thmbase | (u<<28) | (A<<19) | (B<<8) | (C<<4)\n+ bytezarm = struct.pack(\"<I\", armval)\n+ oparm = am.archParseOpcode(bytezarm, 0, 0x4560)\n+ #outarm.append(bytezarm)\n+\n+ bytezthumb = struct.pack(\"<HH\", thmval>>16, thmval&0xffff)\n+ opthumb = am.archParseOpcode(bytezthumb, 0, 0x4561)\n+ #outthumb.append(bytezthumb)\n+\n+ outarm.append(\" (REV_ALL_ARM, '%s', 0x%x, '%s', 0, ()),\" % (bytezarm.encode('hex'), 0x4560, oparm))\n+ outthumb.append(\" (REV_ALL_ARM, '%s', 0x%x, '%s', 0, ()),\" % (bytezthumb.encode('hex'), 0x4561, opthumb))\n+ except Exception, e:\n+ print e\n+\n+ return outthumb, outarm\n# thumb 16bit IT, CNBZ, CBZ\n+\n+\n+\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
vector decoding improvements. almost done!
|
718,770 |
24.02.2017 17:48:40
| 18,000 |
928129a97b735fe91dc94ec877df04aa1809cb04
|
vector decoding complete (now the testing!)
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -1632,10 +1632,17 @@ def p_uncond(opval, va, psize = 4):\ndef p_advsimd_secondary(val, va, mnem, opcode, flags, opers):\n-\nif opcode == INS_VORR:\n- pass\n+ src1 = (val>>16) & 0xf\n+ src2 = (val) & 0xf\n+ if src1 == src2:\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex(rbase%d)),\n+ ArmRegOper(rctx.getRegisterIndex(rbase%n)),\n+ )\n+ return 'vmov', INS_VMOV, None, opers\n+ return None, None, None, None\nadv_simd_3_regs = ( # ABUC fields slammed together\n# a=0000 b=0\n@@ -2033,25 +2040,25 @@ adv_simd_3diffregs = (\n('vmlal', INS_VMLAL, 4, 1, 0, 0),\n# a=9\n('vqdmlal', INS_VQDMLAL, 0, 1, 0, 0),\n- ('ERROR_vqdmlal', INS_VQDMLAL, 4, 1, 0, 0),\n+ (None, INS_VQDMLAL, 4, 1, 0, 0),\n# a=0xa\n('vmlsl', INS_VMLSL, 0, 1, 0, 0),\n('vmlsl', INS_VMLSL, 4, 1, 0, 0),\n# a=0xb\n('vqdmlsl', INS_VQDMLSL, 0, 1, 0, 0), # FIXME: TESTME thumb: 0xef9349a5, 0xefe34ba5\n- ('ERROR_vqdmlsl', INS_VQDMLSL, 0, 1, 0, 0),\n+ (None, INS_VQDMLSL, 0, 1, 0, 0),\n# a=0xc\n('vmull', INS_VMULL, 0, 1, 0, 0),\n('vmull', INS_VMULL, 4, 1, 0, 0),\n# a=0xd\n('vqdmull', INS_VQDMULL, 0, 1, 0, 0),\n- ('ERROR_vqdmull', INS_VQDMULL, 0, 1, 0, 0),\n+ (None, INS_VQDMULL, 0, 1, 0, 0),\n# a=0xe\n('vmull', INS_VMULL, 12,1, 0, 0),\n('vmull', INS_VMULL, 12,1, 0, 0),\n# a=0xf - nothing...\n- ('ERROR', 0, 0,0,0,0),\n- ('ERROR', 0, 0,0,0,0),\n+ (None, 0, 0,0,0,0),\n+ (None, 0, 0,0,0,0),\n)\nadv_simd_dts = (IFS_S8, IFS_S16, IFS_S32, IFS_S64,\n@@ -2074,8 +2081,7 @@ adv_simd_2regs_scalar = (\n('vmlal', INS_VMLAL, 4, 1,0,0),\n# a=3\n('vqdmlal', INS_VQDMLAL, 0, 1,0,0),\n- #('vqdmlal', INS_VQDMLAL, 0, 1,0,0), # not defined\n- (),\n+ (None, None, None, None, None, None),\n# a=4\n('vmls', INS_VMLS, 8, 0,0,0), # enc t1/a1\n('vmls', INS_VMLS, 8, 1,1,0),\n@@ -2087,8 +2093,7 @@ adv_simd_2regs_scalar = (\n('vmlsl', INS_VMLSL, 4, 1,0,0),\n# a=7\n('vqdmlsl', INS_VQDMLSL, 0, 1,0,0),\n- #('vqdmlsl', INS_VQDMLSL, 0, 1,0,0), # not defined\n- (),\n+ (None, None, None, None, None, None),\n# a=8\n('vmul', INS_VMUL, 8, 0,0,0), # enc t1/a1\n('vmul', INS_VMUL, 8, 1,1,0),\n@@ -2100,8 +2105,7 @@ adv_simd_2regs_scalar = (\n('vmull', INS_VMULL, 4, 1,0,0),\n# a=0xb\n('vqdmull', INS_VQDMULL, 0, 1,0,0), # enc t2/a2\n- #('vqdmull', INS_VQDMULL, 0, 1,0,0), # not defined\n- (),\n+ (None, None, None, None, None, None),\n# a=0xc\n('vqdmulh', INS_VQDMULH, 0, 0,0,0), # enc t2/a2\n('vqdmulh', INS_VQDMULH, 0, 1,1,0),\n@@ -2109,7 +2113,11 @@ adv_simd_2regs_scalar = (\n('vqrdmulh', INS_VQRDMULH, 0, 0,0,0), # enc t2/a2\n('vqrdmulh', INS_VQRDMULH, 0, 1,1,0),\n# a=0xe\n+ (None, None, None, None, None, None),\n+ (None, None, None, None, None, None),\n# a=0xf\n+ (None, None, None, None, None, None),\n+ (None, None, None, None, None, None),\n)\nadv_simd_2regs_misc = (\n@@ -2221,13 +2229,14 @@ def _do_adv_simd_32(val, va, u):\nm = (val >> 1) & 0x10\nm |= (val & 0xf)\n+ rbase = ('d%d', 'q%d')[q]\n+\nif not (a & 0x10):\n# three registers of the same length\na = (val>>8) & 0xf\nb = (val>>4) & 1\nc = (val>>20) & 3\n- rbase = ('d%d', 'q%d')[q]\nindex = c | (u<<2) | (b<<3) | (a<<4)\nmnem, opcode, simdflags, handler = adv_simd_3_regs[index]\n@@ -2242,15 +2251,19 @@ def _do_adv_simd_32(val, va, u):\n)\nif handler != None:\n- nmnem, nopcode, nflags, nopers = handler(val, va, mnem, opcode, flags, opers)\n+ nmnem, nopcode, nflags, nopers = handler(val, va, mnem, opcode, simdflags, opers)\nif nmnem != None:\nmnem = nmnem\nopcode = nopcode\nif nflags != None:\n- flags = nflags\n+ simdflags = nflags\nif nopers != None:\nopers = nopers\n+ if mnem == None:\n+ raise envi.InvalidInstruction(mesg=\"Invalid AdvSIMD Opcode Encoding\",\n+ bytez=struct.pack('<L', val), va=va)\n+\nreturn opcode, mnem, opers, 0, simdflags # no iflags, only simdflags for this one\nelif (a & 0x17) == 0x10 and (c & 0x9) == 1:\n@@ -2258,13 +2271,19 @@ def _do_adv_simd_32(val, va, u):\nop = (c>>1) & 1\ncmode = b\n- rbase = ('d%d', 'q%d')[q]\nindex = (op<<4) | cmode\nmnem, opcode, simdflags, handler = adv_simd_1modimm[index]\n+ if mnem == None:\n+ raise envi.InvalidInstruction(mesg=\"Invalid AdvSIMD Opcode Encoding\",\n+ bytez=struct.pack('<L', val), va=va)\nabcdefgh = (u<<7) | ((val>>12) & 0x70) | (val & 0xf)\n- dt, val = adv_simd_modifiers[index](abcdefgh)\n+ handler = adv_simd_modifiers[index]\n+ if handler == None:\n+ raise envi.InvalidInstruction(mesg=\"Invalid AdvSIMD Opcode Encoding: modified immediate out of range\",\n+ bytez=struct.pack('<L', val), va=va)\n+ dt, val = handler(abcdefgh)\nd >>= q\nopers = (\n@@ -2281,10 +2300,13 @@ def _do_adv_simd_32(val, va, u):\nb = (val>>6) & 1\nl = (val>>7) & 1\n- rbase = ('d%d', 'q%d')[q]\nindex = (a<<3) | (u<<2) | (b<<1) | l\nmnem, opcode, enctype = adv_2regs[index]\n+ if mnem == None:\n+ raise envi.InvalidInstruction(mesg=\"Invalid AdvSIMD Opcode Encoding\",\n+ bytez=struct.pack('<L', val), va=va)\n+ d >>= q\nm >>= q\nimm = (val >> 16) & 0x3f\n@@ -2439,6 +2461,9 @@ def _do_adv_simd_32(val, va, u):\nidx = (a<<1) | u\nmnem, opcode, flagoff, dt, nt, mt = adv_simd_3diffregs[idx]\n+ if mnem == None:\n+ raise envi.InvalidInstruction(mesg=\"Invalid AdvSIMD Opcode Encoding\",\n+ bytez=struct.pack('<L', val), va=va)\nop = a & 1\n@@ -2446,10 +2471,10 @@ def _do_adv_simd_32(val, va, u):\nn >>= nt\nm >>= mt\n- rbase = ('d%d', 'q%d')\n- dbase = rbase[dt]\n- mbase = rbase[mt]\n- nbase = rbase[nt]\n+ base = ('d%d', 'q%d')\n+ dbase = base[dt]\n+ mbase = base[mt]\n+ nbase = base[nt]\nopers = (\nArmRegOper(rctx.getRegisterIndex(dbase%d)),\n@@ -2467,6 +2492,9 @@ def _do_adv_simd_32(val, va, u):\n# two registers and a scalar\nidx = (a<<1) | u\nmnem, opcode, flagoff, dt, nt, mt = adv_simd_2regs_scalar[idx]\n+ if mnem == None:\n+ raise envi.InvalidInstruction(mesg=\"Invalid AdvSIMD Opcode Encoding\",\n+ bytez=struct.pack('<L', val), va=va)\nif sz == 1:\nindex = m >> 3\n@@ -2474,15 +2502,18 @@ def _do_adv_simd_32(val, va, u):\nelif sz == 2:\nindex = m >> 4\nm &= 0xf\n+ else:\n+ raise envi.InvalidInstruction(mesg=\"%s with invalid size!\" % mnem,\n+ bytez=struct.pack('<L', val), va=va)\nd >>= dt\nn >>= nt\nm >>= mt\n- rbase = ('d%d', 'q%d')\n- dbase = rbase[dt]\n- mbase = rbase[mt]\n- nbase = rbase[nt]\n+ base = ('d%d', 'q%d')\n+ dbase = base[dt]\n+ nbase = base[nt]\n+ mbase = base[mt]\nopers = (\nArmRegOper(rctx.getRegisterIndex(dbase%d)),\n@@ -2504,7 +2535,6 @@ def _do_adv_simd_32(val, va, u):\nimm4 = (val >> 8) & 0xf\n- rbase = ('d%d', 'q%d')[q]\nd >>= q\nn >>= q\nm >>= q\n@@ -2528,8 +2558,10 @@ def _do_adv_simd_32(val, va, u):\nidx = (a<<5) | b\nmnem, opcode, flagoff, dt, nt = adv_simd_2regs_misc[idx]\n+ if mnem == None:\n+ raise envi.InvalidInstruction(mesg=\"Invalid AdvSIMD Opcode Encoding\",\n+ bytez=struct.pack('<L', val), va=va)\n- rbase = ('d%d', 'q%d')[q]\nd >>= q\nn >>= q\n@@ -2560,22 +2592,43 @@ def _do_adv_simd_32(val, va, u):\nopers = (\nArmRegOper(rctx.getRegisterIndex(rbase%d)),\n- ArmExtRegListOper(n, ln+1, 1)\n+ ArmExtRegListOper(n, ln+1, 1),\nArmRegOper(rctx.getRegisterIndex(rbase%n)),\n)\nsimdflags = IFS_8\nreturn opcode, mnem, opers, 0, simdflags\n-################################ FIXME: CONTINUE WORKING AdvSIMD HERE #######################3\n-\nelif (b == 0xc):\n# vector duplicate VDUP (scalar)\n- pass\n- return 0, 'NO VECTOR ENCODING COMPLETED', (), 0, 0\n+ opcode = INS_VDUP\n+ mnem = 'vdup'\n+ imm4 = n\n-################### FIXME ABOVE: NOT COMPLETE DECODING #######################\n+ d >>= q\n+\n+ if imm4 & 1:\n+ index = imm4 >> 1\n+ simdflags = IFS_8\n+ elif imm4 & 2:\n+ index = imm4 >> 2\n+ simdflags = IFS_16\n+ elif imm4 & 4:\n+ index = imm4 >> 3\n+ simdflags = IFS_32\n+ else:\n+ raise envi.InvalidInstruction(mesg=\"VDUP with invalid imm4!\",\n+ bytez=struct.pack('<L', val), va=va)\n+\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex(rbase%d)),\n+ ArmRegScalarOper(rctx.getRegisterIndex('d%d'%m), index),\n+ )\n+\n+ return opcode, mnem, opers, 0, simdflags\n+\n+ return 0, 'NO VECTOR ENCODING COMPLETED', (), 0, 0\nadv_2_vqshl_typesize = {\n8: ( None, IFS_S8, IFS_S8, IFS_U8),\n@@ -2674,6 +2727,8 @@ adv_simd_modifiers = (\nadv_simd_mod_1100,\nadv_simd_mod_1101,\nadv_simd_mod_1_1110,\n+ None,\n+ None,\n)\nadv_2regs = (\n@@ -3241,6 +3296,10 @@ class ArmRegOper(ArmOperand):\n''' register operand. see \"addressing mode 1 - data processing operands - register\" '''\ndef __init__(self, reg, va=0, oflags=0):\n+ if reg == None:\n+ raise Exception(\"ArmRegOper: None Reg Type!\")\n+ raise envi.InvalidInstruction(mesg=\"None Reg Type!\",\n+ bytez='f00!', va=va)\nself.va = va\nself.reg = reg\nself.oflags = oflags\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_arm.py",
"new_path": "envi/tests/test_arch_arm.py",
"diff": "@@ -1863,17 +1863,20 @@ def genAdvSIMD():\nout.extend(outthumb)\nfile('advSIMD', 'wb').write(''.join(out))\n-def genAdvSIMD():\n+def genAdvSIMDtests():\nimport envi.archs.arm as eaa\nam = eaa.ArmModule()\n# thumb\noutthumb = []\noutarm = []\n+ abytez = []\n+ tbytez = []\narmbase = 0xf2043002 # generic Adv SIMD with Vn=8, Vd=6, Vm=4 (or 4,3,2, depending)\nthmbase = 0xef043002 # generic Adv SIMD with Vn=8, Vd=6, Vm=4 (or 4,3,2, depending)\n# thumb dp, arm dp (with both 0/1 for U)\n#for option in (0xf000000, 0x2000000, 0x3000000, 0x1f000000):\n+ bad = 0\nfor u in range(2):\nfor A in range(32): # three registers of same length\nfor B in range(16): # three registers of same length\n@@ -1882,21 +1885,35 @@ def genAdvSIMD():\narmval = armbase | (u<<24) | (A<<19) | (B<<8) | (C<<4)\nthmval = thmbase | (u<<28) | (A<<19) | (B<<8) | (C<<4)\nbytezarm = struct.pack(\"<I\", armval)\n+ abytez.append(bytezarm)\noparm = am.archParseOpcode(bytezarm, 0, 0x4560)\n#outarm.append(bytezarm)\nbytezthumb = struct.pack(\"<HH\", thmval>>16, thmval&0xffff)\n+ tbytez.append(bytezthumb)\nopthumb = am.archParseOpcode(bytezthumb, 0, 0x4561)\n#outthumb.append(bytezthumb)\noutarm.append(\" (REV_ALL_ARM, '%s', 0x%x, '%s', 0, ()),\" % (bytezarm.encode('hex'), 0x4560, oparm))\noutthumb.append(\" (REV_ALL_ARM, '%s', 0x%x, '%s', 0, ()),\" % (bytezthumb.encode('hex'), 0x4561, opthumb))\n- except Exception, e:\n+ except envi.InvalidInstruction, e:\nprint e\n+ bad += 1\n+ if bad % 25 == 0:\n+ raw_input(\"PRESS ENTER\")\n+\n+\n+ except Exception, e:\n+ sys.excepthook(*sys.exc_info())\n+ bad += 1\n+ if bad % 2 == 0:\n+ raw_input(\"PRESS ENTER\")\n+\n- return outthumb, outarm\n+ abytez.extend(tbytez)\n+ return outthumb, outarm, abytez\n# thumb 16bit IT, CNBZ, CBZ\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
vector decoding complete (now the testing!)
|
718,770 |
24.02.2017 18:23:02
| 18,000 |
1b35ad33526622c96b33f09a7d1ea9958dd1817b
|
testing and fixing.
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -2301,7 +2301,7 @@ def _do_adv_simd_32(val, va, u):\nl = (val>>7) & 1\nindex = (a<<3) | (u<<2) | (b<<1) | l\n- mnem, opcode, enctype = adv_2regs[index]\n+ mnem, opcode, enctype = adv_2regs_shift[index]\nif mnem == None:\nraise envi.InvalidInstruction(mesg=\"Invalid AdvSIMD Opcode Encoding\",\nbytez=struct.pack('<L', val), va=va)\n@@ -2310,6 +2310,8 @@ def _do_adv_simd_32(val, va, u):\nm >>= q\nimm = (val >> 16) & 0x3f\n+ if not (imm & 0b111000) and not l:\n+ raise Exception(\"AdvSIMD: decoding as 2reg_shift and should be 1regModImm\")\n#### REMOVE WHEN COMPLETE WITH DECODING\nshift_amount = 0\n@@ -2415,8 +2417,8 @@ def _do_adv_simd_32(val, va, u):\nelif enctype == 5: # VCVT\nlimm = (l<<6) | imm\n- if not (limm & 0b111000):\n- raise Exception(\"VCVT but should be decoding as oneRegModImm\")\n+ if not (limm & 0b1111000):\n+ raise Exception(\"2reg_shift/enc==5 but should be decoding as oneRegModImm 0x%x\" % val)\nop = a & 1\nuop = (u<<1) | op\n@@ -2711,7 +2713,7 @@ adv_simd_modifiers = (\nNone,\n)\n-adv_2regs = (\n+adv_2regs_shift = (\n# 0000\n('vshr', INS_VSHR, 0),\n('vshr', INS_VSHR, 0),\n@@ -4414,6 +4416,8 @@ class ArmDisasm:\n#Get opcode, base mnem, operator list and flags\nopcode, mnem, olist, flags, simdflags = self.doDecode(va, opval, bytez, offset)\n+ if mnem == None or type(mnem) == int:\n+ raise Exception(\"mnem == %r! 0x%x\" % (mnem, opval))\n# since our flags determine how the instruction is decoded later....\n# performance-wise this should be set as the default value instead of 0, but this is cleaner\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/thumb16/disasm.py",
"new_path": "envi/archs/thumb16/disasm.py",
"diff": "@@ -2323,6 +2323,9 @@ class ThumbDisasm:\nshowop = True\nflags |= envi.IF_NOFALL\n+ if mnem == None or type(mnem) == int:\n+ raise Exception(\"mnem == %r! 0x%xi (thumb)\" % (mnem, opval))\n+\nop = ThumbOpcode(va, opcode, mnem, 0xe, oplen, olist, flags, simdflags)\n#print hex(va), oplen, len(op), op.size, hex(op.iflags)\nreturn op\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_arm.py",
"new_path": "envi/tests/test_arch_arm.py",
"diff": "@@ -1901,7 +1901,8 @@ def genAdvSIMDtests():\nprint e\nbad += 1\nif bad % 25 == 0:\n- raw_input(\"PRESS ENTER\")\n+ #raw_input(\"PRESS ENTER\")\n+ pass\nexcept Exception, e:\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
testing and fixing.
|
718,770 |
03.03.2017 15:17:01
| 18,000 |
f8d31c64bfa75f47f9517d28b39840b93dc9a166
|
floating point instruction wiring into arm, and thumb. lots of "opcode" rightness fixes. still decoding bugs to iron out.
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/const.py",
"new_path": "envi/archs/arm/const.py",
"diff": "@@ -294,35 +294,52 @@ INST_ENC_DP_IMM = 0 # Data Processing Immediate Shift\nINST_ENC_MISC = 1 # Misc Instructions\n# Instruction encodings in arm v5\n-IENC_DP_IMM_SHIFT = 0 # Data processing immediate shift\n-IENC_MISC = 1 # Miscellaneous instructions\n-IENC_MISC1 = 2 # Miscellaneous instructions again\n-IENC_DP_REG_SHIFT = 3 # Data processing register shift\n-IENC_MULT = 4 # Multiplies & Extra load/stores\n-IENC_UNDEF = 5 # Undefined instruction\n-IENC_MOV_IMM_STAT = 6 # Move immediate to status register\n-IENC_DP_IMM = 7 # Data processing immediate\n-IENC_LOAD_IMM_OFF = 8 # Load/Store immediate offset\n-IENC_LOAD_REG_OFF = 9 # Load/Store register offset\n-IENC_ARCH_UNDEF = 10 # Architecturally undefined\n-IENC_MEDIA = 11 # Media instructions\n-IENC_LOAD_MULT = 12 # Load/Store Multiple\n-IENC_BRANCH = 13 # Branch\n-IENC_COPROC_RREG_XFER = 14 # mrrc/mcrr\n-IENC_COPROC_LOAD = 15 # Coprocessor load/store and double reg xfers\n-IENC_COPROC_DP = 16 # Coprocessor data processing\n-IENC_COPROC_REG_XFER = 17 # Coprocessor register transfers\n-IENC_SWINT = 18 # Sofware interrupts\n-IENC_UNCOND = 19 # unconditional wacko instructions\n-IENC_EXTRA_LOAD = 20 # extra load/store (swp)\n-IENC_DP_MOVW = 21 # Not sure it exists?\n-IENC_DP_MOVT = 22 # move top\n-IENC_DP_MSR_IMM = 23 #\n-IENC_LOAD_STORE_WORD_UBYTE = 24\n-IENC_FP_DP = 25\n-IENC_ADVSIMD = 26\n-\n-IENC_MAX = 27\n+iencs = (\\\n+ 'IENC_DP_IMM_SHIFT', # Data processing immediate shift\n+ 'IENC_MISC', # Miscellaneous instructions\n+ 'IENC_MISC1', # Miscellaneous instructions again\n+ 'IENC_DP_REG_SHIFT', # Data processing register shift\n+ 'IENC_MULT', # Multiplies & Extra load/stores\n+ 'IENC_UNDEF', # Undefined instruction\n+ 'IENC_MOV_IMM_STAT', # Move immediate to status register\n+ 'IENC_DP_IMM', # Data processing immediate\n+ 'IENC_LOAD_IMM_OFF', # Load/Store immediate offset\n+ 'IENC_LOAD_REG_OFF', # Load/Store register offset\n+ 'IENC_ARCH_UNDEF', # Architecturally undefined\n+ 'IENC_MEDIA', # Media instructions\n+ 'IENC_LOAD_MULT', # Load/Store Multiple\n+ 'IENC_BRANCH', # Branch\n+ 'IENC_COPROC_RREG_XFER',# mrrc/mcrr\n+ 'IENC_COPROC_LOAD', # Coprocessor load/store and double reg xfers\n+ 'IENC_COPROC_DP', # Coprocessor data processing\n+ 'IENC_COPROC_REG_XFER', # Coprocessor register transfers\n+ 'IENC_SWINT', # Sofware interrupts\n+ 'IENC_UNCOND', # unconditional wacko instructions\n+ 'IENC_EXTRA_LOAD', # extra load/store (swp)\n+ 'IENC_DP_MOVW', # move wide\n+ 'IENC_DP_MOVT', # move top\n+ 'IENC_DP_MSR_IMM', #\n+ 'IENC_LOAD_STORE_WORD_UBYTE', #\n+ 'IENC_FP_DP', #\n+ 'IENC_ADVSIMD', #\n+ 'IENC_64_EXT_XFERS', #\n+ 'IENC_VSTM', #\n+ 'IENC_VSTR', #\n+ 'IENC_VPUSH', #\n+ 'IENC_VLDM', #\n+ 'IENC_VLDR', #\n+ 'IENC_VPOP', #\n+ 'IENC_VMSR', #\n+ 'IENC_VDUP', #\n+ 'IENC_VMOV_DOUBLE', #\n+ 'IENC_VMOV_SINGLE', #\n+ 'IENC_VMOV_2SINGLE', #\n+ 'IENC_VMOV_SCALAR', #\n+)\n+\n+IENC_MAX = len(iencs)\n+for ieidx in range(IENC_MAX):\n+ globals()[iencs[ieidx]] = ieidx\n# offchutes\nIENC_MEDIA_PARALLEL = ((IENC_MEDIA << 8) + 1) << 8\n@@ -363,46 +380,6 @@ daib = (\"da\", \"\", \"db\", \"ib\")\n-'''\n-def instrenc(encoding, index):\n- return (encoding << 16) + index\n-INS_AND = IENC_DP_IMM_SHIFT << 16\n-INS_EOR = (IENC_DP_IMM_SHIFT << 16) + 1\n-INS_SUB = (IENC_DP_IMM_SHIFT << 16) + 2\n-INS_RSB = (IENC_DP_IMM_SHIFT << 16) + 3\n-INS_ADD = (IENC_DP_IMM_SHIFT << 16) + 4\n-INS_ADC = (IENC_DP_IMM_SHIFT << 16) + 5\n-INS_SBC = (IENC_DP_IMM_SHIFT << 16) + 6\n-INS_RSC = (IENC_DP_IMM_SHIFT << 16) + 7\n-INS_TST = (IENC_DP_IMM_SHIFT << 16) + 8\n-INS_TEQ = (IENC_DP_IMM_SHIFT << 16) + 9\n-INS_CMP = (IENC_DP_IMM_SHIFT << 16) + 10\n-INS_CMN = (IENC_DP_IMM_SHIFT << 16) + 11\n-INS_ORR = (IENC_DP_IMM_SHIFT << 16) + 12\n-INS_MOV = (IENC_DP_IMM_SHIFT << 16) + 13\n-INS_BIC = (IENC_DP_IMM_SHIFT << 16) + 14\n-INS_MVN = (IENC_DP_IMM_SHIFT << 16) + 15\n-INS_ORN = (IENC_DP_IMM_SHIFT << 16) + 12\n-INS_ADR = (IENC_DP_IMM_SHIFT << 16) + 16\n-\n-\n-INS_B = instrenc(IENC_BRANCH, 0)\n-INS_BL = instrenc(IENC_BRANCH, 1)\n-INS_BCC = instrenc(IENC_BRANCH, 2)\n-INS_BX = instrenc(IENC_MISC, 3)\n-INS_BXJ = instrenc(IENC_MISC, 5)\n-INS_BLX = IENC_UNCOND_BLX\n-\n-INS_SWI = IENC_SWINT\n-\n-\n-#Opcodes still needed - put here as todo with others\n-#dbg, movt, movw\n-\n-\n-INS_LDR = instrenc(IENC_LOAD_IMM_OFF, 0)\n-INS_STR = instrenc(IENC_LOAD_IMM_OFF, 1)\n-'''\ninstrnames = [\n'AND',\n@@ -582,6 +559,39 @@ instrnames = [\n'VDUP',\n'VTBL',\n'VTBX',\n+ 'SMLABB',\n+ 'SMLABT',\n+ 'SMLATB',\n+ 'SMLATT',\n+ 'SMLALBB',\n+ 'SMLALBT',\n+ 'SMLALTB',\n+ 'SMLALTT',\n+ 'SMLAWB',\n+ 'SMLAWT',\n+ 'SMULBB',\n+ 'SMULBT',\n+ 'SMULTB',\n+ 'SMULTT',\n+ 'SMULWB',\n+ 'SMULWT',\n+ 'QADD',\n+ 'QSUB',\n+ 'QDADD',\n+ 'QDSUB',\n+ 'MCRR',\n+ 'MRRC',\n+ 'MCRR2',\n+ 'MRRC2',\n+ 'VNMLA',\n+ 'VNMLS',\n+ 'VNMUL',\n+ 'VDIV',\n+ 'VFNMS',\n+ 'VFNMA',\n+\n+\n+\n]\nins_index = 85\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -246,12 +246,12 @@ def p_dp_imm_shift(opval, va):\nreturn (opcode, mnem, olist, iflags, 0)\n# specialized mnemonics for p_misc\n-qop_mnem = ('qadd','qsub','qdadd','qdsub') # used in misc1\n-smla_mnem = ('smlabb','smlatb','smlabt','smlatt',)\n-smlal_mnem = ('smlalbb','smlaltb','smlalbt','smlaltt',)\n-smul_mnem = ('smulbb','smultb','smulbt','smultt',)\n-smlaw_mnem = ('smlawb','smlawt',)\n-smulw_mnem = ('smulwb','smulwt',)\n+qop_mnem = (('qadd', INS_QADD),('qsub', INS_QSUB),('qdadd', INS_QDADD),('qdsub', INS_QDSUB)) # used in misc1\n+smla_mnem = (('smlabb', INS_SMLABB),('smlatb', INS_SMLATB),('smlabt', INS_SMLATB),('smlatt', INS_SMLATB),)\n+smlal_mnem = (('smlalbb', INS_SMLALBB),('smlaltb', INS_SMLALTB),('smlalbt', INS_SMLALTB),('smlaltt', INS_SMLALTB),)\n+smul_mnem = (('smulbb', INS_SMULBB),('smultb', INS_SMULTB),('smulbt', INS_SMULTB),('smultt', INS_SMULTB),)\n+smlaw_mnem = (('smlawb', INS_SMLAWB),('smlawt', INS_SMLAWT),)\n+smulw_mnem = (('smulwb', INS_SMULWB),('smulwt', INS_SMULWT),)\ndef p_misc(opval, va):\n# 0x0f900000 = 0x01000000 or 0x01000010 (misc and misc1 are both parsed at the same time. see the footnote [2] on dp instructions in the Atmel AT91SAM7 docs\n@@ -261,14 +261,14 @@ def p_misc(opval, va):\n#if opval & 0x0ff000f0 == 0x01200020:\nif opval & 0x0FFFFFF0 == 0x012FFF20:\n- opcode = (IENC_MISC << 16) + 5\n+ opcode = INS_BXJ\nmnem = 'bxj'\nRm = opval & 0xf\nolist = ( ArmRegOper(Rm, va=va), )\n#elif opval & 0x0fb002f0 == 0x01200000:\nelif opval & 0x0DB0F000 == 0x0120F000:\n- opcode = (IENC_MISC << 16) + 2\n+ opcode = INS_MSR\nmnem = 'msr' # register. immediate has it's own parser in the 001 section\nr = (opval>>22) & 1\nRn = (opval) & 0xf\n@@ -281,9 +281,8 @@ def p_misc(opval, va):\n#smla\n#Mask and value are OK\nelif opval & 0x0FF00090 == 0x01000080:\n- opcode = (IENC_MISC << 16) + 9\nmn = (opval>>5)&3\n- mnem = smla_mnem[mn]\n+ mnem, opcode = smla_mnem[mn]\nRd = (opval>>16) & 0xf\nRa = (opval>>12) & 0xf\nRm = (opval>>8) & 0xf\n@@ -297,9 +296,8 @@ def p_misc(opval, va):\n#smlaw\n#mask and value are OK\nelif opval & 0x0ff000b0 == 0x01200080:\n- opcode = (IENC_MISC << 16) + 10\nm = (opval>>6)&1\n- mnem = smlaw_mnem[m]\n+ mnem, opcode = smlaw_mnem[m]\nRd = (opval>>16) & 0xf\nRa = (opval>>12) & 0xf\nRm = (opval>>8) & 0xf\n@@ -313,9 +311,8 @@ def p_misc(opval, va):\n#smulw\n#mask and value are ok\nelif opval & 0x0ff000b0 == 0x012000a0:\n- opcode = (IENC_MISC << 16) + 11\nm = (opval>>6)&1\n- mnem = smulw_mnem[m]\n+ mnem, opcode = smulw_mnem[m]\nRd = (opval>>16) & 0xf\nRm = (opval>>8) & 0xf\nRn = opval & 0xf\n@@ -327,9 +324,8 @@ def p_misc(opval, va):\n#smlal\n#mask and value are ok\nelif opval & 0x0ff00090 == 0x01400080:\n- opcode = (IENC_MISC << 16) + 12\nmn = (opval>>5)&3\n- mnem = smlal_mnem[mn]\n+ mnem, opcode = smlal_mnem[mn]\nRdhi = (opval>>16) & 0xf\nRdlo = (opval>>12) & 0xf\nRm = (opval>>8) & 0xf\n@@ -343,9 +339,8 @@ def p_misc(opval, va):\n#smul\n#elif opval & 0x0ff00090 == 0x01600080:\nelif opval & 0x0ff0f090 == 0x01600080:\n- opcode = (IENC_MISC << 16) + 13\nmn = (opval>>5)&3\n- mnem = smul_mnem[mn]\n+ mnem, opcode = smul_mnem[mn]\nRd = (opval>>16) & 0xf\nRm = (opval>>8) & 0xf\nRn = opval & 0xf\n@@ -375,9 +370,6 @@ def p_misc(opval, va):\nreturn (opcode, mnem, olist, 0, 0)\n-#### these actually belong to the media section, and already exist there. FIXME: DELETE\n-#misc1_mnem = (\"pkhbt\", \"pkhtb\", \"rev\", \"rev16\", \"revsh\", \"sel\", \"ssat\", \"ssat16\", \"usat\", \"usat16\", )\n-\ndef p_misc1(opval, va): #\n#R = (opval>>22) & 1\n#Rn = (opval>>16) & 0xf\n@@ -396,7 +388,7 @@ def p_misc1(opval, va): #\niflags |= envi.IF_RET\nelif opval & 0x0ff000f0 == 0x01600010:\n- opcode = (IENC_MISC << 16) + 4\n+ opcode = INS_CLZ\nmnem = 'clz'\nRd = (opval>>12) & 0xf\nRm = opval & 0xf\n@@ -413,9 +405,8 @@ def p_misc1(opval, va): #\niflags |= envi.IF_CALL\nelif opval & 0x0f9000f0 == 0x01000050: #all qadd/qsub's\n- opcode = (IENC_MISC << 16) + 7\nqop = (opval>>21)&3\n- mnem = qop_mnem[qop]\n+ mnem, opcode = qop_mnem[qop]\nRn = (opval>>16) & 0xf\nRd = (opval>>12) & 0xf\nRm = opval & 0xf\n@@ -458,8 +449,9 @@ STRH (imm) & (reg)\n'''\nswap_mnem = (\"swp\",\"swpb\",)\n#strex_mnem = (\"strex\",\"ldrex\",) # actual full instructions - keeping in case was mistake\n-strex_mnem = (\"strex\",\"ldrex\",\"\",\"d\",\"b\",\"h\") # full instruction then suffix - missed in merge?\n-strh_mnem = ((\"str\",IF_H,2),(\"ldr\",IF_H,2),) # IF_H\n+strex_mnem = (\"strex\",\"ldrex\") # full instruction then suffix - missed in merge?\n+strex_flags = (0, IF_D, IF_B, IF_H)\n+strh_mnem = ((\"str\",INS_STR, IF_H,2),(\"ldr\",INS_LDR, IF_H,2),) # IF_H\nldrs_mnem = ((\"ldr\",IF_S|IF_B,1),(\"ldr\",IF_S|IF_H,2),) # IF_SH, IF_SB\nldrd_mnem = ((\"ldr\",IF_D),(\"str\",IF_D),) # IF_D\n@@ -474,7 +466,7 @@ def p_extra_load_store(opval, va, psize=4):\ntvariant = bool ((pubwl & 0x12)==2)\nif opval&0x0fb000f0==0x01000090:# swp/swpb\nidx = (pubwl>>2)&1\n- opcode = (IENC_EXTRA_LOAD << 16) + idx\n+ opcode = INS_SWP\nmnem = swap_mnem[idx]\nolist = (\nArmRegOper(Rd, va=va),\n@@ -485,7 +477,8 @@ def p_extra_load_store(opval, va, psize=4):\nidx = pubwl&1\nopcode = (IENC_EXTRA_LOAD << 16) + 2 + idx\nitype = (opval >> 21) & 3\n- mnem = strex_mnem[idx]+strex_mnem[2+itype]\n+ mnem = strex_mnem[idx]\n+ iflags |= strex_flags[itype]\nif (idx==0) & (itype != 1): #strex has 1 more entry than ldrex\nolist = (\nArmRegOper(Rd, va=va),\n@@ -516,7 +509,7 @@ def p_extra_load_store(opval, va, psize=4):\n# 0000u110-Rn--Rt-imm41011imm4 - STRHT (v7+)\nidx = pubwl&1\nopcode = (IENC_EXTRA_LOAD << 16) + 4 + idx\n- mnem,iflags,tsize = strh_mnem[idx]\n+ mnem, opcode, iflags, tsize = strh_mnem[idx]\nif tvariant:\niflags |= IF_T\nolist = (\n@@ -525,8 +518,7 @@ def p_extra_load_store(opval, va, psize=4):\n)\nelif opval&0x0e4000f0==0x004000b0:# strh/ldrh immoffset\nidx = pubwl&1\n- opcode = (IENC_EXTRA_LOAD << 16) + 6 + idx\n- mnem,iflags,tsize= strh_mnem[idx]\n+ mnem, opcode, iflags, tsize= strh_mnem[idx]\nif tvariant:\niflags |= IF_T\nolist = (\n@@ -535,7 +527,7 @@ def p_extra_load_store(opval, va, psize=4):\n)\nelif opval&0x0e5000d0==0x005000d0:# ldrsh/b immoffset\nidx = (opval>>5)&1\n- opcode = (IENC_EXTRA_LOAD << 16) + 8 + idx\n+ opcode = INS_LDR\nmnem,iflags,tsize = ldrs_mnem[idx]\nif tvariant:\niflags |= IF_T\n@@ -545,7 +537,7 @@ def p_extra_load_store(opval, va, psize=4):\n)\nelif opval&0x0e5000d0==0x001000d0:# ldrsh/b regoffset\nidx = (opval>>5)&1\n- opcode = (IENC_EXTRA_LOAD << 16) + 10 + idx\n+ opcode = INS_LDR\nmnem,iflags,tsize = ldrs_mnem[idx]\nif tvariant:\niflags |= IF_T\n@@ -563,7 +555,7 @@ def p_extra_load_store(opval, va, psize=4):\nmesg=\"extra_load_store: invalid Rt argument\",\nbytez=struct.pack(\"<I\", opval), va=va)\nidx = (opval>>5)&1\n- opcode = (IENC_EXTRA_LOAD << 16) + 12 + idx\n+ opcode = INS_LDR\nmnem,iflags = ldrd_mnem[idx]\nolist = (\nArmRegOper(Rd, va=va),\n@@ -576,7 +568,7 @@ def p_extra_load_store(opval, va, psize=4):\nmesg=\"extra_load_store: invalid Rt argument\",\nbytez=struct.pack(\"<I\", opval), va=va)\nidx = (opval>>5)&1\n- opcode = (IENC_EXTRA_LOAD << 16) + 14 + idx\n+ opcode = INS_LDR\nmnem,iflags = ldrd_mnem[idx]\nolist = (\nArmRegOper(Rd, va=va),\n@@ -1330,23 +1322,22 @@ def p_coproc_load(opval, va):\nopcode = (IENC_COPROC_LOAD << 16)\nreturn (opcode, ldc_mnem[punwl&1], olist, iflags, 0)\n-mcrr_mnem = (\"mcrr\", \"mrrc\")\n+mcrr_mnem = ((\"mcrr\", INS_MCRR), (\"mrrc\", INS_MRRC))\ndef p_coproc_dbl_reg_xfer(opval, va):\nRn = (opval>>16) & 0xf\nRd = (opval>>12) & 0xf\ncp_num = (opval>>8) & 0xf\n- opcode = (opval>>4) & 0xf\n+ copcode = (opval>>4) & 0xf\nCRm = opval & 0xf\n- mnem = mcrr_mnem[(opval>>20) & 1]\nolist = (\nArmCoprocOper(cp_num),\n- ArmCoprocOpcodeOper(opcode),\n+ ArmCoprocOpcodeOper(copcode),\nArmRegOper(Rd, va=va),\nArmRegOper(Rn, va=va),\nArmCoprocRegOper(CRm),\n)\n- opcode = IENC_COPROC_RREG_XFER<<16\n+ mnem, opcode = mcrr_mnem[(opval>>20) & 1]\nreturn (opcode, mnem, olist, 0, 0)\ncdp_mnem = (\"cdp\", \"cdp2\")\n@@ -1407,6 +1398,266 @@ def p_swint(opval, va):\nopcode = IENC_SWINT << 16 + 1\nreturn (opcode, \"svc\", olist, 0, 0)\n+def p_vmov_single(opval, va):\n+ op = (val >> 20) & 1\n+\n+ n = (opval >> 7) & 1\n+ vn = (opval >> 15) & 0x1e | n\n+\n+ rt = (opval >> 12) & 0xf\n+\n+ if op:\n+ opers = (\n+ ArmRegOper(rt, va),\n+ ArmRegOper(rctx.getRegisterIndex('s%d' % vn)),\n+\n+ )\n+ else:\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex('s%d' % vn)),\n+ ArmRegOper(rt, va),\n+ )\n+ return opcode, mnem, opers, 0, 0\n+\n+def p_vmov_2single(opval, va): # p944\n+ op = (val >> 20) & 1\n+\n+ rt2 = (opval >> 16) & 0xf\n+ rt = (opval >> 12) & 0xf\n+\n+ m = (opval >> 5) & 1\n+ vm = ((opval << 1) & 0x1e) | m\n+\n+ if op:\n+ opers = (\n+ ArmRegOper(rt, va),\n+ ArmRegOper(rt2, va),\n+ ArmRegOper(rctx.getRegisterIndex('s%d' % vm)),\n+ ArmRegOper(rctx.getRegisterIndex('s%d' % (vm+1))),\n+\n+ )\n+ else:\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex('s%d' % vm)),\n+ ArmRegOper(rctx.getRegisterIndex('s%d' % (vm+1))),\n+ ArmRegOper(rt, va),\n+ ArmRegOper(rt2, va),\n+ )\n+ return opcode, mnem, opers, 0, 0\n+\n+def p_vmov_double(opval, va):\n+ opcode = INS_VMOV\n+ mnem = 'vmov'\n+\n+ op = (val >> 20) & 1\n+\n+ rt2 = (opval >> 16) & 0xf\n+ rt = (opval >> 12) & 0xf\n+\n+ m = (opval >> 5) & 1\n+ vm = ((opval << 1) & 0x1e) | m\n+\n+ if op:\n+ opers = (\n+ ArmRegOper(rt, va),\n+ ArmRegOper(rt2, va),\n+ ArmRegOper(rctx.getRegisterIndex('d%d' % vm)),\n+\n+ )\n+ else:\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex('d%d' % vm)),\n+ ArmRegOper(rt, va),\n+ ArmRegOper(rt2, va),\n+ )\n+\n+ return opcode, mnem, opers, 0, 0\n+\n+def p_vmov_scalar(opval, va):\n+ op = (val >> 20) & 1\n+\n+ opc1 = (opval >> 21) & 7\n+ opc2 = (opval >> 5) & 3\n+\n+ rt = (opval >> 12) & 0xf\n+\n+ d = (opval >> 3) & 0x10\n+ vd = ((opval >> 16) & 0xf) | d\n+\n+ if (opc1 & 2): # 1xxx\n+ index = ((opc1 & 1) << 2) | opc2\n+ simdflags = IFS_8\n+\n+ elif (opc2 & 1):# 0xx1\n+ index = ((opc1 & 1) << 1) | (opc2 >> 1)\n+ simdflags = IFS_16\n+\n+ else: # 0xx0\n+ index = (opc1 & 1) << 1\n+ simdflags = IFS_32\n+\n+ if op:\n+ opers = (\n+ ArmRegOper(rt, va),\n+ ArmRegScalarOper(rctx.getRegisterIndex('d%d' % vm), index),\n+ )\n+ else:\n+ opers = (\n+ ArmRegScalarOper(rctx.getRegisterIndex('d%d' % vm), index),\n+ ArmRegOper(rt, va),\n+ )\n+\n+ return INS_VMOV, 'vmov', opers, 0, simdflags\n+\n+def p_vstm(opval, va): #p1078\n+ pudwl = (opval >> 20) & 0x1f\n+ rn = (opval >> 16) & 0xf\n+ vd = (opval >> 12) & 0xf\n+ imm8 = (opval & 0xff)\n+\n+ flags = (0, IF_IA, IF_DB, 0)[pudwl>>3]\n+\n+ if pudwl & 2: # W==1\n+ oflags = OF_W\n+ else:\n+ oflags = 0\n+\n+ op = (opval>>8) & 1\n+ regsize = imm8 >> op\n+ simdflags = (IFS_32, IFS_64)[op]\n+\n+ opers = (\n+ ArmRegOper(rn, va, oflags=oflags),\n+ ArmExtRegListOper(vn, regsize, op),\n+ )\n+\n+ return opcode, mnem, opers, flags, simdflags\n+\n+def p_vstr(opval, va):\n+ pudwl = (opval >> 20) & 0x8\n+ rn = (opval >> 16) & 0xf\n+ vd = (opval >> 12) & 0xf\n+ imm = (opval & 0xff) << 2\n+\n+ sz = (opval>>8) & 1\n+ simdflags = (IFS_32, IFS_64)[sz]\n+\n+ rbase = (\"s%d\",\"d%d\")[sz]\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex(rbase % vd)),\n+ ArmImmOffsetOper(rn, imm, va, pudwl=pudwl)\n+ )\n+\n+ return INS_VSTR, 'vstr', opers, 0, 0\n+\n+\n+def p_vpush(opval, va):\n+ pudwl = (opval >> 20) & 0x1f\n+ vd = (opval >> 12) & 0xf\n+ imm8 = (opval & 0xff)\n+\n+ op = (opval>>8) & 1\n+ regsize = imm8 >> op\n+ simdflags = (IFS_32, IFS_64)[op]\n+\n+ opers = (\n+ ArmExtRegListOper(vn, regsize, op),\n+ )\n+\n+ return INS_VPUSH, 'vpush', opers, 0, simdflags\n+\n+def p_vldm(opval, va): #p920\n+ pudwl = (opval >> 20) & 0x1f\n+ rn = (opval >> 16) & 0xf\n+ vd = (opval >> 12) & 0xf\n+ imm8 = (opval & 0xff)\n+\n+ flags = (0, IF_IA, IF_DB, 0)[pudwl>>3]\n+\n+ if pudwl & 2: # W==1\n+ oflags = OF_W\n+ else:\n+ oflags = 0\n+\n+ op = (opval>>8) & 1\n+ regsize = imm8 >> op\n+ simdflags = (IFS_32, IFS_64)[op]\n+\n+ opers = (\n+ ArmRegOper(rn, oflag=oflags),\n+ ArmExtRegListOper(vn, regsize, op),\n+ )\n+\n+ return INS_VLDM, 'vldm', opers, flags, simdflags\n+\n+def p_vldr(opval, va):\n+ pudwl = (opval >> 20) & 0x8\n+ rn = (opval >> 16) & 0xf\n+ vd = (opval >> 12) & 0xf\n+ imm = (opval & 0xff) << 2\n+\n+ sz = (opval>>8) & 1\n+ simdflags = (IFS_32, IFS_64)[sz]\n+\n+ rbase = (\"s%d\",\"d%d\")[sz]\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex(rbase % vd)),\n+ ArmImmOffsetOper(rn, imm, va, pudwl=pudwl)\n+ )\n+\n+ return INS_VLDR, 'vldr', opers, 0, simdflags\n+\n+def p_vpop(opval, va):\n+ pudwl = (opval >> 20) & 0x1f\n+ vd = (opval >> 12) & 0xf\n+ imm8 = (opval & 0xff)\n+\n+ op = (opval>>8) & 1\n+ regsize = imm8 >> op\n+ simdflags = (IFS_32, IFS_64)[op]\n+\n+ opers = (\n+ ArmExtRegListOper(vn, regsize, op),\n+ )\n+\n+ return INS_VPUSH, 'vpush', opers, 0, simdflags\n+\n+def p_vdup(opval, va):\n+ q = (opva >> 21) & 1\n+ b = (opva >> 22) & 1\n+ d = ((opva >> 3) & 0x10)\n+ vd = (opva >> 16) & 0xf | d\n+ rt = (opva >> 12) & 0xf\n+ e = (opva >> 5) & 1\n+\n+\n+ # q# regs are two d# regs\n+ d >>= q\n+ rbase = (\"s%d\",\"d%d\")[q]\n+\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex(rbase % vd)),\n+ ArmRegOper(rt, va=va),\n+ )\n+\n+ be = (b<<1) | e\n+ simdflags = (IFS_32, IFS_16, IFS_8, None)[be]\n+\n+ return INS_VDUP, 'vdup', opers, 0, simdflags\n+\n+def p_vmsr(opval, va):\n+ # vmsr/vmrs\n+ l = (opval >> 20) & 1\n+ rt = (opval >> 12) & 0xf\n+ opcode, mnem = ((INS_VMSR, 'vmsr'), (INS_VMRS, 'vmrs'))[l]\n+\n+ opers = (\n+ ArmRegOper(rt, va=va),\n+ )\n+\n+ return opcode, mnem, opers, 0, 0\n+\n+\nmcrr2_mnem = (\"mcrr2\", \"mrrc2\")\nldc2_mnem = (\"stc2\", \"ldc2\",)\nmcr2_mnem = (\"mcr2\", \"mrc2\")\n@@ -1635,7 +1886,7 @@ def p_uncond(opval, va, psize = 4):\nmesg=\"p_uncond (ontop=3): invalid instruction\",\nbytez=struct.pack(\"<I\", opval), va=va)\n-\n+vmul_mnems = (('vmla', INS_VMLA),('vmls', INS_VMLS),('vnmla', INS_VNMLA),('vnmls', INS_VNMLS),('vnmul', INS_VNMUL),('vmul', INS_VMUL),('vadd', INS_VADD),('vsub', INS_VSUB),('vdiv', INS_VDIV),('vfnms', INS_VFNMS),('vfnma', INS_VFNMA),('vfms', INS_VFMS),('vfma', INS_VFMA),)\ndef p_fp_dp(opval, va):\nval1 = opval >> 16\nval2 = opval & 0xffff\n@@ -1667,9 +1918,7 @@ def _do_fp_dp(va, val1, val2):\nif opc1sub != 0b1011:\nop = (opc1sub & 0b1000) | ((opc1sub & 0b11)<<1) | (opc3 & 1)\n- mnem = ('vmla','vmls','vnmla','vnmls','vnmul','vmul','vadd','vsub','vdiv','vfnms','vfnma','vfms','vfma',)[op]\n-\n-\n+ mnem, opcode = vmul_mnems[op]\nif sz:\nd = (D<<4) | Vd\n@@ -1697,7 +1946,7 @@ def _do_fp_dp(va, val1, val2):\n)\nelse:\n- # VMOV p934\n+ # VMOV p934 Q#, D#, QQ, DD, DD, SS\nD = (val1 >> 6) & 1\nVd = (val2 >> 12) & 0xf\nimm4h = val1 & 0xf\n@@ -1716,21 +1965,24 @@ def _do_fp_dp(va, val1, val2):\nsimdflags |= IFS_F32\nrbase = \"s%d\"\n- if opc3 & 1 == 0:\n+ if opc3 & 1 == 0: # p934\nmnem = 'vmov'\n+ opcode = INS_VMOV\nopers = (\nArmRegOper(rctx.getRegisterIndex(rbase%d)),\nArmImmOper(imm),\n)\nelif opc2 == 0:\n- # VMOV p935 with reg/reg\n+ # VMOV p936 with reg/reg\nif opc3 & 1:\nmnem = 'vmov'\n+ opcode = INS_VMOV\n# VABS p822 T2/A2\nelif opc3 == 3:\nmnem = 'vabs'\n+ opcode = INS_VABS\nopers = (\nArmRegOper(rctx.getRegisterIndex(rbase%d)),\n@@ -1741,10 +1993,12 @@ def _do_fp_dp(va, val1, val2):\n# VNEG p966 T2/A2\nif opc3 == 0x1:\nmnem = 'vneg'\n+ opcode = INS_VNEG\n# VSQRT p1056\nelif opc3 == 0x3:\nmnem = 'vsqrt'\n+ opcode = INS_VSQRT\nopers = (\nArmRegOper(rctx.getRegisterIndex(rbase%d)),\n@@ -1765,7 +2019,7 @@ def _do_fp_dp(va, val1, val2):\n# VCMP, VCMPE p862\nelif opc2 in (4,5) and opc3 in (1,3):\nE = N\n- mnem = ('vcmp','vcmpe')[E]\n+ mnem, opcode = (('vcmp', INS_VCMP),('vcmpe', INS_VCMPE))[E]\nif opc2 == 4:\nopers = (\n@@ -1781,6 +2035,7 @@ def _do_fp_dp(va, val1, val2):\n# VCVT p874\nelif opc2 == 7 and opc3 == 3:\nmnem = 'vcvt'\n+ opcode = INS_VCVT\nif sz:\nd = (Vd<<1) | D\nm = (M<<4) | Vm\n@@ -1806,6 +2061,7 @@ def _do_fp_dp(va, val1, val2):\nto_int = opc2 & 0b100\nif to_int:\nmnem = 'vcvtr'\n+ opcode = INS_VCVTR\nsigned = opc2&1\nround_zero = op\n@@ -1823,6 +2079,8 @@ def _do_fp_dp(va, val1, val2):\nelse:\nmnem = 'vcvt'\n+ opcode = INS_VCVT\n+\nsigned = op\nround_nearest = False\nm = (Vm<<1) | M\n@@ -1845,6 +2103,7 @@ def _do_fp_dp(va, val1, val2):\n# VCVT p872\nelif opc2 in (0b1010,0b1011,0b1110,0b1111) and opc3&1:\nmnem = 'vcvt'\n+ opcode = INS_VCVT\nU = (val1>>12) & 1 # thumb only. arm gets U from bit 22\nimm6 = val1 & 0x3f\nop = sz\n@@ -1891,7 +2150,6 @@ def _do_fp_dp(va, val1, val2):\nreturn (opcode, mnem, opers, iflags, simdflags)\n-\ndef p_advsimd_secondary(val, va, mnem, opcode, flags, opers):\nif opcode == INS_VORR:\nsrc1 = (val>>16) & 0xf\n@@ -2820,8 +3078,7 @@ def _do_adv_simd_32(val, va, u):\nArmRegOper(rctx.getRegisterIndex(rbase%m)),\n)\n- #sz = (val>>8) & 0x3 # vabs needs sz to be bits 18-19\n- sz = (val>>18) & 0x3 # vabs needs sz to be bits 18-19\n+ sz = (val>>18) & 0x3\nszu = sz + flagoff\nsimdflags = adv_simd_dts[szu]\n@@ -3155,6 +3412,18 @@ ienc_parsers_tmp[IENC_SWINT] = p_swint\nienc_parsers_tmp[IENC_UNCOND] = p_uncond\nienc_parsers_tmp[IENC_DP_MOVT] = p_dp_movt\nienc_parsers_tmp[IENC_DP_MOVW] = p_dp_movw\n+ienc_parsers_tmp[IENC_VMOV_DOUBLE] = p_vmov_double\n+ienc_parsers_tmp[IENC_VMOV_SINGLE] = p_vmov_single\n+ienc_parsers_tmp[IENC_VMOV_2SINGLE] = p_vmov_2single\n+ienc_parsers_tmp[IENC_VSTM] = p_vstm\n+ienc_parsers_tmp[IENC_VSTR] = p_vstr\n+ienc_parsers_tmp[IENC_VPUSH] = p_vpush\n+ienc_parsers_tmp[IENC_VLDM] = p_vldm\n+ienc_parsers_tmp[IENC_VLDR] = p_vldr\n+ienc_parsers_tmp[IENC_VPOP] = p_vpop\n+ienc_parsers_tmp[IENC_VMSR] = p_vmsr\n+ienc_parsers_tmp[IENC_VMOV_SCALAR] = p_vmov_scalar\n+ienc_parsers_tmp[IENC_VDUP] = p_vdup\nienc_parsers = tuple(ienc_parsers_tmp)\n@@ -3203,13 +3472,33 @@ s_3_table = (\n)\ns_6_table = (\n+ (0b00001111111000000000111111010000, 0b00001100010000000000101000010000, IENC_VMOV_2SINGLE),\n+ (0b00001111111000000000111111010000, 0b00001100010000000000101100010000, IENC_VMOV_DOUBLE),\n+ (0b00001111100100000000111000000000, 0b00001100100000000000101000000000, IENC_VSTM),\n+ (0b00001111101111110000111000000000, 0b00001101001011010000101000000000, IENC_VPUSH),\n+ (0b00001111101100000000111000000000, 0b00001101001000000000101000000000, IENC_VSTM),\n+ (0b00001111001100000000111000000000, 0b00001101000000000000101000000000, IENC_VSTR),\n+ (0b00001111100100000000111000000000, 0b00001100100100000000101000000000, IENC_VLDM),\n+ (0b00001111101111110000111000000000, 0b00001101001111010000101000000000, IENC_VPOP),\n+ (0b00001111101100000000111000000000, 0b00001101001100000000101000000000, IENC_VLDM),\n+ (0b00001111001100000000111000000000, 0b00001101000100000000101000000000, IENC_VLDR),\n(0b00001111111000000000000000000000, 0b00001100010000000000000000000000, IENC_COPROC_RREG_XFER),\n(0b00001110000000000000000000000000, 0b00001100000000000000000000000000, IENC_COPROC_LOAD),\n+\n)\ns_7_table = (\n(0b00000001000000000000000000000000, 0b00000001000000000000000000000000, IENC_SWINT),\n- (0b00000001000000000000000000010000, 0b00000000000000000000000000010000, IENC_COPROC_REG_XFER),\n+ (0b00001111111100000000111100010000, 0b00001110000000000000101000010000, IENC_VMOV_SINGLE),\n+ (0b00001111111100000000111100010000, 0b00001110111000000000101000010000, IENC_VMSR),\n+ (0b00001111100100000000111100010000, 0b00001110000000000000101100010000, IENC_VMOV_SCALAR),\n+ (0b00001111100100000000111101010000, 0b00001110100000000000101100010000, IENC_VDUP),\n+ (0b00001111111100000000111100010000, 0b00001110000100000000101000010000, IENC_VMOV_SINGLE),\n+ (0b00001111111100000000111100010000, 0b00001110111100000000101000010000, IENC_VMSR),\n+ (0b00001111000100000000111100010000, 0b00001110000100000000101100010000, IENC_VMOV_SCALAR),\n+ (0b00000001000000000000111000010000, 0b00000000000000000000101000000000, IENC_FP_DP),\n+ (0b00000001000000000000111000010000, 0b00000000000000000000101000010000, IENC_ADVSIMD),\n+ (0b00001111000000000000000000010000, 0b00001000000000000000000000000000, IENC_COPROC_REG_XFER),\n(0, 0, IENC_COPROC_DP),\n)\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_arm.py",
"new_path": "envi/tests/test_arch_arm.py",
"diff": "@@ -1649,8 +1649,8 @@ class ArmInstructionSet(unittest.TestCase):\nbadcount += 1\n- raise Exception(\"FAILED to decode instr: %.8x %s - should be: %s - is: %s\" % \\\n- ( va, bytez, reprOp, repr(op) ) )\n+ raise Exception(\"%d FAILED to decode instr: %.8x %s - should be: %s - is: %s\" % \\\n+ (goodcount, va, bytez, reprOp, repr(op) ) )\nself.assertEqual((goodcount, bytez, redoprepr), (goodcount, bytez, redgoodop))\n#print bytez, op\nif not len(emutests):\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
floating point instruction wiring into arm, and thumb. lots of "opcode" rightness fixes. still decoding bugs to iron out.
|
718,770 |
04.03.2017 01:00:44
| 18,000 |
099716aee024e5e497a84e8549fa24a9f0f33b85
|
lots more floating point instructions..
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/const.py",
"new_path": "envi/archs/arm/const.py",
"diff": "@@ -313,6 +313,7 @@ iencs = (\\\n'IENC_COPROC_LOAD', # Coprocessor load/store and double reg xfers\n'IENC_COPROC_DP', # Coprocessor data processing\n'IENC_COPROC_REG_XFER', # Coprocessor register transfers\n+ 'IENC_MCR', # Move to Corprocessor from ARM Regs and vice versa\n'IENC_SWINT', # Sofware interrupts\n'IENC_UNCOND', # unconditional wacko instructions\n'IENC_EXTRA_LOAD', # extra load/store (swp)\n@@ -589,8 +590,19 @@ instrnames = [\n'VDIV',\n'VFNMS',\n'VFNMA',\n-\n-\n+ 'CDP',\n+ 'CDP2',\n+ 'MCR',\n+ 'MRC',\n+ 'MSR',\n+ 'MRS',\n+ 'CLZ',\n+ 'NOP',\n+ 'YIELD',\n+ 'WFE',\n+ 'WFI',\n+ 'SEV',\n+ 'SWP',\n]\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -776,11 +776,11 @@ def p_dp_movt(opval, va):\nreturn(opcode, \"movt\", olist, iflags, 0)\nhint_mnem = {\n- 0: 'Nop',\n- 1: 'yield',\n- 2: 'wfe',\n- 3: 'wfi',\n- 4: 'sev',\n+ 0: ('Nop',INS_NOP),\n+ 1: ('yield',INS_YIELD),\n+ 2: ('wfe',INS_WFE),\n+ 3: ('wfi',INS_WFI),\n+ 4: ('sev',INS_SEV),\n}\ndef p_mov_imm_stat(opval, va): # only one instruction: \"msr\"\n@@ -789,27 +789,28 @@ def p_mov_imm_stat(opval, va): # only one instruction: \"msr\"\nrot = (opval>>8) & 0xf\nr = (opval>>22) & 1\nmask = (opval>>16) & 0xf\n- opcode = (IENC_MOV_IMM_STAT << 16)\nif mask == 0:\n- opcode += 1\n# it's a NOP or some hint instruction\nif imm>>16:\nmnem = 'dbg'\n+ opcode = INS_DBG\noption = opval & 0xf\nolist = ( ArmDbgHintOption(option), )\nelse:\n- mnem = hint_mnem.get(imm)\n- if mnem == None:\n+ stuff = hint_mnem.get(imm)\n+ if stuff == None:\nraise envi.InvalidInstruction(\nmesg=\"MSR/Hint illegal encoding\",\nbytez=struct.pack(\"<I\", opval), va=va)\n+ mnem, opcode = stuff\nolist = tuple()\nelse:\n# it's an MSR <immediate>\nmnem = 'msr'\n+ opcode = INS_MSR\nimmed = ((imm>>rot) + (imm<<(32-rot))) & 0xffffffff\n#if mask & 3: # USER mode these will be 0\n@@ -822,6 +823,35 @@ def p_mov_imm_stat(opval, va): # only one instruction: \"msr\"\nreturn (opcode, mnem, olist, iflags, 0)\n+def p_mcr(opval, va):\n+ op = (opval>>20) & 1\n+ opcode, mnem = ((INS_MCR, 'mcr'), (INS_MRC, 'mrc'))[op]\n+ opc1 = (opval>>21) & 7\n+ opc2 = (opval>>5) & 7\n+ coproc = (opval>>8) & 0xf\n+ crn = (opval>>16) & 0xf\n+ rt = (opval>>12) & 0xf\n+ crm = (opval & 0xf)\n+\n+ if opc2:\n+ opers = (\n+ ArmCoprocOper(coproc),\n+ ArmCoprocOpcodeOper(opc1),\n+ ArmRegOper(rt, va=va),\n+ ArmCoprocRegOper(crn),\n+ ArmCoprocRegOper(crm),\n+ ArmCoprocOpcodeOper(opc2),\n+ )\n+ else:\n+ opers = (\n+ ArmCoprocOper(coproc),\n+ ArmCoprocOpcodeOper(opc1),\n+ ArmRegOper(rt, va=va),\n+ ArmCoprocRegOper(crn),\n+ ArmCoprocRegOper(crm),\n+ )\n+ return (opcode, mnem, opers, 0, 0)\n+\nldr_mnem = (\"str\", \"ldr\")\ntsizes = (4, 1,)\ndef p_load_imm_off(opval, va, psize=4):\n@@ -1340,7 +1370,7 @@ def p_coproc_dbl_reg_xfer(opval, va):\nmnem, opcode = mcrr_mnem[(opval>>20) & 1]\nreturn (opcode, mnem, olist, 0, 0)\n-cdp_mnem = (\"cdp\", \"cdp2\")\n+cdp_mnem = ((\"cdp\", INS_CDP), (\"cdp2\", INS_CDP2))\ndef p_coproc_dp(opval, va):\nopcode1 = (opval>>20) & 0xf\n@@ -1351,7 +1381,7 @@ def p_coproc_dp(opval, va):\nCRm = opval & 0xf\ncdp2bit = (opval>>28)&1\n- mnem = cdp_mnem[cdp2bit]\n+ mnem, opcode = cdp_mnem[cdp2bit]\nif cdp2bit == 0 and (cp_num & 0b1110) == 0b1010:\nreturn p_fp_dp(opval, va)\n@@ -2245,7 +2275,7 @@ adv_simd_3_regs = ( # ABUC fields slammed together\n(None, INS_VCGE, 0, None),\n# a=0100 b=0\n- ('vshl', INS_VSHL, IFS_S8, None),\n+ ('vshl', INS_VSHL, IFS_S8, None), # d, m, n, not d, n, m like all the others in this category\n('vshl', INS_VSHL, IFS_S16, None),\n('vshl', INS_VSHL, IFS_S32, None),\n('vshl', INS_VSHL, IFS_S64, None),\n@@ -2335,9 +2365,9 @@ adv_simd_3_regs = ( # ABUC fields slammed together\n(None, INS_VSUB, 0, None),\n# a=1000 b=1\n- ('vtst', INS_VTST, IFS_I8, None),\n- ('vtst', INS_VTST, IFS_I16, None),\n- ('vtst', INS_VTST, IFS_I32, None),\n+ ('vtst', INS_VTST, IFS_8, None),\n+ ('vtst', INS_VTST, IFS_16, None),\n+ ('vtst', INS_VTST, IFS_32, None),\n(None, INS_VTST, 0, None),\n('vceq', INS_VCEQ, IFS_I8, None),\n('vceq', INS_VCEQ, IFS_I16, None),\n@@ -2355,13 +2385,13 @@ adv_simd_3_regs = ( # ABUC fields slammed together\n(None, INS_VMLS, 0, None),\n# a=1001 b=1\n- ('vmul', INS_VMUL, IFS_S8, None),\n- ('vmul', INS_VMUL, IFS_S16, None),\n- ('vmul', INS_VMUL, IFS_S32, None),\n+ ('vmul', INS_VMUL, IFS_I8, None),\n+ ('vmul', INS_VMUL, IFS_I16, None),\n+ ('vmul', INS_VMUL, IFS_I32, None),\n(None, INS_VMUL, 0, None),\n- ('vmul', INS_VMUL, IFS_U8, None),\n- ('vmul', INS_VMUL, IFS_U16, None),\n- ('vmul', INS_VMUL, IFS_U32, None),\n+ ('vmul', INS_VMUL, IFS_P8, None),\n+ ('vmul', INS_VMUL, IFS_P16, None),\n+ ('vmul', INS_VMUL, IFS_P32, None),\n(None, INS_VMUL, 0, None),\n# a=1010 b=0\n@@ -2763,6 +2793,13 @@ def _do_adv_simd_32(val, va, u):\nn >>= q\nm >>= q\n+ if (a & 0xe) == 4:\n+ opers = (\n+ ArmRegOper(rctx.getRegisterIndex(rbase%d)),\n+ ArmRegOper(rctx.getRegisterIndex(rbase%m)),\n+ ArmRegOper(rctx.getRegisterIndex(rbase%n)),\n+ )\n+ else:\nopers = (\nArmRegOper(rctx.getRegisterIndex(rbase%d)),\nArmRegOper(rctx.getRegisterIndex(rbase%n)),\n@@ -3424,6 +3461,8 @@ ienc_parsers_tmp[IENC_VPOP] = p_vpop\nienc_parsers_tmp[IENC_VMSR] = p_vmsr\nienc_parsers_tmp[IENC_VMOV_SCALAR] = p_vmov_scalar\nienc_parsers_tmp[IENC_VDUP] = p_vdup\n+ienc_parsers_tmp[IENC_MCR] = p_mcr\n+\nienc_parsers = tuple(ienc_parsers_tmp)\n@@ -3499,7 +3538,8 @@ s_7_table = (\n(0b00000001000000000000111000010000, 0b00000000000000000000101000000000, IENC_FP_DP),\n(0b00000001000000000000111000010000, 0b00000000000000000000101000010000, IENC_ADVSIMD),\n(0b00001111000000000000000000010000, 0b00001000000000000000000000000000, IENC_COPROC_REG_XFER),\n- (0, 0, IENC_COPROC_DP),\n+ (0b00001111000000000000000000010000, 0b00001110000000000000000000010000, IENC_MCR),\n+ (0b00001111000000000000000000010000, 0b00001110000000000000000000000000, IENC_COPROC_DP),\n)\n# Initial 3 (non conditional) primary table\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/tests/test_arch_arm.py",
"new_path": "envi/tests/test_arch_arm.py",
"diff": "@@ -509,7 +509,7 @@ instrs = [\n(REV_ALL_ARM, '001000eb', 0x4560, 'bl 0x00008568', 0, ()),\n(REV_ALL_ARM, '001000fa', 0x4560, 'blx 0x00008569', 0, ()),\n(REV_ALL_ARM, '273764ee', 0x4560, 'cdp p7, 6, cr3, cr4, cr7, 1', 0, ()),\n- (REV_ALL_ARM, '473b34ee', 0x4560, 'cdp p11, 3, cr3, cr4, cr7, 2', 0, ()),\n+ (REV_ALL_ARM, '473b34ee', 0x4560, 'vsub.f64 d3, d4, d7', 0, ()),\n(REV_ALL_ARM, 'ff0c74e3', 0x4560, 'cmn r4, #0xff00', 0, ()),\n(REV_ALL_ARM, 'ff0c54e3', 0x4560, 'cmp r4, #0xff00', 0, ()),\n(REV_ALL_ARM, 'ff4c23e2', 0x4560, 'eor r4, r3, #0xff00', 0, ()),\n@@ -1268,6 +1268,7 @@ instrs = [\n(REV_ALL_ARM, 'f4efec2f', 0x4561, 'vext.8 q9, q10, q14, #0x0f', 0, ()),\n]\ninstrs.extend(advsimdtests)\n+instrs = advsimdtests\n# temp scratch: generated these while testing\n['0de803c0','8de903c0','ade903c0','2de803c0','1de803c0','3de803c0','9de903c0','bde903c0',]\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
lots more floating point instructions..
|
718,770 |
10.03.2017 23:40:28
| 18,000 |
3c0bdd9f74a3b2ea9f939b7f3f38837dacb6b065
|
Adv SIMD bug-fixes
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -2004,16 +2004,16 @@ def _do_fp_dp(va, val1, val2):\n)\nelif opc2 == 0:\n- # VMOV p936 with reg/reg\n- if opc3 & 1:\n- mnem = 'vmov'\n- opcode = INS_VMOV\n-\n# VABS p822 T2/A2\n- elif opc3 == 3:\n+ if opc3 == 3:\nmnem = 'vabs'\nopcode = INS_VABS\n+ # VMOV p936 with reg/reg\n+ elif opc3 & 1:\n+ mnem = 'vmov'\n+ opcode = INS_VMOV\n+\nopers = (\nArmRegOper(rctx.getRegisterIndex(rbase%d)),\nArmRegOper(rctx.getRegisterIndex(rbase%m)),\n@@ -2717,10 +2717,10 @@ adv_simd_2regs_misc = (\n('vcge', INS_VCGE, 0, 0,0),\n('vcge', INS_VCGE, 0, 1,1),\n# a=1 b=001xx\n- ('vceq', INS_VCEQ, 0, 0,0),\n- ('vceq', INS_VCEQ, 0, 1,1),\n- ('vcle', INS_VCLE, 0, 0,0),\n- ('vcle', INS_VCLE, 0, 1,1),\n+ ('vceq', INS_VCEQ, 8, 0,0),\n+ ('vceq', INS_VCEQ, 8, 1,1),\n+ ('vcle', INS_VCLE, 8, 0,0),\n+ ('vcle', INS_VCLE, 8, 1,1),\n# a=1 b=010xx\n('vclt', INS_VCLT, 0, 0,0),\n('vclt', INS_VCLT, 0, 1,1),\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
Adv SIMD bug-fixes
|
718,770 |
15.03.2017 00:55:39
| 14,400 |
4cf666ce6931d67b615d01e553e55ff2db97aa7b
|
modify vivisect.qt.memory.VQVivMemoryCanvas.getVaTag() to use the Locations database (for Thumb instructions referenced by odd addresses, when the legit location is an even address)
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/qt/memory.py",
"new_path": "vivisect/qt/memory.py",
"diff": "@@ -329,6 +329,11 @@ class VQVivMemoryCanvas(VivCanvasBase):\nnva, nvsz, nvt, nvti = nloc\nreturn (nva, va-nva)\n+ def getVaTag(self, va):\n+ loc = self.mem.getLocation(va)\n+ if loc != None:\n+ va = loc[L_VA]\n+ return VivCanvasBase.getVaTag(self, va)\nclass VQVivMemoryView(e_mem_qt.VQMemoryWindow, viv_base.VivEventCore):\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
modify vivisect.qt.memory.VQVivMemoryCanvas.getVaTag() to use the Locations database (for Thumb instructions referenced by odd addresses, when the legit location is an even address)
|
718,770 |
17.03.2017 17:28:02
| 14,400 |
4321581c9636b46747fead8c577e20a475b3dfdc
|
fix u_maxes bug i introduced in january.
|
[
{
"change_type": "MODIFY",
"old_path": "envi/__init__.py",
"new_path": "envi/__init__.py",
"diff": "@@ -797,7 +797,7 @@ class Emulator(e_reg.RegisterContext, e_mem.MemoryObject):\ndef writeMemValue(self, addr, value, size):\n#FIXME change this (and all uses of it) to passing in format...\n#FIXME: Remove byte check and possibly half-word check. (possibly all but word?)\n- mask = e_bits.umaxes[size]\n+ mask = e_bits.u_maxes[size]\nfmttbl = e_bits.fmt_chars[self.getEndian()]\nbytes = struct.pack(fmttbl[size], value & mask)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
fix u_maxes bug i introduced in january.
|
718,770 |
22.03.2017 19:25:32
| 14,400 |
72177e0a1e5a5be0f203ea1af154ef25db634fb8
|
make parseOpcode() prototype consistent in the import emulator
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/impemu/emulator.py",
"new_path": "vivisect/impemu/emulator.py",
"diff": "@@ -148,13 +148,13 @@ class WorkspaceEmulator:\n\"\"\"\nself.emumon = emumon\n- def parseOpcode(self, pc):\n+ def parseOpcode(self, va, arch=envi.ARCH_DEFAULT):\n# We can make an opcode *faster* with the workspace because of\n# getByteDef etc... use it.\n- op = self.opcache.get(pc)\n+ op = self.opcache.get(va)\nif op == None:\n- op = envi.Emulator.parseOpcode(self, pc)\n- self.opcache[pc] = op\n+ op = envi.Emulator.parseOpcode(self, va, arch=arch)\n+ self.opcache[va] = op\nreturn op\ndef checkCall(self, starteip, endeip, op):\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
make parseOpcode() prototype consistent in the import emulator
|
718,770 |
05.04.2017 20:58:50
| 14,400 |
5b8b4e9600ac18b754f97b31ca0f3cce444b28e2
|
update to handle non-1,2,4,8-byte memory reads/writes
|
[
{
"change_type": "MODIFY",
"old_path": "envi/__init__.py",
"new_path": "envi/__init__.py",
"diff": "@@ -775,16 +775,12 @@ class Emulator(e_reg.RegisterContext, e_mem.MemoryObject):\nif len(bytes) != size:\nraise Exception(\"Read Gave Wrong Length At 0x%.8x (va: 0x%.8x wanted %d got %d)\" % (self.getProgramCounter(),addr, size, len(bytes)))\n- fmttbl = e_bits.fmt_chars[self.getEndian()]\n- return struct.unpack(fmttbl[size], bytes)[0]\n+ return e_bits.parsebytes(bytes, 0, size, False, self.getEndian())\ndef writeMemValue(self, addr, value, size):\n#FIXME change this (and all uses of it) to passing in format...\n#FIXME: Remove byte check and possibly half-word check. (possibly all but word?)\n- mask = e_bits.u_maxes[size]\n- fmttbl = e_bits.fmt_chars[self.getEndian()]\n-\n- bytes = struct.pack(fmttbl[size], value & mask)\n+ bytes = e_bits.buildbytes(value, size, self.getEndian())\nself.writeMemory(addr, bytes)\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/h8/optables.py",
"new_path": "envi/archs/h8/optables.py",
"diff": "@@ -98,11 +98,11 @@ main_table[0x55] = (False, 'bsr', p_disp8, 0, IF_CALL)\nmain_table[0x56] = (False, 'rte', None, 0, IF_RET | IF_NOFALL) # 5670\nmain_table[0x57] = (False, 'trapa', p_i2, 0, IF_NOFALL)\nmain_table[0x58] = (False, 'error', p_disp16, 2, 0)\n-main_table[0x59] = (False, 'jmp', p_aERn, 0, IF_BRANCH | IF_NOFALL)\n+main_table[0x59] = (False, 'jmp', p_aERn, 3, IF_BRANCH | IF_NOFALL)\nmain_table[0x5a] = (False, 'jmp', p_aAA24, 0, IF_BRANCH | IF_NOFALL)\nmain_table[0x5b] = (False, 'jmp', p_aaAA8, 0, IF_BRANCH | IF_NOFALL)\nmain_table[0x5c] = (False, 'bsr', p_disp16, 0, IF_CALL)\n-main_table[0x5d] = (False, 'jsr', p_aERn, 0, IF_CALL)\n+main_table[0x5d] = (False, 'jsr', p_aERn, 3, IF_CALL)\nmain_table[0x5e] = (False, 'jsr', p_aAA24, 0, IF_CALL)\nmain_table[0x5f] = (False, 'jsr', p_aaAA8, 0, IF_CALL)\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/bits.py",
"new_path": "envi/bits.py",
"diff": "@@ -140,11 +140,16 @@ def is_aux_carry_sub(src, dst):\n# set of format lists which make size, endianness, and signedness fast and easy\nle_fmt_chars = (None,\"B\",\"<H\",None,\"<I\",None,None,None,\"<Q\")\nbe_fmt_chars = (None,\"B\",\">H\",None,\">I\",None,None,None,\">Q\")\n-\nfmt_chars = (le_fmt_chars, be_fmt_chars)\nle_fmt_schars = (None,\"b\",\"<h\",None,\"<i\",None,None,None,\"<q\")\nbe_fmt_schars = (None,\"b\",\">h\",None,\">i\",None,None,None,\">q\")\n+fmt_schars = (le_fmt_schars, be_fmt_schars)\n+\n+master_fmts = (fmt_chars, fmt_schars)\n+\n+fmt_sizes = (None,1,2,4,4,8,8,8,8)\n+\nfmt_schars = (le_fmt_schars, be_fmt_schars)\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/memory.py",
"new_path": "envi/memory.py",
"diff": "@@ -162,6 +162,7 @@ class IMemory:\nreturn (0,0xffffffff)\ndef readMemValue(self, addr, size):\n+ #FIXME: use getBytesDef (and implement a dummy wrapper in VTrace for getBytesDef)\nbytes = self.readMemory(addr, size)\nif bytes == None:\nreturn None\n@@ -170,8 +171,7 @@ class IMemory:\nif len(bytes) != size:\nraise Exception(\"Read Gave Wrong Length At 0x%.8x (va: 0x%.8x wanted %d got %d)\" % (self.getProgramCounter(),addr, size, len(bytes)))\n- fmttbl = (e_bits.le_fmt_chars, e_bits.be_fmt_chars)[self.getEndian()]\n- return struct.unpack(fmttbl[size], bytes)[0]\n+ return e_bits.parsebytes(bytes, 0, size, False, self.getEndian())\ndef readMemoryPtr(self, va):\n'''\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
update to handle non-1,2,4,8-byte memory reads/writes
|
718,770 |
06.04.2017 08:25:08
| 14,400 |
35633bd7209b527cac80853ff18f1e2f82df7697
|
only MemoryObject.parseOpcode and subclasses need parseOpcode to use getByteDef() (since that's where it's defined)
|
[
{
"change_type": "MODIFY",
"old_path": "envi/memory.py",
"new_path": "envi/memory.py",
"diff": "@@ -298,8 +298,8 @@ class IMemory:\nExample: op = m.parseOpcode(0x7c773803)\n'''\n- off, b = self.getByteDef(va)\n- return self.imem_archs[ (arch & envi.ARCH_MASK) >> 16 ].archParseOpcode(b, off, va)\n+ b = self.readMemory(va, 16)\n+ return self.imem_archs[ arch >> 16 ].archParseOpcode(b, 0, va)\nclass MemoryCache(IMemory):\n'''\n@@ -469,6 +469,15 @@ class MemoryObject(IMemory):\nreturn (offset, mbytes)\nraise envi.SegmentationViolation(va)\n+ def parseOpcode(self, va, arch=envi.ARCH_DEFAULT):\n+ '''\n+ Parse an opcode from the specified virtual address.\n+\n+ Example: op = m.parseOpcode(0x7c773803)\n+ '''\n+ off, b = self.getByteDef(va)\n+ return self.imem_archs[ (arch & envi.ARCH_MASK) >> 16 ].archParseOpcode(b, off, va)\n+\nclass MemoryFile:\n'''\nA file like object to wrap around a memory object.\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
only MemoryObject.parseOpcode and subclasses need parseOpcode to use getByteDef() (since that's where it's defined)
|
718,770 |
14.04.2017 09:01:00
| 14,400 |
99cb74770343ff88eb44b9c3cbdf30fb3a2484a0
|
replacing _arch_badopbytes
|
[
{
"change_type": "MODIFY",
"old_path": "envi/__init__.py",
"new_path": "envi/__init__.py",
"diff": "@@ -78,6 +78,7 @@ class ArchitectureModule:\nself._arch_id = getArchByName(archname)\nself._arch_name = archname\nself._arch_maxinst = maxinst\n+ self._arch_badopbytes = ['\\x00\\x00\\x00\\x00\\x00']\nself.setEndian(endian)\ndef getArchId(self):\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
replacing _arch_badopbytes
|
718,777 |
05.05.2017 06:17:36
| 25,200 |
344bf75a11de76523f084df5217660dd15ac5c83
|
allow rvaToOffset to return offset before first section
|
[
{
"change_type": "MODIFY",
"old_path": "PE/__init__.py",
"new_path": "PE/__init__.py",
"diff": "@@ -437,6 +437,8 @@ class PE(object):\ndef rvaToOffset(self, rva):\nif self.inmem:\nreturn rva\n+ if rva >= 0 and rva < self.IMAGE_NT_HEADERS.OptionalHeader.SizeOfHeaders:\n+ return rva\nfor s in self.sections:\nsbase = s.VirtualAddress\nssize = max(s.SizeOfRawData, s.VirtualSize)\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
allow rvaToOffset to return offset before first section
|
718,770 |
23.05.2017 23:05:08
| 14,400 |
2894d3d0ce3fa9b610a21bd3ae4b59fed268ef3a
|
merge introduced bugs
|
[
{
"change_type": "MODIFY",
"old_path": "vivisect/tools/graphutil.py",
"new_path": "vivisect/tools/graphutil.py",
"diff": "@@ -472,7 +472,12 @@ def buildFunctionGraph(vw, fva, revloop=False, g=None):\ng.addNode(nid=cbva, cbva=cbva, cbsize=cbsize, color=bcolor)\n# Grab the location for the last instruction in the block\n- lva, lsize, ltype, linfo = vw.getLocation(cbva+cbsize-1)\n+ nextva = cbva+cbsize-1\n+ loc = vw.getLocation(nextva)\n+ if loc == None:\n+ raise Exception(\"buildFunctionGraph: Attempt to get location at 0x%x\" % nextva)\n+\n+ lva, lsize, ltype, linfo = loc\nfor xrfrom, xrto, xrtype, xrflags in vw.getXrefsFrom(lva, vivisect.REF_CODE):\n@@ -713,6 +718,7 @@ class PathGenerator:\n__steplock = threading.Lock()\ndef __init__(self, graph):\n+ self.wdt = None\nself.graph = graph\ndef stop(self):\n@@ -740,8 +746,8 @@ class PathGenerator:\nself.__steplock.acquire()\ntry:\nif not self.__update:\n- count += 1\n- if count > maxsec:\n+ self._wd_count += 1\n+ if self._wd_count > self._wd_maxsec:\nself.stop()\nbreak\nfinally:\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
merge introduced bugs
|
718,770 |
27.03.2017 12:18:03
| 14,400 |
d8f479ac79df8d27b0be84048cb0056c00b42652
|
emulation and code-flow improvements, additional arm emu instructions covered.
|
[
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/disasm.py",
"new_path": "envi/archs/arm/disasm.py",
"diff": "@@ -3783,11 +3783,12 @@ class ArmOpcode(envi.Opcode):\nif self.prefixes != COND_AL:\nflags |= envi.BR_COND\n- if self.opcode in ( INS_B, INS_BX, INS_BL, INS_BLX, INS_BCC, INS_CBZ, INS_CBNZ ):\n- oper = self.opers[0]\n+ if self.iflags & (envi.IF_BRANCH | envi.IF_CALL):\n+ oper = self.opers[-1]\n# check for location being ODD\noperval = oper.getOperValue(self, emu)\n+\nif operval == None:\n# probably a branch to a register. just return.\nreturn ret\n@@ -3795,6 +3796,7 @@ class ArmOpcode(envi.Opcode):\nif self.opcode in (INS_BLX, INS_BX):\nif operval & 3:\nflags |= envi.ARCH_THUMB16\n+ operval &= -2\nelse:\nflags |= envi.ARCH_ARMV7\n@@ -3846,6 +3848,7 @@ class ArmOpcode(envi.Opcode):\nmnem += 'id'\nif self.simdflags:\n+ '''\nif self.simdflags & IFS_S32_F64:\nmnem += '.s32.f64'\nelif self.simdflags & IFS_S32_F32:\n@@ -3918,6 +3921,8 @@ class ArmOpcode(envi.Opcode):\nmnem += '.32'\nelif self.simdflags & IFS_64:\nmnem += '.64'\n+ '''\n+ mnem += IFS[self.simdflags]\n#FIXME: Advanced SIMD modifiers (IF_V*)\nif self.iflags & IF_THUMB32:\n"
},
{
"change_type": "MODIFY",
"old_path": "envi/archs/arm/emu.py",
"new_path": "envi/archs/arm/emu.py",
"diff": "@@ -121,17 +121,16 @@ conditionals = [\nc1101,\n]\n+top_bits_32 = [(e_bits.u_maxes[4] ^ ((e_bits.u_maxes[4]>>x))) for x in range(4*8)]\nLSB_FMT = [0, 'B', '<H', 0, '<I', 0, 0, 0, '<Q',]\nMSB_FMT = [0, 'B', '>H', 0, '>I', 0, 0, 0, '>Q',]\nLSB_FMT_SIGNED = [0, 'b', '<h', 0, '<i', 0, 0, 0, '<q',]\nMSB_FMT_SIGNED = [0, 'b', '>h', 0, '>i', 0, 0, 0, '>q',]\n-class ArmEmulator(ArmModule, ArmRegisterContext, envi.Emulator):\n+class ArmEmulator(ArmRegisterContext, envi.Emulator):\ndef __init__(self):\n- ArmModule.__init__(self)\n-\n# FIXME: this should be None's, and added in for each real coproc... but this will work for now.\nself.coprocs = [CoProcEmulator(x) for x in xrange(16)]\nself.int_handlers = [self.default_int_handler for x in range(100)]\n@@ -194,6 +193,17 @@ class ArmEmulator(ArmModule, ArmRegisterContext, envi.Emulator):\nendian_fmt = (LSB_FMT_SIGNED, MSB_FMT_SIGNED)[self.getEndian()]\nreturn struct.unpack(endian_fmt[size], bytes)[0]\n+ def parseOpcode(self, va, arch=envi.ARCH_DEFAULT):\n+ '''\n+ Parse an opcode from the specified virtual address.\n+\n+ Example: op = m.parseOpcode(0x7c773803)\n+\n+ note: differs from the IMemory interface by checking loclist\n+ '''\n+ off, b = self.getByteDef(va)\n+ return self.imem_archs[ (arch & envi.ARCH_MASK) >> 16 ].archParseOpcode(b, off, va)\n+\ndef executeOpcode(self, op):\n# NOTE: If an opcode method returns\n# other than None, that is the new eip\n@@ -479,7 +489,7 @@ class ArmEmulator(ArmModule, ArmRegisterContext, envi.Emulator):\nval = val1 | val2\nself.setOperValue(op, 0, val)\n- Sflag = op.iflags & IF_S # FIXME: IF_PSR_S???\n+ Sflag = op.iflags & IF_PSR_S # FIXME: IF_PSR_S???\nif Sflag:\nself.setFlag(PSR_N_bit, e_bits.is_signed(val, 4))\nself.setFlag(PSR_Z_bit, not val)\n@@ -1024,6 +1034,114 @@ class ArmEmulator(ArmModule, ArmRegisterContext, envi.Emulator):\nself.setFlag(PSR_C_bit, e_bits.is_unsigned_carry(val, 4))\nself.setFlag(PSR_V_bit, e_bits.is_signed_overflow(val, 4))\n+ def i_lsl(self, op):\n+ if len(op.opers) == 3:\n+ src = self.getOperValue(op, 1)\n+ imm5 = self.getOperValue(op, 2)\n+\n+ else:\n+ src = self.getOperValue(op, 0)\n+ imm5 = self.getOperValue(op, 1)\n+\n+ val = src << imm5\n+ carry = (val >> 32) & 1\n+ self.setOperValue(op, 0, val)\n+\n+ Sflag = op.iflags & IF_S\n+ if Sflag:\n+ self.setFlag(PSR_N_bit, e_bits.is_signed(val, 4))\n+ self.setFlag(PSR_Z_bit, not val)\n+ self.setFlag(PSR_C_bit, carry)\n+ #self.setFlag(PSR_V_bit, e_bits.is_signed_overflow(val, 4))\n+\n+ def i_lsr(self, op):\n+ if len(op.opers) == 3:\n+ src = self.getOperValue(op, 1)\n+ imm5 = self.getOperValue(op, 2)\n+\n+ else:\n+ src = self.getOperValue(op, 0)\n+ imm5 = self.getOperValue(op, 1)\n+\n+ val = src >> imm5\n+ carry = (src >> (imm5-1)) & 1\n+ self.setOperValue(op, 0, val)\n+\n+ Sflag = op.iflags & IF_S\n+ if Sflag:\n+ self.setFlag(PSR_N_bit, e_bits.is_signed(val, 4))\n+ self.setFlag(PSR_Z_bit, not val)\n+ self.setFlag(PSR_C_bit, carry)\n+ #self.setFlag(PSR_V_bit, e_bits.is_signed_overflow(val, 4))\n+\n+ def i_asr(self, op):\n+ if len(op.opers) == 3:\n+ src = self.getOperValue(op, 1)\n+ srclen = op.opers[1].tsize\n+ imm5 = self.getOperValue(op, 2)\n+\n+ else:\n+ src = self.getOperValue(op, 0)\n+ srclen = op.opers[0].tsize\n+ imm5 = self.getOperValue(op, 1)\n+\n+ if e_bits.is_signed(src, srclen):\n+ val = (src >> imm5) | top_bits_32[imm5]\n+ else:\n+ val = (src >> imm5)\n+\n+ carry = (src >> (imm5-1)) & 1\n+ self.setOperValue(op, 0, val)\n+\n+ Sflag = op.iflags & IF_S\n+ if Sflag:\n+ self.setFlag(PSR_N_bit, e_bits.is_signed(val, 4))\n+ self.setFlag(PSR_Z_bit, not val)\n+ self.setFlag(PSR_C_bit, carry)\n+ #self.setFlag(PSR_V_bit, e_bits.is_signed_overflow(val, 4))\n+\n+ def i_ror(self, op):\n+ if len(op.opers) == 3:\n+ src = self.getOperValue(op, 1)\n+ imm5 = self.getOperValue(op, 2)\n+\n+ else:\n+ src = self.getOperValue(op, 0)\n+ imm5 = self.getOperValue(op, 1)\n+\n+ val = ((src >> imm5) | (src << 32-imm5)) & 0xffffffff\n+ carry = (val >> 31) & 1\n+ self.setOperValue(op, 0, val)\n+\n+ Sflag = op.iflags & IF_S\n+ if Sflag:\n+ self.setFlag(PSR_N_bit, e_bits.is_signed(val, 4))\n+ self.setFlag(PSR_Z_bit, not val)\n+ self.setFlag(PSR_C_bit, carry)\n+ #self.setFlag(PSR_V_bit, e_bits.is_signed_overflow(val, 4))\n+\n+ def i_rrx(self, op):\n+ if len(op.opers) == 3:\n+ src = self.getOperValue(op, 1)\n+ imm5 = self.getOperValue(op, 2)\n+\n+ else:\n+ src = self.getOperValue(op, 0)\n+ imm5 = self.getOperValue(op, 1)\n+\n+ carry_in = self.getFlag(PSR_C_bit)\n+\n+ val = (carry_in<<31) | (src >> 1)\n+ carry = src & 1\n+ self.setOperValue(op, 0, val)\n+\n+ Sflag = op.iflags & IF_S\n+ if Sflag:\n+ self.setFlag(PSR_N_bit, e_bits.is_signed(val, 4))\n+ self.setFlag(PSR_Z_bit, not val)\n+ self.setFlag(PSR_C_bit, carry)\n+ #self.setFlag(PSR_V_bit, e_bits.is_signed_overflow(val, 4))\n+\ndef i_cbz(self, op):\nregval = op.getOperValue(0)\n@@ -1159,7 +1277,12 @@ class ArmEmulator(ArmModule, ArmRegisterContext, envi.Emulator):\ncoproc = self._getCoProc(cpnum)\ncoproc.mcrr(op.opers)\n+ def i_nop(self, op):\n+ pass\n+ i_dmb = i_nop\n+ i_dsb = i_nop\n+ i_isb = i_nop\nopcode_dist = \\\n"
}
] |
Python
|
Apache License 2.0
|
vivisect/vivisect
|
emulation and code-flow improvements, additional arm emu instructions covered.
|
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