src_en/man.geco_gatearraybasetile.txt

<h3>2.4.1 Gate Array Cell Base Tile</h3>
<p>The base unit of gate array cell is a tile. Every gate array cell consists of one or more tiles. Use one 5nm standard library as example:</p>
<table border=1 class='lefttable'>
<thead><tr>
<th>Tile Numbers</th><th>Spare Cells</th><th>Functional Cells</th></tr></thead>
<tr>
<td>1</td><td>GFILL1</td><td>GTIE GINVD1 GND2D1 GNR2D1</td></tr>
<tr>
<td>2</td><td>GFILL2</td><td>GBUFD1 GAN2D1 GOR2D1 GAOI21D1 GDN3D1</td></tr>
<tr>
<td>3</td><td>GFILL3</td><td>GAO21D1 GAN4D1 GOR4D1</td></tr>
<tr>
<td>4</td><td>GFILL4</td><td>GINVD8 GAN2D4</td></tr>
<tr>
<td>5</td><td>GFILL5</td><td>GMUX2D1 GXOR2D1 GXNOR2D1</td></tr>
<tr>
<td>6</td><td>GFILL6</td><td>GBUFD8 GSDFFRQD1 GSDFFSQD1</td></tr>
<tr>
<td>8</td><td>GFILL8</td><td>GINVD16</td></tr>
<tr>
<td>12</td><td>GFILL12</td><td>GCKLNQD6</td></tr>
</table>
<p><b>Table: Tile Numbers in Gate Array Spare Cells and Functional Cells</b></p>
<p>Gate array cells have a larger size than normal standard cells. For instance, GFILL1 is four times larger than FILL1, and GND2D1 is 25% larger than ND2D1. However, the power consumption and timing of these cells are similar.</p>
<p>Each gate array spare cell has a location defined by a DEF file. In Figure 20, the location of one GFILL8 spare cell is defined as (Xg, Yg), with a tile height equivalent to that of GFILL1 and a tile width eight times that of GFILL1.</p>
<p>GFILL8 tiles can be regrouped and rewired in metal layers to create different functional cells. For example, GBUFD1 requires two tiles and implements a buffer function, while GAN4D1 uses three tiles to create a 4-input AND function.</p>
<div><img class='img-fluid' src='./tp_image/gofdoc/metal_tie_functional_cell.png' width='800'/></div>
<p><b>Figure 20: Gate Array Spare Cell GFILL8 Regrouped Tiles to Form Functional Cells</b></p>